> -----Original Message----- > From: Intel-wired-lan <[email protected]> On Behalf Of > Grzegorz Nitka > Sent: 18 December 2025 15:14 > To: [email protected] > Cc: Loktionov, Aleksandr <[email protected]>; > [email protected]; Nguyen, Anthony L <[email protected]>; > Kitszel, Przemyslaw <[email protected]> > Subject: [Intel-wired-lan] [PATCH iwl-net] ice: fix 'adjust' timer > programming for E830 devices > > Fix incorrect 'adjust the timer' programming sequence for E830 devices > series. Only shadow registers GLTSYN_SHADJ were programmed in the current > implementation. According to the specification [1], write to command > GLTSYN_CMD register is also required with CMD field set to "Adjust the Time" > value, for the timer adjustment to take the effect. > > The flow was broken for the adjustment less than S32_MAX/MIN range (around > +/- 2 seconds). For bigger adjustment, non-atomic programming flow is used, > involving set timer programming. Non-atomic flow is implemented correctly. > > Testing hints: > Run command: > phc_ctl /dev/ptpX get adj 2 get > Expected result: > Returned timstamps differ at least by 2 seconds > > [1] Intel® Ethernet Controller E830 Datasheet rev 1.3, chapter 9.7.5.4 > https://cdrdv2.intel.com/v1/dl/getContent/787353?explicitVersion=true > > Fixes: f00307522786 ("ice: Implement PTP support for E830 devices") > Reviewed-by: Aleksandr Loktionov <[email protected]> > Signed-off-by: Grzegorz Nitka <[email protected]> > --- > drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) >
Tested-by: Rinitha S <[email protected]> (A Contingent worker at Intel)
