On Thu, Jan 10, 2013 at 02:07:04PM -0500, Matt Porter wrote: > +/* struct dmaengine_chan_caps - expose capability of a channel > + * Note: each channel can have same or different capabilities > + * > + * This primarily classifies capabilities into > + * a) APIs/ops supported > + * b) channel physical capabilities > + * > + * @cap_mask: api/ops capability (DMA_INTERRUPT and DMA_PRIVATE > + * are invalid api/ops and will never be set) > + * @seg_nr: maximum number of SG segments supported on a SG/SLAVE > + * channel (0 for no maximum or not a SG/SLAVE channel) > + * @seg_len: maximum length of SG segments supported on a SG/SLAVE > + * channel (0 for no maximum or not a SG/SLAVE channel) > + */ > +struct dmaengine_chan_caps { > + dma_cap_mask_t cap_mask; > + int seg_nr; > + int seg_len; > +}; Now am really unclear why we would need direction as argument.
Also, I would add the channel physical capablities like direction, widths, lengths etc supported. > +/** > + * dma_get_channel_caps - flush pending transactions to HW flush pending... ??? > + * driver does not implement per channel capbilities then > + * NULL is returned. > + */ > +static inline struct dmaengine_chan_caps > +*dma_get_channel_caps(struct dma_chan *chan, enum dma_transfer_direction dir) you need to add this for when CONFIG_DMA_ENGINE is not defined as well. > +{ > + if (chan->device->device_channel_caps) > + return chan->device->device_channel_caps(chan, dir); > + return NULL; > +} > + > enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie); > #ifdef CONFIG_DMA_ENGINE > enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx); -- ~Vinod -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html