PLL6 out of reset is running at 2.4GHz, which is outside of its operating
boundaries.
Enforce its maximum frequency as set in the datasheet to make sure we stays
within these bounds.
Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
arch/arm/boot/dts/sun5i-a13.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index bf86e65dd167..de89edc5e5b3 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -97,6 +97,7 @@
reg = <0x01c20028 0x4>;
clocks = <&osc24M>;
clock-output-names = "pll6_sata", "pll6_other", "pll6";
+ clock-max-frequency = <1200000000>;
};
/* dummy is 200M */
--
2.0.1
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