my name is alexander and i'm a student at the university of erlangen-nuernberg in germany actually i'm working on a usb implementation for a operationg system called jx (it's mainly written in java). The controller i use is a intel 82801db.
My problem is that i can't communicate with any usb-device attached to the usb-bus. I can determine when a new device is attached to the bus, but when i then try to communicate with that device i get no response.
What i'm trying to do is to enumerate the device, by sending a getDeviceRequest to the Device, then getting only the first 8 bytes of this descriptor ... but my problem is that i always get an CRC/TIMER OUT ERROR.
Maybe somebody can give me a tip what goes wrong or what could go wrong. At the end if added the debug infos of my uhci-module. (I've already tried with no debug output at all, with the same result, so the problem is not that the debug mesages would consume too much time).
I've looked into the linux usb source to determine how linux dose this enumeration stuff, but could not determine exactly the code (could somebody please give me at tip [source-file with linenumber] where the uhci-controller gets reset, resets a port or enumerates a device).
Thanks
alexander-- debug output --
Each command beginns with UHCI[0]: followed by the type of action( set or clear) and the Register(e.g. Command, Interrupt) and then the value that is set or cleard as hex-value). Afterwards the current UHCI stettings are dumped with hex and bit output (reserved bits are skipped). If special data structures like TransferDescriptors, ... are created these are also dumped with hex and bit representation. I've added c-comments for the commands to explain what i do (try to do) and to indicate where i've set waits.
UHCI[0]: getBaseAddress UHCI[0]: ALLOC FrameList Memory UHCI[0]: FrameListPointers INIT
/* reset the controller */ UHCI[0]: setCommand(00 c2) --- START UHCI[0] ControllerRegister --- COMMAND: 00 00 : 000000000 STATUS: 20 : 100000 INTER ENABLE: 00 : 0000 FRAME NUMBER: 00 00 : 00000000000 BASE ADDRESS: 1f 6f d0 00 : 00011111011011111101000000000000 START OF FRAME: 40 : 01000000 PORT 0: 01 ab : 0000110101011 PORT 1: 00 80 : 0000010000000 --- END UHCI[0] ControllerRegister ---
/* enable all interrupts */ UHCI[0]: setInterrupt(0f) --- START UHCI[0] ControllerRegister --- COMMAND: 00 00 : 000000000 STATUS: 20 : 100000 INTER ENABLE: 0f : 1111 FRAME NUMBER: 00 00 : 00000000000 BASE ADDRESS: 1f 6f d0 00 : 00011111011011111101000000000000 START OF FRAME: 40 : 01000000 PORT 0: 01 ab : 0000110101011 PORT 1: 00 80 : 0000010000000 --- END UHCI[0] ControllerRegister ---
UHCI[0]: setBaseAddress(06 00 00 00) --- START UHCI[0] ControllerRegister --- COMMAND: 00 00 : 000000000 STATUS: 20 : 100000 INTER ENABLE: 0f : 1111 FRAME NUMBER: 00 00 : 00000000000 BASE ADDRESS: 06 00 00 00 : 00000110000000000000000000000000 START OF FRAME: 40 : 01000000 PORT 0: 01 ab : 0000110101011 PORT 1: 00 80 : 0000010000000 --- END UHCI[0] ControllerRegister ---
/* attached device detected waiting for 100 msec then reset port */ UHCI[0]: setPort[0](02 00) --- START UHCI[0] ControllerRegister --- COMMAND: 00 00 : 000000000 STATUS: 20 : 100000 INTER ENABLE: 0f : 1111 FRAME NUMBER: 00 00 : 00000000000 BASE ADDRESS: 06 00 00 00 : 00000110000000000000000000000000 START OF FRAME: 40 : 01000000 PORT 0: 02 aa : 0001010101010 PORT 1: 00 80 : 0000010000000 --- END UHCI[0] ControllerRegister ---
/* wait for 10 ms to reset the port clear the reset-port bit */ UHCI[0]: setPort[0](00 00) --- START UHCI[0] ControllerRegister --- COMMAND: 00 00 : 000000000 STATUS: 20 : 100000 INTER ENABLE: 0f : 1111 FRAME NUMBER: 00 00 : 00000000000 BASE ADDRESS: 06 00 00 00 : 00000110000000000000000000000000 START OF FRAME: 40 : 01000000 PORT 0: 01 ab : 0000110101011 PORT 1: 00 80 : 0000010000000 --- END UHCI[0] ControllerRegister ---
/* acknolage connection-status-changed */ UHCI[0]: clearPort[0](00 02) --- START UHCI[0] ControllerRegister --- COMMAND: 00 00 : 000000000 STATUS: 20 : 100000 INTER ENABLE: 0f : 1111 FRAME NUMBER: 00 00 : 00000000000 BASE ADDRESS: 06 00 00 00 : 00000110000000000000000000000000 START OF FRAME: 40 : 01000000 PORT 0: 01 a9 : 0000110101001 PORT 1: 00 80 : 0000010000000 --- END UHCI[0] ControllerRegister ---
/* acknloage port-enable-disable-change */ UHCI[0]: clearPort[0](00 08) --- START UHCI[0] ControllerRegister --- COMMAND: 00 00 : 000000000 STATUS: 20 : 100000 INTER ENABLE: 0f : 1111 FRAME NUMBER: 00 00 : 00000000000 BASE ADDRESS: 06 00 00 00 : 00000110000000000000000000000000 START OF FRAME: 40 : 01000000 PORT 0: 01 a1 : 0000110100001 PORT 1: 00 80 : 0000010000000 --- END UHCI[0] ControllerRegister ---
/* activte port */ UHCI[0]: setPort[0](00 05) --- START UHCI[0] ControllerRegister --- COMMAND: 00 00 : 000000000 STATUS: 20 : 100000 INTER ENABLE: 0f : 1111 FRAME NUMBER: 00 00 : 00000000000 BASE ADDRESS: 06 00 00 00 : 00000110000000000000000000000000 START OF FRAME: 40 : 01000000 PORT 0: 01 a5 : 0000110100101 PORT 1: 00 80 : 0000010000000 --- END UHCI[0] ControllerRegister ---
/* create a getDescriptor DeviceRequest */ --- START Device Request --- Type: 80 : 10000000 Request: 06 : 00000110 Value: 00 10 : 0000000000010000 Index: 00 00 : 0000000000000000 Length: 00 12 : 0000000000010010 --- END Device Request ---
/* create a TD that points to the DeviceRequest */ --- START TransferDescriptor --- Pointer: 00 00 00 00 : 00000000000000000000000000000000 First Direction: 00 : 0 Type: 00 : 0 Terminated: 01 : 1 Short Packet Detect: 00 : 0 CERR: 03 : 11 LowSpeed Device: 00 : 0 Isochronous: 00 : 0 Interrupt on Complete: 00 : 0 Status: 40 : 1000000 Actual Length: 00 00 : 00000000000 Max Length: 00 07 : 00000000111 Data Toggle: 00 : 0 Endpoint: 00 : 0000 Device Address: 00 : 0000000 PID: 2d : 00101101 Buffer Pointer: 07 f7 d8 00 : 00000111111101111101100000000000 --- END TransferDescriptor ---
/* create a QH that points to the TD */ --- START QueueHeader --- Link Pointer: 00 00 00 00 : 00000000000000000000000000000000 Link Type: 00 : 0 Link Terminated: 01 : 1 Element Link Pointer: 07 f7 dc 00 : 00000111111101111101110000000000 Element Link Type: 00 : 0 Element Link Terminated: 00 : 0 --- END QueueHeader ---
/* make the first FrameListPointer point to the QH */ --- START FrameListPointer --- Pointer: 07 f7 e0 00 : 00000111111101111110000000000000 Type: 01 : 1 Terminated: 00 : 0 --- END FrameListPointer ---
/* set run bit of the controller */ UHCI[0]: setCommand(00 01) --- START UHCI[0] ControllerRegister --- COMMAND: 00 01 : 000000001 STATUS: 00 : 000000 INTER ENABLE: 0f : 1111 FRAME NUMBER: 00 00 : 00000000000 BASE ADDRESS: 06 00 00 00 : 00000110000000000000000000000000 START OF FRAME: 40 : 01000000 PORT 0: 01 a5 : 0000110100101 PORT 1: 00 80 : 0000010000000 --- END UHCI[0] ControllerRegister ---
/* here comes the error interrupt */ UHCI[0]: INTERRUPT (error occured during transaction)
/* dumping the TD again ActualLength has changed => controller has found the TD and has worked with it. But in the status field the CRC/TimeOutError bit is set and CERR fild was decremented by one */ --- START TransferDescriptor --- Pointer: 00 00 00 00 : 00000000000000000000000000000000 First Direction: 00 : 0 Type: 00 : 0 Terminated: 01 : 1 Short Packet Detect: 00 : 0 CERR: 02 : 10 LowSpeed Device: 00 : 0 Isochronous: 00 : 0 Interrupt on Complete: 00 : 0 Status: 42 : 1000010 Actual Length: 00 07 : 00000000111 Max Length: 00 07 : 00000000111 Data Toggle: 00 : 0 Endpoint: 00 : 0000 Device Address: 00 : 0000000 PID: 2d : 00101101 Buffer Pointer: 07 f7 d8 00 : 00000111111101111101100000000000 --- END TransferDescriptor ---
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