Huh, I thought those were guaranteed to return values in native byte order on PCI ... something seems screwey there, it's not as if any PCI device will treat bit 0 in its registers as MSB or LSB depending on what kind of host you've got.
Thing is, I didn't think that readl()/writel() was supposed to be bus-specific.
readl and writel always return/take values in native byte. But what they expect to be on the bus or what they write on the bus is in the ppc definitions supposed to be little-endian. Apparently this is because writel/readl are almost only employed when accessing PCI. Since PCI is a little-endian bus, every driver should take care of doing the byte swapping when running in BE mode. So to be easier, the access macro have been adjusted instead.
All the drivers that needs to access memory mapped IO that are big-endian is almost only drivers for OnChip peripherals and those use in_32be & out_32be since these drivers are specific to that particular platform.
There's going to be an ohci_readl() to handle that one SHARP controller erratum ... that'd be a fair place to hid this kind of thing. You'd have to add an ohci_writel() too.
Yup, sounds fine to me. It's going to be addedd to the official tree soon ? Or can be pulled from the dev bktree ?
The "no-IRQ" might be because your IRQ handler doesn't look enough like usb_hcd_irq(), which sets that flag as appropriate. That may also trigger the 2000/sec rate.
static irqreturn_t mpc5xxx_ohci_int(int irq, void *__hcd, struct pt_regs * r)
{
struct usb_hcd *hcd = (struct usb_hcd *)__hcd;
return usb_hcd_irq(irq, hcd, r);
}
Quite close ;) In the 2.4 port there is no modification of the in handler, and in the other glues, I've seen it's done like that.
That control timeout message isn't necessarily a problem, if it only happens a few times and things basically work.
Oh yeah, if it worked, I wouldn't bother since I got such messages on my PC too from time to time ...
I've tried multiple things, and still get no clue. I'm not yet sure about the endianness of the ED & TD. I haven't seen in the specs ( taken from compaq, the only I found) where the talk about endianness. And they don't describe this in the datasheet of the processor I'm using neither.
Sylvain
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