From: "Chang, Rebecca Swee Fun" <rebecca.swee.fun.ch...@intel.com>
x86: add support for Intel Low Power Subsystem We are starting to see traditional SoC peripherals also in the x86 world in chips like Intel Lynxpoint. Typically we already have a Linux driver for the peripheral but it takes advantage of the common clk framework to control and retrieve information about the peripheral clock. So far there hasn't been a standard way on x86 to pass information such as clock rate from whatever the configuration system is used to the driver, but instead different variations have emerged, like adding this information to the platform data. Solve this by adding a new config option X86_INTEL_LPSS. If this is selected we enable common clk framework (and everything else) that is needed to support the Intel LPSS drivers. Enabling common clk framework on x86 was originally proposed by Mark Brown. Signed-off-by: Mika Westerberg <mika.westerb...@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wyso...@intel.com> Signed-off-by: Chang, Rebecca Swee Fun <rebecca.swee.fun.ch...@intel.com> --- ...add-support-for-Intel-Low-Power-Subsystem.patch | 48 ++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 meta/cfg/kernel-cache/features/valleyisland-io/0013-x86-add-support-for-Intel-Low-Power-Subsystem.patch diff --git a/meta/cfg/kernel-cache/features/valleyisland-io/0013-x86-add-support-for-Intel-Low-Power-Subsystem.patch b/meta/cfg/kernel-cache/features/valleyisland-io/0013-x86-add-support-for-Intel-Low-Power-Subsystem.patch new file mode 100644 index 0000000..3b6ef9e --- /dev/null +++ b/meta/cfg/kernel-cache/features/valleyisland-io/0013-x86-add-support-for-Intel-Low-Power-Subsystem.patch @@ -0,0 +1,48 @@ +x86: add support for Intel Low Power Subsystem + +We are starting to see traditional SoC peripherals also in the x86 world in +chips like Intel Lynxpoint. Typically we already have a Linux driver for +the peripheral but it takes advantage of the common clk framework to +control and retrieve information about the peripheral clock. + +So far there hasn't been a standard way on x86 to pass information such as +clock rate from whatever the configuration system is used to the driver, +but instead different variations have emerged, like adding this information +to the platform data. + +Solve this by adding a new config option X86_INTEL_LPSS. If this is +selected we enable common clk framework (and everything else) that is +needed to support the Intel LPSS drivers. + +Enabling common clk framework on x86 was originally proposed by Mark Brown. + +Signed-off-by: Mika Westerberg <mika.westerb...@linux.intel.com> +Signed-off-by: Rafael J. Wysocki <rafael.j.wyso...@intel.com> +--- + arch/x86/Kconfig | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig +index 225543b..4f7c2da 100644 +--- a/arch/x86/Kconfig ++++ b/arch/x86/Kconfig +@@ -454,6 +454,16 @@ config X86_MDFLD + + endif + ++config X86_INTEL_LPSS ++ bool "Intel Low Power Subsystem Support" ++ depends on ACPI ++ select COMMON_CLK ++ ---help--- ++ Select to build support for Intel Low Power Subsystem such as ++ found on Intel Lynxpoint PCH. Selecting this option enables ++ things like clock tree (common clock framework) which are needed ++ by the LPSS peripheral drivers. ++ + config X86_RDC321X + bool "RDC R-321x SoC" + depends on X86_32 +-- +1.7.10.4 + -- 1.7.10.4 _______________________________________________ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
