Backport: Submitted upstream [v2].
[https://patchwork.kernel.org/patch/9284339/]
On some newer Intel x86 processors/SoCs the TSC frequency can be directly
calculated by factors read from specific MSR registers or from a cpuid
leaf (0x15). TSC frequency calculated by native msr/cpuid is absolutely
accurate so we should always skip calibrating TSC aginst another clock,
e.g. PIT, HPET, etc. So we want to skip the refined calibration by setting
the X86_FEATURE_TSC_RELIABLE flag. Existing code setting the flag by
set_cpu_cap() doesn't work as the flag is cleared later in identify_cpu().
A cpu caps flag is not cleared only if it's set by setup_force_cpu_cap().
This patch converted set_cpu_cap() to setup_force_cpu_cap() to ensure
refined calibration is skipped.
We had a test on Intel CherryTrail platform: the 24 hours time drift is
3.6 seconds if refined calibration was not skipped while the drift is less
than 0.6 second when refined calibration was skipped.
Correctly setting the X86_FEATURE_TSC_RELIABLE flag also guarantees TSC is
not monitored by timekeeping watchdog because on most of these system TSC
is the only reliable clocksource. HPET, for instance, works but may not
be reliable. So kernel may report a physically reliable TSC is not reliable
just because a physically not reliable HPET is acting as timekeeping
watchdog.
Signed-off-by: Bin Gao <bin....@intel.com>
Signed-off-by: Nilesh Bacchewar <nilesh.bacche...@intel.com>
---
arch/x86/kernel/tsc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index dd85b3c..71c8463 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -696,6 +696,7 @@ unsigned long native_calibrate_tsc(void)
}
}
+ setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
return crystal_khz * ebx_numerator / eax_denominator;
}
--
1.9.1
--
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