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"Vincent Fazio <[email protected]>" just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/7733

-- gerrit

commit db55a398551d42718d238e13a5e9a6fe4827eef5
Author: Jacob Zarnstorff <[email protected]>
Date:   Wed Mar 22 10:24:13 2023 -0500

    jtag/drivers/bcm2835gpio: Refactor register access macros
    
    Change-Id: I23ca80943877a5495a14cea4278a96ec5b0b7bb0
    Signed-off-by: Jacob Zarnstorff <[email protected]>
    Signed-off-by: Vincent Fazio <[email protected]>

diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c
index 4af32109d3..83d9323834 100644
--- a/src/jtag/drivers/bcm2835gpio.c
+++ b/src/jtag/drivers/bcm2835gpio.c
@@ -30,26 +30,54 @@ static off_t bcm2835_peri_base = 0x20000000;
 #define BCM2835_GPIO_MODE_INPUT 0
 #define BCM2835_GPIO_MODE_OUTPUT 1
 
+#define BCM2835_GPIO_REG_READ(offset) \
+    (*(pio_base + (offset)))
+
+#define BCM2835_GPIO_REG_WRITE(offset, value) \
+    (*(pio_base + (offset)) = (value))
+
+#define BCM2835_GPIO_SET_REG_BITS(offset, bit_mask) \
+    (*(pio_base + (offset)) |= (bit_mask))
+
+#define BCM2835_GPIO_CLEAR_REG_BITS(offset, bit_mask) \
+    (*(pio_base + (offset)) &= ~(bit_mask))
+
 /* GPIO setup macros */
-#define MODE_GPIO(g) (*(pio_base+((g)/10))>>(((g)%10)*3) & 7)
-#define INP_GPIO(g) do { *(pio_base+((g)/10)) &= ~(7<<(((g)%10)*3)); } while 
(0)
-#define SET_MODE_GPIO(g, m) do { /* clear the mode bits first, then set as 
necessary */ \
-               INP_GPIO(g);                                            \
-               *(pio_base+((g)/10)) |=  ((m)<<(((g)%10)*3)); } while (0)
-#define OUT_GPIO(g) SET_MODE_GPIO(g, BCM2835_GPIO_MODE_OUTPUT)
+#define MODE_GPIO(gpio_pin_num) /* read the function select bits of specified 
GPIO pin number */ \
+    (BCM2835_GPIO_REG_READ(((uint32_t)gpio_pin_num / 10)) >> 
(((uint32_t)gpio_pin_num % 10) * 3) & 7)
+
+#define INP_GPIO(gpio_pin_num) /* set GPIO pin number as input */ \
+    BCM2835_GPIO_CLEAR_REG_BITS(((uint32_t)gpio_pin_num / 10), (7 << 
(((uint32_t)gpio_pin_num % 10) * 3)))
+
+#define SET_MODE_GPIO(gpio_pin_num, bcm2835_gpio_mode) do { /* clear the mode 
bits first, then set as necessary */ \
+    INP_GPIO(gpio_pin_num);    \
+    BCM2835_GPIO_SET_REG_BITS(((uint32_t)gpio_pin_num / 10), \
+               (bcm2835_gpio_mode << (((uint32_t)gpio_pin_num % 10) * 3))); } 
while(0)
+
+#define OUT_GPIO(gpio_pin_num) /* set GPIO pin number as output */ \
+    SET_MODE_GPIO(gpio_pin_num, BCM2835_GPIO_MODE_OUTPUT)
 
 #ifndef BCM2835GPIO_ALL_GPIO
-#define GPIO_SET(g, v) (*(pio_base+7)) = v<<(uint32_t)g  /* sets   bits which 
are 1, ignores bits which are 0 */
-#define GPIO_CLR(g, v) (*(pio_base+10)) = v<<(uint32_t)g /* clears bits which 
are 1, ignores bits which are 0 */
-#define GPIO_LEV(g)    ((*(pio_base+13)>>(uint32_t)g) & 1) /* current level of 
the pin */
-#define GPIO_BULK_SET(v) GPIO_SET(0, v)
-#define GPIO_BULK_CLR(v) GPIO_CLR(0, v)
+#define GPIO_SET(gpio_pin_num, value) /* GPSET[7,8] register sets bits which 
are 1, ignores bits which are 0 */ \
+    BCM2835_GPIO_REG_WRITE(7, (value << (uint32_t)gpio_pin_num))
+
+#define GPIO_CLR(gpio_pin_num, value) /* GPCLR[10,11] register clears bits 
which are 1, ignores bits which are 0 */ \
+    BCM2835_GPIO_REG_WRITE(10, (value << (uint32_t)gpio_pin_num))
+
+#define GPIO_PIN_LEVEL(gpio_pin_num) /* current level of the pin */ \
+    ((BCM2835_GPIO_REG_READ(13) >> (uint32_t)gpio_pin_num) & 1)
+
+#define GPIO_BULK_SET(v) BCM2835_GPIO_REG_WRITE(7, v)
+#define GPIO_BULK_CLR(v) BCM2835_GPIO_REG_WRITE(10, v)
 #else
-#define GPIO_SET(g, v) do { /* sets   bits which are 1, ignores bits which are 
0 */ \
-       *(pio_base+(7+((uint32_t)g/32))) = (v<<((uint32_t)g%32)); } while (0)
-#define GPIO_CLR(g, v) do { /* clears bits which are 1, ignores bits which are 
0 */ \
-       *(pio_base+(10+((uint32_t)g/32))) = (v<<((uint32_t)g%32)); } while (0)
-#define GPIO_LEV(g) ((*(pio_base+(13+((uint32_t)g/32)))>>((uint32_t)g%32)) & 
1) /* current level of the pin */
+#define GPIO_SET(gpio_pin_num, value) /* GPSET[7,8] register sets bits which 
are 1, ignores bits which are 0 */ \
+    BCM2835_GPIO_REG_WRITE((7 + ((uint32_t)gpio_pin_num / 32)), (value << 
((uint32_t)gpio_pin_num % 32)))
+
+#define GPIO_CLR(gpio_pin_num, value) /* GPCLR[10,11] register clears bits 
which are 1, ignores bits which are 0 */ \
+    BCM2835_GPIO_REG_WRITE((10 + ((uint32_t)gpio_pin_num / 32)), (value << 
((uint32_t)gpio_pin_num % 32)))
+
+#define GPIO_PIN_LEVEL(gpio_pin_num) /* current level of the pin */ \
+    ((BCM2835_GPIO_REG_READ((13 + ((uint32_t)gpio_pin_num / 32))) >> 
((uint32_t)gpio_pin_num % 32)) & 1)
 #endif
 
 static int dev_mem_fd;
@@ -157,7 +185,7 @@ static void initialize_gpio(enum adapter_gpio_config_index 
idx)
                return;
 
        initial_gpio_state[idx].mode = 
MODE_GPIO(adapter_gpio_config[idx].gpio_num);
-       initial_gpio_state[idx].output_level = 
GPIO_LEV(adapter_gpio_config[idx].gpio_num);
+       initial_gpio_state[idx].output_level = 
GPIO_PIN_LEVEL(adapter_gpio_config[idx].gpio_num);
        LOG_DEBUG("saved GPIO mode for %s (GPIO %d %d): %d",
                        adapter_gpio_get_name(idx), 
adapter_gpio_config[idx].chip_num, adapter_gpio_config[idx].gpio_num,
                        initial_gpio_state[idx].mode);
@@ -187,7 +215,7 @@ static void initialize_gpio(enum adapter_gpio_config_index 
idx)
 
 static bb_value_t bcm2835gpio_read(void)
 {
-       uint32_t value = 
GPIO_LEV(adapter_gpio_config[ADAPTER_GPIO_IDX_TDO].gpio_num);
+       uint32_t value = 
GPIO_PIN_LEVEL(adapter_gpio_config[ADAPTER_GPIO_IDX_TDO].gpio_num);
        return value ^ (adapter_gpio_config[ADAPTER_GPIO_IDX_TDO].active_low ? 
BB_HIGH : BB_LOW);
 
 }
@@ -293,7 +321,7 @@ static void bcm2835_swdio_drive(bool is_output)
 
 static int bcm2835_swdio_read(void)
 {
-       uint32_t value = 
GPIO_LEV(adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num);
+       uint32_t value = 
GPIO_PIN_LEVEL(adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num);
        return value ^ (adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].active_low 
? 1 : 0);
 }
 

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