This case seeks patch binding for a new network driver, although
there are no plans to backport.  (Such a backport would require
other non-trivial components to be backported as well, such as the MII
common layer and Brussels.)  So its probably pretty unlikely to ever happen.

As it uses established architecture, I believe it qualifies for self-review.
If anyone disagrees, let me know and I'll promote it to a fast track.


Template Version: @(#)sac_nextcase 1.68 02/23/09 SMI
This information is Copyright 2009 Sun Microsystems
1. Introduction
    1.1. Project/Component Working Name:
         Atheros/Attansic Ethernet Gigbit Ethernet Driver
    1.2. Name of Document Author/Supplier:
         Author:  Saurabh Misra
    1.3  Date of This Document:
        21 July, 2009
4. Technical Description

1. Introduction
   1.1. Project/Component Working Name:

     Atheros/Attansic Ethernet Gigbit Ethernet Driver

   1.2. Name of Document Author/Supplier:

    Saurabh Misra


2. Project Summary
   2.1. Project Description:
    This driver will support Atheros/Attansic L1E chips
   a.k.a (Atheros AR8121/AR8113/AR8114 PCIe Ethernet)

3. Business Summary

    These NICs are found in many laptops like Acer Aspire One 150
    netbook and ASUS motherboards. For instance - ASUS EeePC or P5Q
    series of ASUS motherboards.

   3.2. Market/Requester:

    See CR 6736491.

4. Technical Description:
    4.1. Details:

    We would like to add a new device driver "atge" for Atheros
    AR8121/AR8113/AR8114 PCIe Ethernet.

    Our plan is to add support for "pciex1969,1026" (L1E).

    The atge driver can easily be extended to add support for L1
    (0x1048) and L2 (0x2048) chips. We are not adding the support
    because we don't have access to hardware.

    We referred to FreeBSD version of these drivers for
    register specifications. The register specification on these
    three chips (L1, L2 and L1E) is quite similar and hence a
    common header file is being created to facilitate adding support
    for L1 and L2 chips later.

    Since this chip is only found on x86 motherboards, we are
    electing not to deliver a SPARC binary at this time.
    However, the code is designed in an architectural neutral
    way, so if a need for SPARC support were identified, it
    should be relatively easy to add it.

    The driver supports Suspend/Resume, Quiesce and it
    uses MII layer for PHY operations.

    4.2. Bug/RFE Number(s):

    RFE 6736491.

    4.6. Doc Impact:

    manpage for atge(7D) will be created.

    4.10. Packaging & Delivery:

    SUNWatge


5. Reference Documents:

    - FreeBSD ale driver.
    - PSARC 2009/319 MII & GMII Common Layer 

6. Resources and Schedule
    6.4. Steering Committee requested information
        6.4.1. Consolidation C-team Name:
                ON
    6.5. ARC review type: Automatic
    6.6. ARC Exposure: open


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