From d9cbdc88c3817f5d9ceefc80c1c56f18519f225d Mon Sep 17 00:00:00 2001
From: Takashi Menjo <takashi.menjou.vg@hco.ntt.co.jp>
Date: Thu, 6 Jan 2022 15:18:46 +0900
Subject: [PATCH v7 11/15] Fix typo in comment

This may melt into "Ensure WAL mappings before assertion".
---
 src/backend/access/transam/xlog.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/backend/access/transam/xlog.c b/src/backend/access/transam/xlog.c
index f0d7a317d2..fa0c605ff7 100644
--- a/src/backend/access/transam/xlog.c
+++ b/src/backend/access/transam/xlog.c
@@ -1948,7 +1948,7 @@ GetXLogBuffer(XLogRecPtr ptr, TimeLineID tli)
 		/*
 		 * Ensure WAL mappings before assersion.
 		 *
-		 * cachedPos should be recaluculated because it has been probably
+		 * cachedPos should be recalculated because it has been probably
 		 * invalidated due to WAL remapping. This should be done even if
 		 * openLogSegNo seems not to change because the address of the
 		 * mapping could have changed (ABA problem).
-- 
2.25.1

