From b274b92ece9d48f0c9f25cfdddd0a15ad95f2c2f Mon Sep 17 00:00:00 2001 From: Greg Burd Date: Sat, 22 Nov 2025 16:15:42 -0500 Subject: [PATCH v2 2/2] Fix Win11/MSVC/ARM64 atomic intrinsics Add complier flags that ensure proper generation of atomic intrinsic code for the ARM64 platform. Also update the S_UNLOCK() macro to have a CPU barrier rather than compiler barrier that prevents memory reordering. --- meson.build | 5 +++++ src/include/storage/s_lock.h | 3 ++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/meson.build b/meson.build index 49412364669..b5d141853e0 100644 --- a/meson.build +++ b/meson.build @@ -2154,6 +2154,11 @@ endforeach if cc.get_id() == 'msvc' + # Add ARM64 architecture flag for Windows 11 ARM64 for correct intrensics + if host_machine.system() == 'windows' and host_machine.cpu_family() == 'aarch64' + add_project_arguments('/arch:armv9.4', language: ['c', 'cpp']) + endif + cflags_warn += [ # Warnings to disable: # from /W1: diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h index be7aaf6b013..fd4ae992dce 100644 --- a/src/include/storage/s_lock.h +++ b/src/include/storage/s_lock.h @@ -611,6 +611,7 @@ typedef LONG slock_t; * For Arm64, use __isb intrinsic. See aarch64 inline assembly definition for details. */ #ifdef _M_ARM64 + static __forceinline void spin_delay(void) { @@ -640,7 +641,7 @@ spin_delay(void) #pragma intrinsic(_ReadWriteBarrier) #define S_UNLOCK(lock) \ - do { _ReadWriteBarrier(); (*(lock)) = 0; } while (0) + do { __dmb(_ARM64_BARRIER_SY); (*(lock)) = 0; } while (0) #endif -- 2.52.0.windows.1