diff -r a5b94c79e115 pypy/jit/backend/ppc/ppcgen/ppc_assembler.py --- a/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py Mon Aug 15 17:00:00 2011 +0200 +++ b/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py Mon Aug 15 11:30:21 2011 -0400 @@ -613,6 +613,8 @@ def srwi(self, rA, rS, n): self.rlwinm(rA, rS, 32-n, n, 31) + def sldi(self, rA, rS, n): + self.rldicr(rA, rS, n, 63-n) # F.5 Simplified Mnemonics for Branch Instructions @@ -881,6 +883,15 @@ return -((v ^ 0xFFFF) + 1) # "sign extend" to 32 bits return v +def highest(w): + return w >> 48 + +def higher(w): + return (w >> 32) & 0x0000FFFF + +def high(w): + return (w >> 16) & 0x0000FFFF + class PPCBuilder(PPCAssembler): def __init__(self): PPCAssembler.__init__(self) @@ -897,6 +908,13 @@ self.load_word(10, addr) self.stw(source_reg, 10, 0) + def load_dword(self, rD, dword): + self.addis(rD, 0, highest(dword)) + self.ori(rD, rD, higher(dword)) + self.sldi(rD, rD, 32) + self.oris(rD, rD, high(dword)) + self.ori(rD, rD, lo(dword)) + # translate a trace operation to corresponding machine code def build_op(self, trace_op, cpu): opnum = trace_op.getopnum() diff -r a5b94c79e115 pypy/jit/backend/ppc/ppcgen/ppc_field.py --- a/pypy/jit/backend/ppc/ppcgen/ppc_field.py Mon Aug 15 17:00:00 2011 +0200 +++ b/pypy/jit/backend/ppc/ppcgen/ppc_field.py Mon Aug 15 11:30:21 2011 -0400 @@ -86,7 +86,7 @@ class mbe(Field): def encode(self, value): value = (value & 31) << 1 | (value & 32) >> 5 - return super(spr, self).encode(value) + return super(mbe, self).encode(value) def decode(self, inst): value = super(mbe, self).decode(inst) return (value & 1) << 5 | (value >> 1 & 31) @@ -94,9 +94,9 @@ class sh(Field): def encode(self, value): value = (value & 31) << 10 | (value & 32) >> 5 - return super(spr, self).encode(value) + return super(sh, self).encode(value) def decode(self, inst): - value = super(mbe, self).decode(inst) + value = super(sh, self).decode(inst) return (value & 32) << 5 | (value >> 10 & 31) # other special fields?