Some guests only have, or additionally have, 64-bit vectors.
For example arm, mips, sparc. So it's best to enable this
whenever we can. As with tcg/i386, use 64-bit loads and stores
but 128-bit vector registers.
If LASX is available (all current loongarch64 cpus?), we have
256-bit vectors as well. Useful for guests that support such
things, e.g. aarch64, i386, and loongarch64 itself.
r~
Richard Henderson (18):
tcg/loongarch64: Import LASX, FP insns
tcg/loongarch64: Use fp load/store for I32 and I64 into vector regs
tcg/loongarch64: Handle i32 and i64 moves between gr and fr
tcg/loongarch64: Support TCG_TYPE_V64
util/loongarch64: Detect LASX vector support
tcg/loongarch64: Simplify tcg_out_dup_vec
tcg/loongarch64: Support LASX in tcg_out_dup_vec
tcg/loongarch64: Support LASX in tcg_out_dupm_vec
tcg/loongarch64: Use tcg_out_dup_vec in tcg_out_dupi_vec
tcg/loongarch64: Support LASX in tcg_out_dupi_vec
tcg/loongarch64: Simplify tcg_out_addsub_vec
tcg/loongarch64: Support LASX in tcg_out_addsub_vec
tcg/loongarch64: Split out vdvjvk in tcg_out_vec_op
tcg/loongarch64: Support LASX in tcg_out_{mov,ld,st}
tcg/loongarch64: Remove temp_vec from tcg_out_vec_op
tcg/loongarch64: Split out vdvjukN in tcg_out_vec_op
tcg/loongarch64: Support LASX in tcg_out_vec_op
tcg/loongarch64: Enable v256 with LASX
host/include/loongarch64/host/cpuinfo.h | 1 +
tcg/loongarch64/tcg-target.h | 4 +-
util/cpuinfo-loongarch.c | 1 +
tcg/loongarch64/tcg-insn-defs.c.inc | 6181 ++++++++---------------
tcg/loongarch64/tcg-target.c.inc | 575 ++-
5 files changed, 2461 insertions(+), 4301 deletions(-)
--
2.34.1
