Overview ========= Implemented MPIPL (Memory Preserving IPL, aka fadump) on PowerNV machine in QEMU.
Note: It's okay if this isn't merged as there might be less users. Sending for archieval purpose, as the patches can be referred for how fadump/mpipl can be implemented in baremetal/PowerNV/any other arch QEMU. Fadump is an alternative dump mechanism to kdump, in which we the firmware does a memory preserving boot, and the second/crashkernel is booted fresh like a normal system reset, instead of the crashed kernel loading the second/crashkernel in case of kdump. MPIPL in PowerNV, is similar to fadump in Pseries. The idea is same, memory preserving, where in PowerNV we are assisted by SBE (Self Boot Engine) & Hostboot, while in Pseries we are assisted by PHyp (Power Hypervisor) For implementing in baremetal/powernv QEMU, we need to export a "ibm,opal/dump" node in the device tree, to tell the kernel we support MPIPL Once kernel sees the support, and "fadump=on" is passed on commandline, kernel will register memory regions to preserve with Skiboot. Kernel sends these data using OPAL calls, after which skiboot/opal saves the memory region details to MDST and MDDT tables (S-source, D-destination) Skiboot then triggers the "S0 Interrupt" to the SBE (Self Boot Engine), along with OPAL's relocated base address. SBE then stops all core clocks, and only does particular ISteps for a memory preserving boot. Then, hostboot comes up, and with help of the relocated base address, it accesses MDST & MDDT tables (S-source and D-destination), and preserves the memory regions according to the data in these tables. And after preserving, it writes the preserved memory region details to MDRT tables (R-Result), for the kernel to know where/whether a memory region is preserved. Both SBE's and hostboot responsiblities have in implemented in the SBE code in QEMU. Then in the second kernel/crashkernel boot, OPAL passes the "mpipl-boot" property for the kernel to know that a dump is active, which kernel then exports in /proc/vmcore Git Tree for Testing ==================== https://github.com/adi-g15-ibm/qemu/tree/fadump-powernv-v2 Aditya Gupta (9): hw/ppc: Move SBE host doorbell function to top of file hw/ppc: Implement S0 SBE interrupt as cpu_pause then host reset hw/ppc: Handle stash command in PowerNV SBE pnv/mpipl: Preserve memory regions as per MDST/MDDT tables pnv/mpipl: Preserve CPU registers after crash pnv/mpipl: Set thread entry size to be allocated by firmware pnv/mpipl: Write the preserved CPU and MDRT state pnv/mpipl: Enable MPIPL support tests/functional: Add test for MPIPL in PowerNV hw/ppc/meson.build | 1 + hw/ppc/pnv.c | 90 ++++++ hw/ppc/pnv_mpipl.c | 388 ++++++++++++++++++++++++++ hw/ppc/pnv_sbe.c | 74 ++++- include/hw/ppc/pnv.h | 7 + include/hw/ppc/pnv_mpipl.h | 167 +++++++++++ tests/functional/ppc64/test_fadump.py | 35 +-- 7 files changed, 731 insertions(+), 31 deletions(-) create mode 100644 hw/ppc/pnv_mpipl.c create mode 100644 include/hw/ppc/pnv_mpipl.h -- 2.52.0
