From: Arun Menon <[email protected]> - Add new fields to the CRB Interface Identifier and the CRB Control Start registers. - CRB_CTRL_START now has 2 new settings, that can be toggled using the nextChunk and crbRspRetry bits. - CapCRBChunk bit (10) was Reserved1 previously. The field is reused in this revision of the specification. Refer to section 6.4.2.2 of [1] - Add hw_compat global property called cap-chunk because the chunking feature is only supported for machine type 11.1 and higher.
[1] https://trustedcomputinggroup.org/wp-content/uploads/PC-Client-Specific-Platform-TPM-Profile-for-TPM-2p0-v1p07_Pub.pdf Signed-off-by: Arun Menon <[email protected]> Reviewed-by: Stefan Berger <[email protected]> Reviewed-by: Marc-André Lureau <[email protected]> --- hw/core/machine.c | 4 +++- hw/tpm/tpm_crb.c | 6 ++++++ include/hw/acpi/tpm.h | 5 ++++- 3 files changed, 13 insertions(+), 2 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 1abc8ae737..6d27cf69a2 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -38,7 +38,9 @@ #include "hw/acpi/generic_event_device.h" #include "qemu/audio.h" -GlobalProperty hw_compat_11_0[] = {}; +GlobalProperty hw_compat_11_0[] = { + { "tpm-crb", "cap-chunk", "off"}, +}; const size_t hw_compat_11_0_len = G_N_ELEMENTS(hw_compat_11_0); GlobalProperty hw_compat_10_2[] = { diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index 8723536f93..9555b2c62d 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -45,6 +45,8 @@ struct CRBState { bool ppi_enabled; TPMPPI ppi; + + bool cap_chunk; }; typedef struct CRBState CRBState; @@ -59,6 +61,7 @@ DECLARE_INSTANCE_CHECKER(CRBState, CRB, #define CRB_INTF_CAP_FIFO_NOT_SUPPORTED 0b0 #define CRB_INTF_CAP_CRB_SUPPORTED 0b1 #define CRB_INTF_IF_SELECTOR_CRB 0b1 +#define CRB_INTF_CAP_CRB_CHUNK 0b1 #define CRB_CTRL_CMD_SIZE (TPM_CRB_ADDR_SIZE - A_CRB_DATA_BUFFER) @@ -229,6 +232,7 @@ static const VMStateDescription vmstate_tpm_crb = { static const Property tpm_crb_properties[] = { DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe), DEFINE_PROP_BOOL("ppi", CRBState, ppi_enabled, true), + DEFINE_PROP_BOOL("cap-chunk", CRBState, cap_chunk, true), }; static void tpm_crb_reset(void *dev) @@ -262,6 +266,8 @@ static void tpm_crb_reset(void *dev) CapCRB, CRB_INTF_CAP_CRB_SUPPORTED); ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID, InterfaceSelector, CRB_INTF_IF_SELECTOR_CRB); + ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID, + CapCRBChunk, s->cap_chunk ? CRB_INTF_CAP_CRB_CHUNK : 0); ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID, RID, 0b0000); ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID2, diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h index d2bf6637c5..6eece21397 100644 --- a/include/hw/acpi/tpm.h +++ b/include/hw/acpi/tpm.h @@ -149,7 +149,7 @@ REG32(CRB_INTF_ID, 0x30) FIELD(CRB_INTF_ID, InterfaceVersion, 4, 4) FIELD(CRB_INTF_ID, CapLocality, 8, 1) FIELD(CRB_INTF_ID, CapCRBIdleBypass, 9, 1) - FIELD(CRB_INTF_ID, Reserved1, 10, 1) + FIELD(CRB_INTF_ID, CapCRBChunk, 10, 1) FIELD(CRB_INTF_ID, CapDataXferSizeSupport, 11, 2) FIELD(CRB_INTF_ID, CapFIFO, 13, 1) FIELD(CRB_INTF_ID, CapCRB, 14, 1) @@ -168,6 +168,9 @@ REG32(CRB_CTRL_STS, 0x44) FIELD(CRB_CTRL_STS, tpmIdle, 1, 1) REG32(CRB_CTRL_CANCEL, 0x48) REG32(CRB_CTRL_START, 0x4C) + FIELD(CRB_CTRL_START, Start, 0, 1) + FIELD(CRB_CTRL_START, crbRspRetry, 1, 1) + FIELD(CRB_CTRL_START, nextChunk, 2, 1) REG32(CRB_INT_ENABLED, 0x50) REG32(CRB_INT_STS, 0x54) REG32(CRB_CTRL_CMD_SIZE, 0x58) -- 2.53.0
