We can reuse the helper introduced along with VECTOR LOAD TO BLOCK
BOUNDARY. We just have to take care of converting the highest index into
a length.
Signed-off-by: David Hildenbrand <da...@redhat.com>
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate.c | 7 +++++++
target/s390x/translate_vx.inc.c | 13 +++++++++++++
3 files changed, 22 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index 1594366d7e..2a9ac9cebc 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -1008,6 +1008,8 @@
F(0xe722, VLVG, VRS_b, V, la2, r3, 0, 0, vlvg, 0, IF_VEC)
/* VECTOR LOAD VR FROM GRS DISJOINT */
F(0xe762, VLVGP, VRR_f, V, r2, r3, 0, 0, vlvgp, 0, IF_VEC)
+/* VECTOR LOAD WITH LENGTH */
+ F(0xe737, VLL, VRS_b, V, la2, r3_32u, 0, 0, vll, 0, IF_VEC)
#ifndef CONFIG_USER_ONLY
/* COMPARE AND SWAP AND PURGE */
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 56c146f91e..b43de96429 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -5797,6 +5797,13 @@ static void in2_r3_sr32(DisasContext *s, DisasFields *f,
DisasOps *o)
}
#define SPEC_in2_r3_sr32 0
+static void in2_r3_32u(DisasContext *s, DisasFields *f, DisasOps *o)
+{
+ o->in2 = tcg_temp_new_i64();
+ tcg_gen_ext32u_i64(o->in2, regs[get_field(f, r3)]);
+}
+#define SPEC_in2_r3_32u 0
+
static void in2_r2_32s(DisasContext *s, DisasFields *f, DisasOps *o)
{
o->in2 = tcg_temp_new_i64();
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index 93cbc9328f..37f312fbb4 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -468,3 +468,16 @@ static DisasJumpType op_vlvgp(DisasContext *s, DisasOps *o)
write_vec_element_i64(o->in2, get_field(s->fields, v1), 1, MO_64);
return DISAS_NEXT;
}
+
+static DisasJumpType op_vll(DisasContext *s, DisasOps *o)
+{
+ const int v1_offs = vec_full_reg_offset(get_field(s->fields, v1));
+ TCGv_ptr a0 = tcg_temp_new_ptr();
+
+ /* convert highest index into an actual length */
+ tcg_gen_addi_i64(o->in2, o->in2, 1);
+ tcg_gen_addi_ptr(a0, cpu_env, v1_offs);
+ gen_helper_vll(cpu_env, a0, o->addr1, o->in2);
+ tcg_temp_free_ptr(a0);
+ return DISAS_NEXT;
+}
--
2.17.2
