Use the Clock API to model the I/O clock. As we don't model the Clock Control Unit, the XTAL is its unique clock source.
Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> --- hw/avr/atmega.h | 2 ++ hw/avr/atmega.c | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/hw/avr/atmega.h b/hw/avr/atmega.h index 0928cb0ce6..c91317107f 100644 --- a/hw/avr/atmega.h +++ b/hw/avr/atmega.h @@ -14,6 +14,7 @@ #include "hw/char/avr_usart.h" #include "hw/timer/avr_timer16.h" #include "hw/misc/avr_power.h" +#include "hw/clock.h" #include "target/avr/cpu.h" #define TYPE_ATMEGA_MCU "ATmega" @@ -35,6 +36,7 @@ typedef struct AtmegaMcuState { /*< public >*/ AVRCPU cpu; + Clock *ioclk; MemoryRegion flash; MemoryRegion eeprom; MemoryRegion sram; diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c index 7131224431..9d814de499 100644 --- a/hw/avr/atmega.c +++ b/hw/avr/atmega.c @@ -15,6 +15,7 @@ #include "exec/memory.h" #include "exec/address-spaces.h" #include "sysemu/sysemu.h" +#include "hw/qdev-clock.h" #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "hw/boards.h" /* FIXME memory_region_allocate_system_memory for sram */ @@ -231,6 +232,9 @@ static void atmega_realize(DeviceState *dev, Error **errp) error_setg(errp, "\"xtal-frequency-hz\" property must be provided."); return; } + s->ioclk = qdev_init_clock_out(dev, "ioclk"); + /* Clock Control Unit not implemented: directly distribute from xtal */ + clock_set_hz(s->ioclk, s->xtal_freq_hz); /* CPU */ object_initialize_child(OBJECT(dev), "cpu", &s->cpu, mc->cpu_type); -- 2.21.3