On 7/31/21 4:41 PM, Philippe Mathieu-Daudé wrote: > Per the "Godson-2E User Manual v0.6", the Loongson 2E processor > does not implement the MOVZ/MOVN instructions
I'm confused because I can't find MOVZ/MOVN in the 2E manual and the 2F explicits the difference. However looking at binutils, these opcodes are also emited on the 2E: https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=350cc38db21f1cd651a6d46687542a0fce5e0303;hp=569502941afa825c5278b320ccedeefc82e8ed0e Cc'ing Mark & Maciej in case they can enlighten me, and few Loongson develeper in case they could check, because I don't have 2E hardware to test. > However it's enhanced version, the STLS2F01 processor, does. > See STLS2F01 User Manual (rev 1), chapter 13.1 "The compliance > overview": > > The STLS2F01 processor implements several special MIPS IV > instructions as the supplement to the MIPS III instructions. > These instructions include two MIPS IV instructions (i.e. MOVZ > and MOVNZ) ... > > Fixes: aa8f40090ab ("target-mips: enable movn/movz on loongson 2E & 2F") > Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> > --- > target/mips/tcg/translate.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c > index bf71724f3f0..34a96159d15 100644 > --- a/target/mips/tcg/translate.c > +++ b/target/mips/tcg/translate.c > @@ -14156,8 +14156,7 @@ static void decode_opc_special_legacy(CPUMIPSState > *env, DisasContext *ctx) > switch (op1) { > case OPC_MOVN: /* Conditional move */ > case OPC_MOVZ: > - check_insn(ctx, ISA_MIPS4 | ISA_MIPS_R1 | > - INSN_LOONGSON2E | INSN_LOONGSON2F); > + check_insn(ctx, ISA_MIPS4 | ISA_MIPS_R1 | INSN_LOONGSON2F); > gen_cond_move(ctx, op1, rd, rs, rt); > break; > case OPC_MFHI: /* Move from HI/LO */ >
