--- rtnet-0.9.6/drivers/rt_eepro100.c.orig	Fri Oct 20 12:35:44 2006
+++ rtnet-0.9.6/drivers/rt_eepro100.c	Fri Oct 20 13:03:48 2006
@@ -382,6 +382,7 @@
    All accesses need not be longword aligned. */
 enum speedo_offsets {
 	SCBStatus = 0, SCBCmd = 2,	/* Rx/Command Unit command and status. */
+	SCBIntmask = 3,
 	SCBPointer = 4,				/* General purpose pointer. */
 	SCBPort = 8,				/* Misc. commands and operands.  */
 	SCBflash = 12, SCBeeprom = 14, /* EEPROM and flash memory control. */
@@ -1647,7 +1648,21 @@
 				   rtdev->name, status);
 
 		if ((status & 0xfc00) == 0)
-			break;
+			goto irq_out;
+
+        {
+            /* Disable interrupts at the hardware by setting the M (mask) bit
+             * in the adapter's CSR SCB command word.
+             * It also clear/ack interrupts.
+             * See: e100 driver
+             * */
+            unsigned short intr_status;
+
+            outb(1, ioaddr + SCBIntmask);
+            intr_status = inw(ioaddr + SCBStatus);
+            outw(intr_status, ioaddr + SCBStatus);
+            inw(ioaddr + SCBStatus);
+        }
 
 		/* Always check if all rx buffers are allocated.  --SAW */
 		speedo_refill_rx_buffers(rtdev, 0);
@@ -1744,7 +1759,8 @@
 			outw(0xfc00, ioaddr + SCBStatus);
 			break;
 		}
-	} while (1);
+	}
+        while (0);
 
 	if (speedo_debug > 3)
 		rtdm_printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
@@ -1753,6 +1769,16 @@
 	clear_bit(0, (void*)&sp->in_interrupt);
 	if (packets > 0)
 		rt_mark_stack_mgr(rtdev);
+
+    {
+        /* Sets interrupts at the hardware by resetting
+         * the M (mask) bit in the adapter's CSR SCB command word
+         * */
+        outb(0, ioaddr + SCBIntmask);
+        inw(ioaddr + SCBStatus);
+
+    }
+irq_out:        
 	return RTDM_IRQ_HANDLED;
 }