Re: gEDA-user: Hidden rectangle in PCB causing headaches
Hugo, Thanks for filling in some other cases that the DRC might handle better. In fact, we ran across the last case you describe below on this same design. Joe Hugo Elias wrote: > We've just completed a board which had us scratching our heads when we ran the DRC. We also found problems in the gerber output. Hi Joe, I've been having similar nightmares with the DRC. The other problem is when you have 2 rectangles exactly touching (with zero gap between them). I have also thought about a couple of ways the DRC interface could be improved. As far as I understand it, a DRC error is always between exactly 2 objects? EG 2 track segments, or a via and a poly. Is this correct? So, basically, the user needs to be able to identify exactly which two objects, even if they are invisible 1. It would be very helpful if the DRC could tell you in the log which layer(s) the two offending objects were on. 2. instead of colouring in a whole load of things in green, and something in cyan. Why not outline the two objects with a dashed outline or something. Then the user would immediately be able to see. 3. Instead of saying in the log "copper areas too close". Why not say something like "via too close to track" for example. The other thing that can *really* get you is when a track is accidently 'joined' to a rectangle nearby, even though it doesn't look like it. I.E. the track is between two other tracks which clear the rectangle, but the rectangle overlaps the joined track. This causes PCB to think there's a short, even though there isn't. Hugo Elias ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Hidden rectangle in PCB causing headaches
3. Instead of saying in the log "copper areas too close". Why not say something like "via too close to track" for example. Or better still, "via too close to track on layer 3" perfect! Hugo ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Hidden rectangle in PCB causing headaches
On Thu, Aug 24, 2006 at 11:16:19AM +0100, Hugo Elias wrote: > > 3. Instead of saying in the log "copper areas too close". Why not say > something like "via too close to track" for example. Or better still, "via too close to track on layer 3" - Larry ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Bill of Materials Script
On 8/24/06, Patrick Doyle <[EMAIL PROTECTED]> wrote: Are the Freedog meetings announced anywhere? Yes. On this list. If not, do they follow a regular schedule of the 4th Wednesday of every month? It is usually the first Wednesday or Thursday of the month. It changes based on schedules. We happen to meet on Wednesday morning at 8AM because Peter Long, from Cambridge University, was visiting. IOW, I would like to attend a meeting, how does one obtain an invitation? :-) Everyone is welcome. Free Dog is an association of like-minded hackers and engineers interested in free and open EDA tools. We hold monthly meetings near MIT (and other locations) featuring informal networking, speakers, and camaraderie. Our goals are to learn more about CAD, engineering and scientific software, share ideas about our current projects, and -- most importantly -- have fun with like-minded people. We welcome new members and participants of all ages. Students are particularly welcome. (* jcl *) -- http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Hidden rectangle in PCB causing headaches
> We've just completed a board which had us scratching our heads when we ran the DRC. We also found problems in the gerber output. Hi Joe, I've been having similar nightmares with the DRC. The other problem is when you have 2 rectangles exactly touching (with zero gap between them). I have also thought about a couple of ways the DRC interface could be improved. As far as I understand it, a DRC error is always between exactly 2 objects? EG 2 track segments, or a via and a poly. Is this correct? So, basically, the user needs to be able to identify exactly which two objects, even if they are invisible 1. It would be very helpful if the DRC could tell you in the log which layer(s) the two offending objects were on. 2. instead of colouring in a whole load of things in green, and something in cyan. Why not outline the two objects with a dashed outline or something. Then the user would immediately be able to see. 3. Instead of saying in the log "copper areas too close". Why not say something like "via too close to track" for example. The other thing that can *really* get you is when a track is accidently 'joined' to a rectangle nearby, even though it doesn't look like it. I.E. the track is between two other tracks which clear the rectangle, but the rectangle overlaps the joined track. This causes PCB to think there's a short, even though there isn't. Hugo Elias ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Bill of Materials Script
On 8/23/06, John Luciani <[EMAIL PROTECTED]> wrote: At the 23 August 2006 Freedog meeting we reviewed some output from my Are the Freedog meetings announced anywhere? If not, do they follow a regular schedule of the 4th Wednesday of every month? IOW, I would like to attend a meeting, how does one obtain an invitation? :-) --wpd ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
