Re: [edk2-devel] [edk2-platforms][PATCH V1 1/1] Platform/Sgi: Remove SLC entry from PPTT table
On Wed, 20 Apr 2022 at 09:45, Pranav Madhu wrote: > > Hi Ard, > > Please find my response inline. > > > -Original Message- > > From: Ard Biesheuvel > > Sent: Wednesday, April 20, 2022 1:05 PM > > To: Pranav Madhu > > Cc: edk2-devel-groups-io ; Ard Biesheuvel > > ; Sami Mujawar > > Subject: Re: [edk2-platforms][PATCH V1 1/1] Platform/Sgi: Remove SLC entry > > from PPTT table > > > > On Mon, 18 Apr 2022 at 10:14, Pranav Madhu > > wrote: > > > > > > Remove system level cache (SLC) entry from ACPI PPTT table. SLC on the > > > Neoverse reference design platforms is the memory side cache and so it > > > is removed from PPTT table. > > > > > > > Could you elaborate? Why does the former justify/imply the latter? > > The SLC cache in Neoverse reference design is not a processor resource, > instead it is an interconnect resource. As PPTT is used to describe the > processor topology and processor resources, it is better to remove the SLC > cache from PPTT and the best place for SLC is HMAT/SRAT tables. > OK, thanks for the clarification. Pushed as 6b05b8acd60a..df5e094ef347 > > > > > Signed-off-by: Pranav Madhu > > > --- > > > Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 4 +--- > > > Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc | 24 > > > +++- > > > Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Pptt.aslc | 20 +++- > > > Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Pptt.aslc | 23 > > > +++--- > > - > > > Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc | 21 > > > - > > > Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Pptt.aslc | 21 > > > - > > > Platform/ARM/SgiPkg/AcpiTables/RdV1/Pptt.aslc | 21 > > > - > > > Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Pptt.aslc | 23 > > > --- > > > 8 files changed, 26 insertions(+), 131 deletions(-) > > > > > > Link to github branch for this patch - > > > https://github.com/Pranav-Madhu/edk2-platforms/tree/topics/remove_slc_ > > > from_pptt > > > > > <...> > > Regards, > Pranav > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#89480): https://edk2.groups.io/g/devel/message/89480 Mute This Topic: https://groups.io/mt/90535814/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms][PATCH V1 1/1] Platform/Sgi: Remove SLC entry from PPTT table
Hi Ard, Please find my response inline. > -Original Message- > From: Ard Biesheuvel > Sent: Wednesday, April 20, 2022 1:05 PM > To: Pranav Madhu > Cc: edk2-devel-groups-io ; Ard Biesheuvel > ; Sami Mujawar > Subject: Re: [edk2-platforms][PATCH V1 1/1] Platform/Sgi: Remove SLC entry > from PPTT table > > On Mon, 18 Apr 2022 at 10:14, Pranav Madhu > wrote: > > > > Remove system level cache (SLC) entry from ACPI PPTT table. SLC on the > > Neoverse reference design platforms is the memory side cache and so it > > is removed from PPTT table. > > > > Could you elaborate? Why does the former justify/imply the latter? The SLC cache in Neoverse reference design is not a processor resource, instead it is an interconnect resource. As PPTT is used to describe the processor topology and processor resources, it is better to remove the SLC cache from PPTT and the best place for SLC is HMAT/SRAT tables. > > > Signed-off-by: Pranav Madhu > > --- > > Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 4 +--- > > Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc | 24 > > +++- > > Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Pptt.aslc | 20 +++- > > Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Pptt.aslc | 23 +++--- > - > > Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc | 21 - > > Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Pptt.aslc | 21 - > > Platform/ARM/SgiPkg/AcpiTables/RdV1/Pptt.aslc | 21 - > > Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Pptt.aslc | 23 > > --- > > 8 files changed, 26 insertions(+), 131 deletions(-) > > > > Link to github branch for this patch - > > https://github.com/Pranav-Madhu/edk2-platforms/tree/topics/remove_slc_ > > from_pptt > > <...> Regards, Pranav -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#89121): https://edk2.groups.io/g/devel/message/89121 Mute This Topic: https://groups.io/mt/90535814/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms][PATCH V1 1/1] Platform/Sgi: Remove SLC entry from PPTT table
On Mon, 18 Apr 2022 at 10:14, Pranav Madhu wrote:
>
> Remove system level cache (SLC) entry from ACPI PPTT table. SLC on the
> Neoverse reference design platforms is the memory side cache and so it
> is removed from PPTT table.
>
Could you elaborate? Why does the former justify/imply the latter?
> Signed-off-by: Pranav Madhu
> ---
> Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 4 +---
> Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc | 24 +++-
> Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Pptt.aslc | 20 +++-
> Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Pptt.aslc | 23 +++
> Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc | 21 -
> Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Pptt.aslc | 21 -
> Platform/ARM/SgiPkg/AcpiTables/RdV1/Pptt.aslc | 21 -
> Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Pptt.aslc | 23 ---
> 8 files changed, 26 insertions(+), 131 deletions(-)
>
> Link to github branch for this patch -
> https://github.com/Pranav-Madhu/edk2-platforms/tree/topics/remove_slc_from_pptt
>
> diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> index d75d54055436..e9b6923cb035 100644
> --- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> +++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> @@ -68,10 +68,8 @@ typedef struct {
> // PPTT processor package structure
> typedef struct {
>EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package;
> - UINT32 ResourceOffset;
> - EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE Slc;
>RD_PPTT_MINIMAL_CLUSTERCluster[CLUSTER_COUNT];
> -} RD_PPTT_SLC_PACKAGE;
> +} RD_PPTT_PACKAGE;
> #pragma pack ()
>
> //
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc
> b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc
> index 3615a11d75b0..0ef9607c0732 100644
> --- a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc
> @@ -8,7 +8,7 @@
> * Each cluster includes a 2MB L3 cache. The platform also includes a system
> * level cache of 8MB.
> *
> -* Copyright (c) 2021, ARM Limited. All rights reserved.
> +* Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
> *
> * SPDX-License-Identifier: BSD-2-Clause-Patent
> *
> @@ -168,28 +168,12 @@
> #define PPTT_PACKAGE_INIT(PackageId)
> \
>{
> \
> EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT (
> \
> - OFFSET_OF (RDE1EDGE_PPTT_PACKAGE, Slc),
> \
> + OFFSET_OF (RDE1EDGE_PPTT_PACKAGE, Cluster[0]),
> \
>PPTT_PROCESSOR_PACKAGE_FLAGS,
> \
>0,
> \
>0,
> \
> - 1
> \
> + 0
> \
> ),
> \
> -
> \
> -/* Offsets of the private resources */
> \
> -OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE,
> \
> - Package.Slc),
> \
> -
> \
> -/* SLC parameters */
> \
> -EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT (
> \
> - PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */
> \
> - 0, /* Next level of cache */
> \
> - SIZE_8MB, /* Size */
> \
> - 8192, /* Num of sets */
> \
> - 16, /* Associativity */
> \
> - PPTT_UNIFIED_CACHE_ATTR,/* Attributes */
> \
> - 64 /* Line size */
> \
> -),
> \
> -
> \
> {
> \
>PPTT_CLUSTER_INIT (PackageId, 0),
> \
>PPTT_CLUSTER_INIT (PackageId, 1),
Re: [edk2-devel] [edk2-platforms][PATCH V1 1/1] Platform/Sgi: Remove SLC entry from PPTT table
On Mon, Apr 18, 2022 at 01:14 AM, Pranav Madhu wrote: > > Remove system level cache (SLC) entry from ACPI PPTT table. SLC on the > Neoverse reference design platforms is the memory side cache and so it > is removed from PPTT table. > > Signed-off-by: Pranav Madhu > --- > Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 4 +--- > Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc | 24 +++= > - > Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Pptt.aslc | 20 +++= > - > Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Pptt.aslc | 23 +++= > > Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc | 21 ---= > -- > Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Pptt.aslc | 21 ---= > -- > Platform/ARM/SgiPkg/AcpiTables/RdV1/Pptt.aslc | 21 ---= > -- > Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Pptt.aslc | 23 ---= > > 8 files changed, 26 insertions(+), 131 deletions(-) Reviewed-by: Thomas Abraham -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#89017): https://edk2.groups.io/g/devel/message/89017 Mute This Topic: https://groups.io/mt/90535814/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms][PATCH V1 1/1] Platform/Sgi: Remove SLC entry from PPTT table
Remove system level cache (SLC) entry from ACPI PPTT table. SLC on the
Neoverse reference design platforms is the memory side cache and so it
is removed from PPTT table.
Signed-off-by: Pranav Madhu
---
Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 4 +---
Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc | 24 +++-
Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Pptt.aslc | 20 +++-
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Pptt.aslc | 23 +++
Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc | 21 -
Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Pptt.aslc | 21 -
Platform/ARM/SgiPkg/AcpiTables/RdV1/Pptt.aslc | 21 -
Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Pptt.aslc | 23 ---
8 files changed, 26 insertions(+), 131 deletions(-)
Link to github branch for this patch -
https://github.com/Pranav-Madhu/edk2-platforms/tree/topics/remove_slc_from_pptt
diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
index d75d54055436..e9b6923cb035 100644
--- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
+++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
@@ -68,10 +68,8 @@ typedef struct {
// PPTT processor package structure
typedef struct {
EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package;
- UINT32 ResourceOffset;
- EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE Slc;
RD_PPTT_MINIMAL_CLUSTERCluster[CLUSTER_COUNT];
-} RD_PPTT_SLC_PACKAGE;
+} RD_PPTT_PACKAGE;
#pragma pack ()
//
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc
b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc
index 3615a11d75b0..0ef9607c0732 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc
@@ -8,7 +8,7 @@
* Each cluster includes a 2MB L3 cache. The platform also includes a system
* level cache of 8MB.
*
-* Copyright (c) 2021, ARM Limited. All rights reserved.
+* Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -168,28 +168,12 @@
#define PPTT_PACKAGE_INIT(PackageId)
\
{
\
EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT (
\
- OFFSET_OF (RDE1EDGE_PPTT_PACKAGE, Slc),
\
+ OFFSET_OF (RDE1EDGE_PPTT_PACKAGE, Cluster[0]),
\
PPTT_PROCESSOR_PACKAGE_FLAGS,
\
0,
\
0,
\
- 1
\
+ 0
\
),
\
-
\
-/* Offsets of the private resources */
\
-OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE,
\
- Package.Slc),
\
-
\
-/* SLC parameters */
\
-EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT (
\
- PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */
\
- 0, /* Next level of cache */
\
- SIZE_8MB, /* Size */
\
- 8192, /* Num of sets */
\
- 16, /* Associativity */
\
- PPTT_UNIFIED_CACHE_ATTR,/* Attributes */
\
- 64 /* Line size */
\
-),
\
-
\
{
\
PPTT_CLUSTER_INIT (PackageId, 0),
\
PPTT_CLUSTER_INIT (PackageId, 1),
\
@@ -219,8 +203,6 @@ typedef struct {
typedef struct {
EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package;
- UINT32 Offset;
- EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE Slc;
RDE1EDGE_PPTT_CLUSTER Cluster[CLUSTER_COUNT];
} RDE1EDGE_PPTT_PACKAGE;
diff --git a/Platform/A
