Re: gEDA-user: spNet v0.9.2 released

2009-07-01 Thread r
On Wed, Jul 1, 2009 at 2:58 AM, Dan McMahill wrote:
>
> how does spNet compare to gnetman which is also an alternative
> hierarchical spice netlister for gschem?

Gnetman is a pretty good piece of software. I wish I knew about it
before. There are some minor glitches in it as well, for example I
can't make it read its own config file (so I had to put all referenced
symbols and schematics in the current directory to see the examples).

It works OOTB with hierarchical schematics, buses, hierarchical
parameters etc. Certainly it's worth looking at, even though it takes
some time to download and build it with its dependencies.

Cheers,
-r.


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Re: gEDA-user: spNet v0.9.2 released

2009-07-01 Thread Stefan Salewski
On Wed, 2009-07-01 at 22:20 +0100, r wrote:
> On Wed, Jul 1, 2009 at 2:58 AM, Dan McMahill wrote:
> >
> > how does spNet compare to gnetman which is also an alternative
> > hierarchical spice netlister for gschem?
> 
> Sorry for silly question, where can I download it?
> 

http://sourceforge.net/search/?type_of_search=soft&words=gnetman

http://spnet.code-fusion.net/




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Re: gEDA-user: spNet v0.9.2 released

2009-07-01 Thread Anthony Shanks
On Wed, Jul 1, 2009 at 2:39 PM, r wrote:
> On Wed, Jul 1, 2009 at 2:30 AM, Anthony Shanks wrote:
>> Yes I know exactly what you mean now and I have seen (and have used)
>> that kind of hierarchy control present in very high end tools (like
>> cadence)
>
> Sorry, I should have guessed you don't need this kind of explanation.
> Looks like we are coming from similar background.
>

No worries, and yeah it sounds like we do.

>> but it is usually at the schematic capture level like you
>> stated rather at the netlister level. gschem would have to drastically
>> change to support that level of hierarchical maniuplation.
>
> That would be great but I wouldn't expect such change to occur any
> time soon. Even if we prepared a patch it would probably have to be
> maintained separately.
>
> Cheers,
> -r.
>

Don't worry, I'm seriously considering implementing this in spNet. I
planned on looking into how difficult this would be tonight and to
think about what the best way to implement this would be.

>
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Re: gEDA-user: spNet v0.9.2 released

2009-07-01 Thread r
On Wed, Jul 1, 2009 at 2:30 AM, Anthony Shanks wrote:
> Yes I know exactly what you mean now and I have seen (and have used)
> that kind of hierarchy control present in very high end tools (like
> cadence)

Sorry, I should have guessed you don't need this kind of explanation.
Looks like we are coming from similar background.

> but it is usually at the schematic capture level like you
> stated rather at the netlister level. gschem would have to drastically
> change to support that level of hierarchical maniuplation.

That would be great but I wouldn't expect such change to occur any
time soon. Even if we prepared a patch it would probably have to be
maintained separately.

Cheers,
-r.


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Re: gEDA-user: spNet v0.9.2 released

2009-07-01 Thread r
On Wed, Jul 1, 2009 at 2:58 AM, Dan McMahill wrote:
>
> how does spNet compare to gnetman which is also an alternative
> hierarchical spice netlister for gschem?

Sorry for silly question, where can I download it?

-r.


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Re: gEDA-user: gnetlist missing features

2009-07-01 Thread Stefan Salewski
On Wed, 2009-07-01 at 11:08 -0700, John P. Doty wrote:
> 
> You've told gnetlist to short PreAmpPD to 3.3V. What happens then is 
> undefined. My experience is that gnetlist's behavior is difficult to 
> predict in such cases: sometimes it chooses one net name over another, 
> and sometimes it leaves the nets unconnected.

Yes, I got no connection when I did this long time ago. And I was
surprised. Not good for beginners.

> 
> The question then is: what is a simple set of logical rules that should 
> govern shorted nets?

I do not really know. I think there was the suggestion to generate a
virtual/hidden net name and connect the nets. 

> 
> The most pressing need here is for gnetlist to detect shorts and warn 
> the user of their resolution.

Yes, a warning would be fine. Maybe gnetlist should connect the nets and
report this to the log window/terminal.

Best regards

Stefan Salewski




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Re: gEDA-user: gnetlist missing features

2009-07-01 Thread John P. Doty
Stefan Salewski wrote:
> There was some discussion about netlist generation on this list
> recently, so maybe it is a good time to speak about missing features:
>
> I have some OpAmps with power down pins (active low) in my schematics, I
> have connected an io symbol to it with an attribute like
> "net=PreAmpPD:1".
>
> If I connect this io symbol (a copy) to an other device, i.e. to a pin
> of an FPGA all is fine. Now I decide this OpAmp should be always on, so
> I make a copy of this io symbols and connect it to a (lonesome) power
> symbol with a net attribute like "net=3.3V:1". So the power symbol and
> one instance of the io symbol are connected to each other, with no
> direct connection to other real hardware. I think this will not work
> correctly, the power down pin of the OpAmp will not be connected to the
> 3.3V rail as desired.
>   

You've told gnetlist to short PreAmpPD to 3.3V. What happens then is 
undefined. My experience is that gnetlist's behavior is difficult to 
predict in such cases: sometimes it chooses one net name over another, 
and sometimes it leaves the nets unconnected. Another example is a 
subcircuit containing a short circuit between two external connections. 
The nets in the higher level schematic don't get connected. But this is 
a perfectly reasonable object when you consider that a subcircuit may 
have different implementations in different versions of a circuit whose 
higher level description doesn't change.

The question then is: what is a simple set of logical rules that should 
govern shorted nets? These should somehow capture the intuitive 
understanding the designer has when drawing such a thing. What is this? 
Is your understanding similar to mine? Are additional attributes needed 
to describe this? Will such attributes be comprehensible to the designer?

The most pressing need here is for gnetlist to detect shorts and warn 
the user of their resolution.
> It would be very nice if this would work -- I think we had a discussion
> about this problem long time ago on the list.
>
> The other topic: There are ICs with multiple power- or output pins for
> low impedances. It would be nice to allow "pinnumber=4,5,6,7" in symbols
> to indicate that this visible power pin in the schematic should indicate
> a connection to pins 4,5,6,7 of the related footprint. (My current
> solution is to make a local copy of the footprint, have "pinnumber=4" in
> the symbol and rename pads 4,5,6,7 to 4,4,4,4 in the footprint and so
> on)
>
> Best wishes,
>
> Stefan Salewski
>
>
>
>
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>
>   


-- 
John Doty  Noqsi Aerospace, Ltd.
http://www.noqsi.com/
j...@noqsi.com 



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gEDA-user: gnetlist missing features

2009-07-01 Thread Stefan Salewski
There was some discussion about netlist generation on this list
recently, so maybe it is a good time to speak about missing features:

I have some OpAmps with power down pins (active low) in my schematics, I
have connected an io symbol to it with an attribute like
"net=PreAmpPD:1".

If I connect this io symbol (a copy) to an other device, i.e. to a pin
of an FPGA all is fine. Now I decide this OpAmp should be always on, so
I make a copy of this io symbols and connect it to a (lonesome) power
symbol with a net attribute like "net=3.3V:1". So the power symbol and
one instance of the io symbol are connected to each other, with no
direct connection to other real hardware. I think this will not work
correctly, the power down pin of the OpAmp will not be connected to the
3.3V rail as desired.

It would be very nice if this would work -- I think we had a discussion
about this problem long time ago on the list.

The other topic: There are ICs with multiple power- or output pins for
low impedances. It would be nice to allow "pinnumber=4,5,6,7" in symbols
to indicate that this visible power pin in the schematic should indicate
a connection to pins 4,5,6,7 of the related footprint. (My current
solution is to make a local copy of the footprint, have "pinnumber=4" in
the symbol and rename pads 4,5,6,7 to 4,4,4,4 in the footprint and so
on)

Best wishes,

Stefan Salewski




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Re: gEDA-user: deprecating gschem2pcb and PCBboard backend (DanMcMahill)

2009-07-01 Thread Peter TB Brett


On Wed, 1 Jul 2009 08:15:17 -0600, KURT PETERS  wrote:
> 
> I'm not only for it; I think it should be DELETED, instead of just
> deprecated.

Agreed!

 Peter



P.S. Kurt, please don't top post. :P

--
Peter Brett 
Remote Sensing Research Group
Surrey Space Centre



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Re: gEDA-user: deprecating gschem2pcb and PCBboard backend (Dan McMahill)

2009-07-01 Thread KURT PETERS

   I'm not only for it; I think it should be DELETED, instead of just
   deprecated.  BTW, what would the process be for executing it when it's
   deprecated.  In other words, would the user get a message saying it's
   deprecated and will go away (Deleted) some time in the future?
   Kurt


   >
   --
   >
   > Message: 1
   > Date: Tue, 30 Jun 2009 18:01:31 -0400
   > From: Dan McMahill 
   > Subject: gEDA-user: deprecating gschem2pcb and PCBboard backend
   > To: gEDA user mailing list 
   > Message-ID: <4a4a8b3b.2090...@mcmahill.net>
   > Content-Type: text/plain; charset=ISO-8859-1; format=flowed
   >
   > Anyone have any objections to deprecating the gschem2pcb script and
   the
   > PCBboard gnetlist backend that is used by that script?
   >
   > As far as I know nobody uses either of those anymore. Note that I'm
   > talking about "gschem2pcb" and *not* "gsch2pcb", the latter being
   what
   > probably everyone uses.
   >
   > Why you ask? Because gschem2pcb doesn't really offer anything that
   > gsch2pcb doesn't and the latter is what's used, developed, and
   > supported. The existence of the former I think just serves to
   confuse
   > new users and PCBboard additionally is there to annoy developers by
   it
   > being in the test suite. The PCBboard backend is very similar to the
   > gsch2pcb backend but again, the latter is seeing development and the
   > former isn't.
   >
   > -Dan


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Re: gEDA-user: RFC: Towards a better symbol/package pin-mapping strategy

2009-07-01 Thread Kai-Martin Knaak
On Wed, 01 Jul 2009 00:22:08 -0400, evan foss wrote:

>> And then offer a GUI to select from the list of footprints within
>> gschem.
> 
> It would be so cool if you could call pcb to render the footprint in a
> little window as a part of that GUI. This might make dependencies a mess
> though.

It doesn't have to be rendered image. A list of preselected footprints 
associated with a symbol would go a long way. Why not support an 
attribute "list-of-footprints" in the symbol? This list could be tuned to 
fit the local combination of symbol and footprint lib.

Protel98 provides this kind of preselected footprints. It was five 
entries maximum and we cursed Altium for this restriction. Consequently, 
I really miss this feature in gschem.

---<(kaimartin)>---
-- 
Kai-Martin Knaak
Öffentlicher PGP-Schlüssel:
http://pgp.mit.edu:11371/pks/lookup?op=get&search=0x6C0B9F53



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