Re: gEDA-user: Adding inner polygons to a plane
> Packages like Altium (which springs to mind), let you define a layer in > terms of its _negative_, so you split up a power plane by defining the > _boundary_ between the two (or more) regions. Negative layers are great for defining planes, especially when you want complex splits...and they don't need to be rendered. The solder mask layer is output to gerber files as a negative layer. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: minipack-result -- gschem
>> By the way, should the lines of the config files be terminated unix style, >> or DOS style? > > Doesn't make any difference either way. I did recently pick up a bug with gschem's postscript output and EOL characters which I must report on launchpad (not related to config files). It seems that if there are DOS style newlines in text in the schematic file, then the postscript output writes a single long line instead of the multi-line text. If the EOL character is Unix style there are no problems. gschem handles and displays it correctly, the problem is only in the postscript output. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: minipack-result -- gschem
> Next step: How do I configure gschem to find my local library? > On my linux box I have these lines in ~/.gEDA/gafrc : Look in C:\Users\username\.gEDA I have my gafrc and gschemrc in there. In gafrc I use the following line, (component-library-search "d:/Projects/sym") i.e. / works perfectly well (as per Peter's reply) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: minipack-result -- gschem
> Okay, the problem is definitely with Guile rather than gschem. Please make > sure that you have its paths set up correctly so that it can find its > Scheme library. I have the following environment variables set in Windows Vista, GEDABIN=D:\Program Files\gEDA\bin GEDADATA=D:\Program Files\gEDA\share\gEDA GUILE_LOAD_PATH=D:\Program Files\gEDA\share\guile\1.8 I also have D:\Program Files\gEDA\bin in the PATH variable. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Where is pcb-20100929 for Win32 ?
> Did you draw a logo graphic in pcb itself using the polygon tool? > > I have really wanted to have decent logo graphics and beautifully > typeset text on my boards, so I have created graphics and text in > Inkscape, exported through pstoedit to pcb, but this has caused issues > because pstoedit is generating some invalid polygons, which crashes most > versions of pcb. I used the Inkscape -> pstoedit -> pcb path and it just worked for me. I manually edited the file to change some of the produced polygons to holes rather than polygons. The logo was fortunately fairly simple (mostly made up of blocks). ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Where is pcb-20100929 for Win32 ?
> I am sorry for the delay. I had problems not related to GEDA PCB. Here are > the links: > pcbinst-1.99z - http://www.unibytes.com/OuH9OEv9hbYB Appears to be working well for me :) Allowing me to add some holes to polygons to sort out a logo on the silk screen - great! It is also wonderful to see some of the little bugs fixed. Thanks everyone for the continuing development. Bob, the zlib license can be found here, http://zlib.net/zlib_license.html ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb-20100929 released
>> It might be worth trying to revert the GTK it builds against to 2.16.x > > Thanks, I'll try that. I thought it might be GTK related. > Hmm, I reverted back to 2.16.6 (which is the same as the previous build), but still having the same problem. Looks like I am going to have to roll back each package and see which one causes the issue. A question in this regard - if I rebuild a library (e.g. gtk+) do I then need to rebuild all the packages which come after it in the build-all.sh script? How exactly do they all related to each other during the build process? Or does the .exe just need to be able to access the dll at runtime? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb-20100929 released
> It might be worth trying to revert the GTK it builds against to 2.16.x Thanks, I'll try that. I thought it might be GTK related. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb-20100929 released
> Please pull from the minipack git repository and try again. Thanks Cesar. I pulled and compiled again and everything built as expected (just ran ./build-all.sh and no manual intervention was required). I copied the "result" directory across to Windows and then ran pcb.exe. Windows came up with a "Windows cannot open this file, please select the program to open the file" for the file ListLibraryContents.sh. If I cancel this, then pcb opens as expected. I can insert parts, draw lines, cut holes (cool), etc. but there is something wrong with the interface. The check marks on the menu items are not visible at all. Also when I try to open a file the file icons in the file explorer window do not appear unless you move the cursor over them. They also then disappear when the cursor moves away from them. In gschem the menus look correct (icons displayed as expected), but the open file dialogue has the same problems. The last time I compiled everything with minipack it worked without any issues (before the pcb-20100929 update). ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb-20100929 released
> For a development release, you would need to run "./autogen.sh" or > autoreconf in the pixman source dir to generate ./configure Did that and now pixman compiles correctly. Next challenge is the glib is failing with this error, configure: error: Could not find a glib-compile-schemas in your PATH I have the libglib-2.0-dev and libglib-2.0-0 packages installed (Xubuntu 10.04). I have been searching around but have not yet found a solution to this. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb-20100929 released
I tried to compile, but came up with the following errors: 1) It could not find the remote files for pixman, so I change the recipe source to http://cgit.freedesktop.org/pixman/snapshot (which worked for the 0.21.6 sources) 2) It fails to build pixman with this message, Configuring pixman... xargs: ./configure: No such file or directory = pixman: Build failed. = I had a look and there is no configure file in the pixman directory, just an autogen.sh Thanks, Duncan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: SC70-6, which is pin 1?
> I'm guessing based off that mark the bottom left pin is pin 1. The > datasheet isn't clear. Does anybody know for sure if thats pin 1? Yes, bottom left is pin 1. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb-20100929 released
> Sure. I'll take the opportunity to update the latest libraries. Thanks, I appreciate that. Thanks also for all the effort you have put into the minipack build system and keeping the gEDA recipes, libraries etc. up to date - I really appreciate it. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb-20100929 released
> After porting pcb_spawnvp (in src/action.c) to Windows, it built fine on > Ubuntu using my cross-compiler build script (minipack). I'll work on a > patch. Fortunately, the Windows API already provides an implementation of > spawnvp. I pulled the latest minipack code from the git repo, but I haven't managed to successfully build the latest PCB snapshot. I noticed the pcb.recipe was still fetching the older snapshot. Would you be able to push the code which builds successfully to the minipack repo? One of the things I keep getting is a error regarding dbus. I added the libdbus-dev package, but still get the error. If I use --disable-dbus then I get an error later on (I'll need to check exactly what the error is). Thanks. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Random thoughts on the future interface of PCB
> I've looked at various commercial boards recently, and it would appear > that many use negative layers to draw tracking. High power stuff, > where practically everything is copper, just with some isolation > between regions. The complexity of the polygons which make up these > traces would be too prohibitive to use PCB's normal polygon tool. > > They _look_ as if someone has drawn negagtive traces to split up a > plane. should we support that? Negative layers would be awesome. Having the mask as an actual negative layer would also be great, and allow some custom things to be done on with the mask (e.g. exposing copper strips along the edge for chassis/shielding connections) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Portable gEDA for Windows
Here is the message with the installer script, http://archives.seul.org/geda/user/Jan-2010/msg00168.html ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Portable gEDA for Windows
> The only other way I can think of (that doesn't introduce dependencies) > involves a collection of Batch files, none of which are particularly > nice Cesar Struass put together a build system for building the binaries for Win32, which works really well. It is fairly easy to cross compile the packages. Peter Clifton also made his installer script available for building a self-installing package, but I'd have to search the archives in more detail for that. You can get minipack from http://repo.or.cz/w/minipack.git ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Simple PCB Question
> It's been a while since I used PCB, but I can't remember one think that does > not > seem to be in the documentation as far as I can tell. > I have a completed layout I would like to make a simple modification to, in > one > area of GND trace I would like to turn it into a polygon for thermal reasons. Mouse over the polygon and press "s" to make it a solid polygon (no clearance). Alternatively you can mouse over the trace and press "j" to remove the clear polygon flag from the line. You will probably want to use "j" on each of the line segments, as you polygon surrounds CONN2. Pressing "s" over the polygon will join all the pins of CONN2 to the polygon. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Specification of Rotations for Auto Assembly
> One of the things I dislike about pcb is the coordinate system: it's > lefthanded, or z+ is going into the > screen instead of pointing out. When exporting to x-y the coordinate system starts in the bottom left of the screen, i.e. with z+ going out of the screen. It would be useful to be able to set the zero when exporting though... ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Specification of Rotations for Auto Assembly
My experience: ask you assembly house. The guys I work with us the fiducial in the bottom right as the zero, and rotations CCW. One issue (big issue) is that components have varying rotations in the reels, so assembly houses prefer to confirm the rotations against a prototype board. IPC-7531 tries to address this, but I don't know how consistent manufacturers are. -- Turn ideas into products - http://www.engineersimplicity.com The Art of Engineering - http://blog.engineersimplicity.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: gschem win32 build and backup files
Hi, I have noticed that the backup files (those that are #my.sch#) are not being deleted when exiting gschem in the win32 build. I assume they are for recovery from a crash and should typically be deleted when exiting? This causes the warning message box to appear when opening the schematic, saying that there is a newer backup. Maybe this is the correct behaviour? The backup files have their permissions set as read-only. This is running a build using the minipack script on Windows Vista. Regards, Duncan -- Turn ideas into products - http://www.engineersimplicity.com The Art of Engineering - http://blog.engineersimplicity.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: dxf dwg viewer?
> can anyone recommend a viewer for these drawings? You can use AutoDesk's free DWG viewer, http://usa.autodesk.com/adsk/servlet/pc/index?id=6703438&siteID=123112 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: suppress command line window in Win32 build
> I've got a patch ready for testing (attached), and if you can confirm it > works, I'll push it to git HEAD once Ales declares the servers are ready > for use again. Working as expected - thanks for that. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: suppress command line window in Win32 build
> Are you building yourself? > > Just add the -mwindows flag to the linker command line and the console > will go away. > > Fixing up the Makefiles to add $(MINGW_GUI_LDFLAGS) to the > gschem_LDFLAGS variables should fix the issue. (And similar for > gattrib). Thanks for the help Peter, I'll have a look at that (I am building it myself). I *really* appreciate the effort you've put in to the Win32 builds, and all the help you've given me with various questions. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: suppress command line window in Win32 build
Hi, Is there a way to suppress the command prompt window in the Win32 builds? Does anyone have any idea what causes that artefact to arise? Thanks, Duncan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Why did some of my pins in pcb turn orange?
> The rule checker seems to think all is OK. It usually indicates a short - pressing "o" and having a look at the log window should tell you what is going on. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Fab, Pick and Place, Stencil
> I think so, but it's unreliable because we just guess. The assembly > house will most likely massage the data anyway. It is actually fairly accurate, but it depends on the component orientation in a reel. The assembly house will definitely massage the data, but they can't necessarily be trusted either... ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: un-tented vias
> I like to have my vias non tented. That is, little holes in the solder mask, > so that some bare metal is exposed. This comes handy for debugging. Is it > possible to configure pcb so that vias are exposed by default? You can select the mask layer and press 'k' the appropriate number of times until the mask clears the via. Just watch out, there is a visual oddity - if you press 'k' once the mask will appear to clear the via in pcb but won't in the output gerbers, you have to press it until the clearance actually clears the via. This can also be done by editing the .pcb file and changing the setting for all the vias. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: input/output ports gschem
> Well I just modified s_netattrib.c in gnetlist to do the assumption, > and seems to work. Could you post the patch? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: input/output ports gschem
> So the question(suggested by DJ) is: How are these input/output > graphical ports supposed to work? Are they merely graphic things, or > does that net attribute have a special/useful function? The "net" attribute has to have a pin number(s) associated with it to work correctly. Have a look at the net attribute howto on the wiki, http://geda.seul.org/wiki/geda:na_howto If the port net was in1, then the attribute should be net=in1:1, which indicates that the net in1 is on pin 1 of the port symbol. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Footprint with asymmetric solder mask
> I would like to create a footprint where the pad is not in the center, and it > is not symmetric for all sides. Unfortunately not. PCB derives the solder mask from the pad and mask clearance. The file format needs to be extended to allow for the type of mask you would like. I think you might be misinterpreting the diagram though. They are indicating that there should be a > 18mm^2 copper plane around the pad which must have solder resist (mask) on it. So set the relevant pads' mask clearance to 0, and place a polygon down around the pad. Remove the clear lines/pads flag by putting your cursor over the polygon and pressing "s" in PCB. Just note that no lines or pads will be cleared by that polygon. What I usually do is make a small polygon/rectangle that fits just around the pad and set that to "solid", and then use a normal polygon around that. HTH, Duncan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gnetlist
> Is there any way to create PCAD netlist with gEDA? In the past I exported a netlist in the tango format which PCAD can import. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Is this type of footprint possible?
> I want to use a component with the attached footprint. > Is it possible to make a footprint with an arc inside? Practically I would approximate the land pattern by creating a pad with three parts, i.e. a pad for each side and then a long rectangular pad across the top to connect them. Make them rectangular pads which stay outside of the 1.80mm diameter. It is unlikely that the small amount of pad area lost will make a difference IMO. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb DRC
> I agree that the new version is great to use and makes it so much easier to > find mistakes! The only thing I miss from the old version is how the > coordinate locations were displayed. When you are working on a big > multilayer board with planes, it can sometimes take a minute to find the > blue or maroon square the picture is showing. Double-clicking moves the cursor to the violation. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: pcb DRC
I am busy completing a board with the latest version of PCB and ran the DRC - the new DRC is awesome! I know it has been around for a while, this is just the first time I've used it and it is such a pleasure compared to the old version. I can actually find the violations quickly and easily. Thanks to all the people who contributed to it. IIRC, thanks especially to Peter C. Regards, Duncan -- Turn ideas into products - http://www.engineersimplicity.com The Art of Engineering - http://blog.engineersimplicity.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
> I'm very bad at following stuff in the sourceforge trackers, partly > since I _HATE_ the sourceforge site with a fiery passion. Why not just move to LaunchPad? If it is set up and all the docs point in that direction then all new bugs/issues will be added there. The SF bugs just need to be worked through slowly until they are all closed (moving them is a waste of energy). Is there some particular developer resistance to LaunchPad? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
> If the senior developers are fed projects and requirements, suitably > discussed and planned, they'd be more likely to work on them. We > currently work on our own desires because we know what we want, to > solve our problems. That sounds nice, but the reality is quite different (understandably). Firstly, who feeds the projects and requirements to the developers? Secondly, raising ideas for discussion often ends (quickly) in the comment, "If you want it, just develop it yourself." In practice developers work on their own projects (because it is fun and fulfilling) and not on user requirements (unless they align). Someone else's requirement is more like work - why do that in your spare time? This situation is perfectly understandable, but it does raise some questions, like, How are projects identified? How are important bugs and feature requirements identified? Do non-developers have a say? (no is a valid answer, someone just needs to decide) What is the forum to constructively discuss ideas and requirements? How should these ideas and requirements be presented? (i.e. raise the bar for presenting ideas so that it is not as simple as sending and email saying "It would be nice if...") What motivates developers to work on projects that are not their own? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
> * A group of non-developers watch for bug reports, either in the > mailing list or the SF tracker. How good are people at actually logging bugs on the SF tracker? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: I am such a troll for posting to slashdot
> Out of curiosity, how did you go about running gEDA on Windows? > Which of the binaries are you using or did you build it yourself? I've been using the gEDA+PCB work flow for all of the projects I have done since I started my business, and that has been a very successful choice for me (versus having to find capital to purchase an EDA package). Originally I was running on cygwin, and then started using Peter's Win32 builds, and recently I have been building it using minipack (I wanted to change the font scaling). I have mingw installed and use a Makefile as the glue between schematics, PCB, bom, drc etc. (I posted the makefile here recently). Further to that I use a python script I have written (and still working on) to generate IPC-7531 compliant footprints (based on dimensions from the PCBMatric land pattern calculator). I output all my schematics to PDF for printing, and transmission to clients. Outputs from PCB are gerber files for manufacturers and I have never had any issues with the format. I also use the XY output for generating pick and place files. I didn't really find gEDA any more difficult than learning OrCAD or PCAD. Everything that most people need can be done - easily. I suspect the real issues have little to do with the work flow and more to do with the question, "How easily can I created something useful?" I think gEDA is *possibly* more suited for professionals than hobbyists, as I has the flexibility to do really useful things (like scripting repeatable work tasks). I really believe that gEDA offers the potential to increase productivity dramatically when its features are fully leveraged. The challenge is to get more professionals to adopt itwhich means proving its worth with the hobbyists. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb preferences line incr.
> I noticed that the preference incremental setting is not working, that > is if "l" setting, the line increment is changed to 1 ml it still > increment of 5 ml looks like some other setting is override this > function. this is true for "s" setting also. I changed the setting then > reloaded the PCB still not working. I have (and do) see the same thing. Increments seem to be 5mil regardless of the setting. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem text line spacing in postscript
> This one adds a 12% leading to the text spacing for print, causing it to > pretty well match my on-screen leading. YMMV depending on what fonts > your system chooses. This patch works beautifully. I tried it out with the font scaling set to 1.0 and 1.3 and the result was consistent line spacing between the on screen and postscript versions. This was with Win32 builds. Thanks! Duncan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem text line spacing in postscript
> This one adds a 12% leading to the text spacing for print, causing it to > pretty well match my on-screen leading. YMMV depending on what fonts > your system chooses. Thanks Peter, I'll try it out and give you some feedback. Regards, Duncan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: gschem text line spacing in postscript
Hi, I noticed a small issue with the line spacing in the postscript output of gschem. It appears to be that the text line spacing is not consistent with the font scaling when output to postscript. Here is a screenshot to show the difference between the gschem scaling and the output postscript scaling, see http://www.engineersimplicity.com/gEDA/text_line_spacing.png I'm running a custom compiled version with the cairo/pango font scaling set to 1.0 and suspect that the spacing issue is linked to this. Is there another factor which influences line spacing? Thanks, Duncan -- Turn ideas into products - http://www.engineersimplicity.com The Art of Engineering - http://blog.engineersimplicity.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Is it possible to do square holes in PCB?
Why exactly would you want square holes? Set the "hole" flag for non-plated holes (not sure how to do that through the gui though) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GUI + make project manager (was:why separate xgsch2pcb?)
Here is my idea of how it could work I have a skeleton Makefile which I use as the glue between the various gEDA programmes (attached). It is a really basic thing as I am not particularly clued up on the use of make, but it functions well for my purposes. If it could be useful I'm happy to put the GPL boilerplate onto it (although that might not be the best choice). If there was a mechanism to call the file from within a schematic (gschem) it could do a lot of what people are asking for, as well as be modified and extended to do all the particular tasks that may be needed for specific situations. The Makefile would sit in the schematic directory, and gschem could have a menu which gave access to the make targets. It could be something like this (just an example - could even be user customisable), Project - Set project files (this would require an extra dialogue that would set the Makefile variables) - Edit attributes (opens gattrib on the whole project) - Update refdes' (runs refdes_renum on the project - would require a reload of the schematic) - Create bom - Update PCB (runs gsch2pcb) - Open PCB (opens the PCB in pcb) All gschem would need is a mechanism to run a command line program (I have no idea how difficult that is) and the Makefile technique allows plenty of flexibility for power users. New users would be happy to have a useful predefined set of targets for "typical" work flows. If someone wanted to run a DRC on the schematics and open the output in a text editor it is just a matter of added the DRC option to the menu and changing the Makefile to open the output in their favourite editor. If this kind of mechanism was used it would be helpful to be able to update a modified schematic from within gschem instead of having to close and reload (or is there a way to do this and I've just missed it?) It seems like a way which wouldn't require too much effort and maintains the work flow flexibility. Regards, Duncan -- Turn ideas into products - http://www.engineersimplicity.com The Art of Engineering - http://blog.engineersimplicity.com Makefile Description: Binary data ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem font scaling
> > Recompile, sorry. See libgeda/src/o_text_basic.c > > Search: > > #define GEDA_FONT_FACTOR 1.3 > > You probably want it "1.0" > Recompiled with minipack and the font scaling set to 1.0 - working as expected under win32. One thing: I used to be able to File -> Print and then print to a file to get a .ps output, now that has been replaced with a windows printing dialog. Anyway to get .ps out via the gui? I'm also having some trouble getting a .ps via the command line, but I think that is a Vista permissions issue. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem font scaling
> Recompile, sorry. See libgeda/src/o_text_basic.c > > Search: > > #define GEDA_FONT_FACTOR 1.3 > > You probably want it "1.0" Thanks, I'll give it a try with minipack sometime soon. Is there (or is there supposed to be) any correlation between the gschem text size and the actual printed size? e.g. is text size = 10 supposed to render 10pt text when printed? > One thing I'm absolutely against is introducing separate on-screen, and > output scalings. gschem is WYSIWYG, and something I think we want to > keep. Definitely agree on that. > I'm not violently opposed to adding a setting for the scaling factor - > but I'd really prefer it wasn't necessary. Building with minipack is fairly straightforward (once you've done it once...). I'm quite happy to sort my particular problem out that way. >> FYI I am working with the win32 builds. > > Ok, cool - glad to hear they are working for you. > They've been working well for me since you first released an unofficial build. I use the mingw tools along with them (mainly make) for automating some of the tasks. I think I raised the issues I had way back when you first offered a build - since then, pretty smooth sailing. I've grabbed your Cairo build and installed it earlier today (schematic time again) so I'll let you know if I see anything suspicious. I generally output directly to a pdf though, so printing has never really been an issue to me. Thanks for making the builds available. Could you please send me the nsi installer script? I would like to figure out how that works so that I can package an unofficial build. Thanks, Duncan -- Turn ideas into products - http://www.engineersimplicity.com The Art of Engineering - http://blog.engineersimplicity.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: gschem font scaling
Hi, In geda 1.6.0 the font scaling has changed - is there a way to set the font scaling differently? Maybe in a gschemrc file, or does it require a recompile? A brief background to the question: Yes, obviously the on screen font has changed significantly due to the new font rendering, which is great, but what has also happened is that the scaling in the font of a .ps file has also changed. Pre-cairo/pango the .ps font was significantly smaller than the on-screen font, and (IMO) scaled as I would expect it to be. In the dev versions 1.5.4 the on screen font matched the old .ps font scaling (and .ps font scaling remained consistent). In 1.6.0 it seems the decision was to try to approximate the old on screen font size (I can imagine some reasons for this - namely symbol library consistency), but this has changed the output font size. The change has "broken" of my schematics and symbols (my issue, not gEDA's - that's what happens when you work with a dev version). I prefer the old scaling, and would like to know what I need to change to build it as I would like. It would obviously be very nice if this was just a gschemrc setting... FYI I am working with the win32 builds. Thanks! Duncan -- Turn ideas into products - http://www.engineersimplicity.com The Art of Engineering - http://blog.engineersimplicity.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Win32 hit list...
> xgsch2pcb: > > Figure out the following for minipack: > > Building python for Win32 > Building DBus / Win-dbus / whatever the working variant is on Win32 > Building py-dbus (Python dbus binding) on Win32 > How about using something like cxfreeze? http://cx-freeze.sourceforge.net/ Of the python -> .exe builders I tried that was the only one I had success with. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Test gschem bug...
> http://www2.eng.cam.ac.uk/~pcjc2/gschem-debug-font.exe I tried dumping this into my \bin folder, but it gives and error - can't find libgeda-38.dll I'll try rebuilding with the latest sources and see if that sorts it out ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: New gaf on Windows and one PCB question
> I am the author of the windows build script (minipack), and can help to get > you going. Cesar, have the patches to minipack for geda 1.6.0 that Peter provided a while back been merged into the repo? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: New gaf on Windows and one PCB question
> The latest I packaged was the development version 1.5.4, I've not got > around to packaging anything later than that. > > http://www2.eng.cam.ac.uk/~pcjc2/geda-windows.html > One gotcha with this version is that it gschem scales fonts differently to the 1.6 release, so if you use it, just consider spacing to allow for future migration. Building a windows version with Ceasar's minipack script is relatively straightforward, I just don't have the time to figure out how to package it nicely. If you are interested in building the 1.6.0 release (requires using Virtual Box on windows) I can scratch around for the build instructions. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Kudos
> * gschem magnetic nets - always seem to snap to the wrong thing for me > so I end up turning them off always. Need to tweak my config file. You can temporarily disable this feature by holding in the CTRL key. I guess that should be added to the wiki somewhere ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: How do I better proportion objects on screen?
You can also change the default title block symbol. Put the following line into your gschemrc file: (define default-titleblock "title-A3.sym") Replace “title-A3.sym” with the file name of your favorite title block symbol. (from the gschem FAQ, http://www.geda.seul.org/wiki/geda:faq-gschem#can_i_get_a_customized_title_block_with_new_schematics ) Kind regards, Duncan Drennan -- Turn ideas into products - http://www.engineersimplicity.com The Art of Engineering - http://blog.engineersimplicity.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB+GL testing
> * Pieces of polygon are NOT drawn until you connect to them with: > * A via thermal > * A "joined" line > * (IIRC) Adjacent contact to another "pour" piece which is connected Are thermals for pads possibly supported in the GL branch? Or to ask that differently, is there a way for connections to pads to allow the polygon to extend into allowable areas? I haven't checked this out or worked with it, just asking out of interest. Thanks, Duncan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB enforce DRC clearance on move
> Is there a way to enforce drc clearance (and show drc clearance) while > moving lines (arcs), > as it is done while drawing a new line or arc. Under "Settings" select "Crosshair shows DRC clearance" and "Auto enforce DRC clearance". ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Barred solder mask in PCB
> Fedora 11; PCB 20081128: On this board, the solder mask displays in bars on > my board, which has some components placed at arbitrary angles. What do the gerber outputs look like? Are they also corrupt? -- Turn ideas into products - http://www.engineersimplicity.com The Art of Engineering - http://blog.engineersimplicity.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: finished hole size vs drill size
> If most pcb fab houses use this convention, > maybe the wiki/faq/manual is worth updating with this tidbit. I think it is quite common to adjust the drill bit size so that the final size is the size specified in the gerber/CNC files. I know the manufacturers I use do this. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem snap parameters?
> You can temporarly disable the magnetic net with the CTRL key. > I guess that's what you need. Thanks! That does help :) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem snap parameters?
> - > /* define how far the cursor could be to activate magnetic */ > #define MAGNETIC_PIN_REACH 50 > #define MAGNETIC_NET_REACH 20 > #define MAGNETIC_BUS_REACH 30 What do the values actually mean? Is it 50 grid units, 50 pixels, 50 what? I've also experience some frustration with this feature, mainly when I want to route a net and one of the vertexes happens to be close to a "magnetic" point. Zooming in seems to help avoid the problem. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Net naming
> I would like to know why a ":0" is needed to prevent errors when > naming a net. What does the number after the colon signify? If I understand correctly the colon-number has to do with linking a net to a pin number and is only relevant in symbols. I have named nets in schematics without the colon and it works correctly. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: global delete & global move
> Is there way to delete, and move more than one element in pcb ? > it seam natural that should be one, but I can't find. Select all the items you want to delete and press Backspace (see the menu Info -> Key Bindings). To move just select all the items, then click-and-drag. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PANGO FONTS MERGED: Call for testing
On cygwin: ./configure --prefix=/home//geda [snip] configure: error: GLib 2.12.0 or later is required. The latest official glib2 release on cygwin is 2.10.3 :( ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: placing a connector footprint "out" of a board
> How do I create that special layer? I'd just use a free layer and rename it? As others have said, just name the layer "outline" and PCB automagically knows what to do. Make sure that the layer has its own group. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: placing a connector footprint "out" of a board
> Add a layer called "outline" and place a the outline of the board there. > Gerber export will produce a separate gerber file, that tells the fab > where to cut the board. I'd include a README in the zip file of gerbers > where I explicitely state which file to take the outline from. If you use the "outline" layer (which is a special layer in PCB), then the outline will be correct on the .fab gerber too. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB DRC rounding & grid
> No, this is a "feature" of the way we define the sizes. "Bloat" is > how far you can go *without touching*. If you want a 10 mil space, > you need to spacify that you can go 9.99 mil without touching. At 10 > mil, you're touching. Thanks for clearing that up for me. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: PCB DRC rounding & grid
It appears as if there is a rounding error when converting from mm to mils somewhere in the DRC code. I have the following DRC settings: 0.200 min copper space 0.200 min copper width 0.100 min touching overlap 0.200 min silk width 0.400 min hole diameter 0.250 min annular ring When I run the DRC checker the first line of the log window reads: Rules are minspace 7.88, minoverlap 3.94 minwidth 7.87, minsilk 7.87 min drill 15.75, min annular ring 9.84 >From that is looks like the minspace is being calculated incorrectly - it should be 7.87 along with minwidth and minsilk. If the lines/copper are very close then it seems like that will erratically cause DRC errors, even though there are none (setting the DRC to 0.199 then results in no DRC errors). I suspect the erroneous errors have to do with that rounding. A separate minor issue is that the grid size setting is always lost after a DRC error is found. This is with PCB 20081128 Thanks, Duncan -- Turn ideas into products - http://www.engineersimplicity.com The Art of Engineering - http://blog.engineersimplicity.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem rc file setup
Something I have noticed before is that occasionally a difference between the symbol name and the gschem file instantiation case (capitalisation) appears. This might not be the case at all for you, but try checking the .sch file to see if the case is the same as the symbol file. This is probably not the case in your situation, but you could try checking. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: footprint help please
> How much pad do you need on the outside of the pin, and how much on the > inside assuming hand soldering? I used the PCB Matrix IPC calculator (MOST setting) and the recommended pads came out as, 7.2mm centre-to-centre 1.75mm pad length 0.45mm pad width Putting it through my footprint generator I came up with the attached footprint, SOP65P760X150-30M. SOP65P760X150-30M.fp Description: Binary data ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: minipack issues
I never managed to get this to build in cygwin. It failed on the freetype build (IIRC). I'm going to try building it in a virtual box and see how that goes. -- Turn ideas into products - http://www.engineersimplicity.com The Art of Engineering - http://blog.engineersimplicity.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: minipack issues
> In the command-line, please type: > > echo passive_ftp=on >> ~/.wgetrc > Thanks Cesar, I'll try that out. I just manually used wget and the passive ftp option to grab the sources. Busy compiling now (on cygwin) which seems to be taking quite long. Hopefully I'll actually get some functional .exe files out. Once the compilation is done, will the files run "as is" or do the dll's have to be installed into specific windows directories? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: minipack issues
> It seems wget is failing to get the source for the JPEG library for some > reason. After a bit of searching I found out that if I use the --passive-ftp option with wget then the download succeeds. Is there a way via a config or recipe file to set flags for wget? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: minipack issues
I've been trying to compile gEDA for win32 using minipack, but it keeps failing while downloading the packages. It successfully downloads gettext and libiconv, but then all further packages have this result: Downloading jpeg from ftp://ftp.uu.net/graphics/jpeg/jpegsrc.v6b.tar.gz ... --10:31:28-- ftp://ftp.uu.net/graphics/jpeg/jpegsrc.v6b.tar.gz => `jpegsrc.v6b.tar.gz' Connecting to ftp.uu.net:21... connected! Logging in as anonymous ... Logged in! ==> SYST ... done.==> PWD ... done. ==> TYPE I ... done. ==> CWD /graphics/jpeg ... done. ==> PORT ... Invalid PORT. Retrying. I keep getting this "invalid PORT" message. Any ideas what is going wrong? Thanks, Duncan -- Turn ideas into products - http://www.engineersimplicity.com The Art of Engineering - http://blog.engineersimplicity.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: TI's "SOT25" DBV footprint...
> TI's sn74lvc1g240 part uses what appears dimensionally to be an ordinary > SOT25 package, but the pin numbering is different. Am I better off to > just construct my own footprint, or is there a way to deal with this at > the symbol level and still show the right pin numbers in the schematic? I'm pretty sure everyone will have a different way to deal with this. My personal preference is to keep the footprint consistent and have different symbols for variances in pin numbering. My reasoning: the footprint is a physical description of a component and can represent multiple components. The schematic is the logical description and the logic (pin numbering in this case) varies for different components. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: funny gnetlist warning
> No. And I don't wish to, too. I actually meant the underscore in "value=RIA_connect" - maybe it is not the footprint name it is complaining about. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: slotting and power pins
> This can only fix the special case of slotted symbols with power pins. > However, the more general case that needs to be solved, is a component > that is associated with several different symbols. This is the case if > power pins are dealt with a separate symbol, or if a large component is > divided into several building blocks. I wonder if slotdef could point towards a symbol So, slotdef = 2:fpga_bank1.sym, etc. Although I think this has the potential to become very messy. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: slotting and power pins
Currently the symbol slotting functionality struggles to handle power pins well (at least that is what some brief googling showed). A recurring theme with regards to slotting is that power pins show up on all the slots, e.g. dual/quad opamp which has a single set of power pins for each of the opamps - if the power pins are visible and not embedded they show up on each slot. Some people have a problem with this from a "style" perspective (it is visually different to other CAD packages). A slightly more important issue is that if the pins are left unconnected (for more readable schematics) it messes with the DRC checking, which expects all pins to be connected (and possibly with the netlister?). I had a thought which might solve both of these issues. If a special character was defined for slotting which indicated that the pin should be excluded from the schematic that character could be used in place of the power pin slot. So for a dual opamp with slots defined slotdef = 1:3,2,8,4,1 slotdef = 2:5,6,8,4,7 it would become slotdef = 1:3,2,8,4,1 slotdef = 2:5,6,N,N,7 if 'N' was the special character. The 'N' pins would then be ignored by the rendered, DRC, netlister, etc. Maybe even just slotdef = 2:5,6,,,7 would work too. Maybe this has already been done? I have absolutely no idea how the internals work for rendering the symbol and passing the info to the DRC and netlister. Just thought I'd share the idea in case anyone is interested. Regards, Duncan -- Turn ideas into products - http://www.engineersimplicity.com The Art of Engineering - http://blog.engineersimplicity.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: funny gnetlist warning
> CONN1: need new file element for footprint PLUGCON_383_2PIN > (value=RIA_connect) > Warning: argument passing may have been confused by > a comma in a component value: Have you tried taking the underscore out of the value? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: No FreeRotateBuffer in pcb manual
> Is it possible to have more than two layer groups? There are as many groups as there are copper layers. By default each copper layer gets its own group, but you can group layers together such as "Component", "Component-VCC", "Component-GND" which will then be output as a single copper layer to the gerber files. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb wishes
I'm sure we could all raise list of features that we need/want PCB to have, but isn't the implied agreement that the next step in the development cycle is to complete the work laid out in the Linux Fund PCB project? http://www.linuxfund.org/projects/pcb/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: No FreeRotateBuffer in pcb manual
While we're talking PCB manual issues... The PCB manual states that the max number of layers is 8, but it should mention that the default is 16 but that it can be compiled for more layers. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb: double-sided footprint
You can use the "onsolder" flag to place pads on the opposite side of the board. You would have something like this for a PCI connector, Pad[-45276 -6890 -45276 6890 2756 2362 3228 "B1" "B1" "square"] Pad[-45276 -6890 -45276 2953 2756 2362 3228 "A1" "A1" "square,onsolder"] ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Investigating gEDA for commercial use
> fwiw, pcb and gerbv release snapshots have had windows installers to go > with them for the last several snapshots. On the gerbv end things Just > Work (as far as I know). On the pcb end, we do have an issue with the > way the m4 generated footprints end up named in pcblib-newlib. > Basically, they are not uniquely named and that causes some issues. I > haven't had time to work with it. The other known pain about pcb under > windows is the only path to printing is postscript output and then you > need ghostscript to convert to pdf for printing under windows. I've been working with the gEDA toolchain on windows for about 6 months now. The only issue with gschem that I picked up is that the refdes renumbering tool does not seem to work (refdes_renum is a perl script, and the grenum didn't work correctly - I just drop back to cygwin to renumber schematics). My desired output is typically PDF, so the postscript path works happily for me (but would have to be fixed for a proper release version). > gaf (gschem, gnetlist, and friends) I think have an extra level of > challenge which is gnetlist is by design a command line utility so you > need some sort of shell. I suspect under cygwin its not so tough to > make it all work, but this is not the fully self contained windows > installer that many users want. The command line stuff can easily be hidden with a thin layer of GUI if it is really necessary. I really like the flexibility that I can build into a makefile to run all the different commands. Installing cygwin and getting it up and running is actually very easy (just follow the wiki instructions). One "issue" for me with that is that it creates another barrier for entry - you already have to deal with migration paths and so on, now you also have to deal with figuring out how to get it installed. If the installation barrier is gone it is one point less against gEDA. Another issue is that if I have a client who wants to manipulate the files the installation process is more complicated than, "Here is the installer, here are the files." If it was a relatively simple process to compile it all into a binary I would probably do it myself on a regular basis just to keep up to date with the latest changes (which also makes it easier to report bugs). I tried grabbing Cesar's minipack and running it (under cygwin), but there was a failure when fetching the files. Unfortunately I don't really have the time to figure it out, and think it might be more efficient (for me at least) to pay someone to do it. Figuring out how to build the latest versions of gEDA is pretty low on my priorities list. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Investigating gEDA for commercial use
> 1. a maintained Windows binary installer; and Is there anyone who is willing to do this for a fee? e.g. build a windows snapshot of gschem, PCB, gerbv (and whatever else) once a month for a fixed fee. If there is someone, roughly what would that fee be? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: [PCB] trace drawing problem
I'm not sure what version of PCB you are working with, but I think this may be a known problem. Next time you start getting this behaviour try turning on and then off Settings -> Lock Names. This seems to resolve this behaviour. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: IPC Least/Nominal/Most
> For hand soldering which footprint variation are people using? I am currently using the M (most) definitions for both hand soldering and production. I have found them very reasonable to use. I even managed to hand solder a QFN package from the "most" definitionsalthough my pass rate was only about 50% :o ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: geda/pcb for windows download links
Thanks Kai. Which versions/snapshots are those builds of? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: good books about footprint and land patterns
> If I buy this document and let somebody make software around it, released > under GPLv3 and developed in community style will this be possible and > legal? > > What are the alternatives? I have considered this myself, but I suspect there might be copyright issues. An alternative would be to create libraries based on the spec and make those publicly available, or write a closed module which does the calculations and have the rest of the programme open source. It is also worthwhile having a look at the libraries provided with the LP Calculator from PCB Matrix, http://www.pcblibraries.com/ Currently I have a python script (in development) which creates geda PCB footprints based on the land pattern dimensions as they specify them in the PCB Matrix libraries. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: good books about footprint and land patterns
> What are good books that explain how to create good save footprints from > datasheet specs. I am searching for best practices, math rules and so forts. IPC-7531A, http://portal.ipc.org/Purchase/ProductDetail.aspx?Product_code=81B562C1-B8F8-DB11-8A6A-005056875B22 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: scaled printing with gerbv?
Is there a way to make scaled prints from gerbv? Thanks, Duncan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Adding attributes to gschem symbols
The wiki has the answer, http://www.geda.seul.org/wiki/geda:faq-gschem#how_do_i_promote_an_invisible_symbol_attribute_into_the_schematic I hope that helps. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Methods to improve gEDA tools (was: fritzing)
Sorry, scratch that. I see the page now has the info :o On Mon, May 11, 2009 at 8:35 AM, Duncan Drennan wrote: > Thanks Stuart. Is there any kind of way to see how far along the total > donations are? i.e. how many dollars have been allocated, and how many > there still are to go. > ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Methods to improve gEDA tools (was: fritzing)
Thanks Stuart. Is there any kind of way to see how far along the total donations are? i.e. how many dollars have been allocated, and how many there still are to go. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: solder jumpers
I saw something very similar to this on a LCD panel, except it was made of straight line, kind of in the shape of a fork - one side was a "Y" and the other a straight line into the middle of the "Y" (and the "Y" had lines at right angles. | -| --- | ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: OT: soldering QFN packages with exposed bottom pad?
> Spend $20 and buy a cheap hotplate :-) What hot plate do you use? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: OT: Wire to board crimps?
Do you mean these kind of crimp terminals? http://www.molex.com/molex/products/listview.jsp?query=&path=cHome%23%23-1%23%23-1~~ncCRIMPTERMINALS%23%230%23%2311j&channel=Products&; ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: DIY pcbs
Those of you into homebrew PCBs will probably like this, from Instructables http://www.instructables.com/id/Killer-PCBs/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: How to photo-export from PCB
File -> Export layout... Choose PNG and then select "ben-mode" It is a little obscure (but I think it may have been changed in latest code?) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: libgerbv DRC help
> If there is a better approach, or you have any other ideas, please let me > know. I was chatting to a friend and he was telling me about research that he was involved with which used diffusion maps to determine how fires spread through a forest. The basic principle is that you can determine information by only knowing what each "pixel" (or item, or in google's case webpage) is linked to. I have absolutely no idea if this could be applied, it is just a thought. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: arcs and circles in PCB via gui
> It's a nuisance. Can't count the number of times I typed "u" in gschem to > undo, or "n" in pcb to start drawing a track. Amen to that! I'm constantly moving things in pcb by trying to pan with the middle button. The difference in shortcuts can be quite frustrating. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
