Re: gEDA-user: Separate Vcc voltages
> You can force a power pin to be connected to the specified net by adding an > attribute to the IC symbol: > net=netname:pinnumber > > For example if you want to connect pin 14 of U1 to +5V instead of default > VCC, add an attribute > net=+5V:14 > to U1 (if it is 7400 or so, add this to all gates used on schematic). > > Wojciech Kazubski > > I do the same thing. The important part of this process is to toggle the visibility of the attribute and place it around the component. This way you can see the value and won't get screwed when dealing with multiple voltages/gnds. Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: How well does gEDA work on OpenBSD?
> So I am shopping for a new OS. OpenBSD looks quite good and has the > latest version of gEDA. So, for those who use (or have tried to use) > gEDA on OpenBSD: how well does it work? > Can't speak for OpenBSD but the current gEDA package on Gentoo is 20070526 and I have no complaints. Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: trace length?
Is there a method in PCB that allows one to measure the trace length so that signals can be phase matched if needed? If not, this would be a nice feature. Thanks, Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: 4-bit_12-LED.png (PNG Image, 1024x768 pixels)
A wire jump tells the reader _explicitely_ "Here are two wires crossing". Two lines just crossing may trigger the question: "Are these lines connected or not?". And a junction (circle or dot) doesn't do this??? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: gEDA coordinate origin
Is there a way to place the coordinate origin in the bottom left hand of the screen? This would match the gerbers produced and make more sense when dealing with board house violations. For now I am using the relative marker m to do this. Thanks, Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: 274x Gerber Files
I guess I didn't think about it that way. When I fill in my order, I am required to check the polarity of each file submitted. So you are telling me that my soldermask would positive then - right? Welcome to the confusing world of gerber. The soldermask plots are negatives, so check the negatives box. The other layers are positives. The confusion is that the polarity of a layer is NOT the same as what the layer ends up looking like. It's a means of defining the layer; either by drawing the parts you want or by drawing the parts you don't want. In the case of soldermask, we draw the parts we don't want - the holes. But the layer is the mask, hence we tell it we're drawing HOLES in the mask, not the mask itself. If the layer were positive, we'd have to draw a lot of complex polygons to define the mask shape. Also, sublayers within each gerber can have a dark or light polarity, which basically lets you draw or erase within each layer. In theory, we could have had a positive mask layer, drawn a big (dark polarity) rectangle, then erased (light polarity) the holes. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user Thanks for the help, Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: 274x Gerber Files
1. The soldermask for both sides of the board appear to be a negative image while everything else is positive - is this correct? Yes. It defines the mask, not the holes in the mask. I guess I didn't think about it that way. When I fill in my order, I am required to check the polarity of each file submitted. So you are telling me that my soldermask would positive then - right? Thanks, Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: 274x Gerber Files
I am getting ready to send my files out for fabrication and have a few questions: 1. The soldermask for both sides of the board appear to be a negative image while everything else is positive - is this correct? 2. My boss uses Orcad and his inner layers are negative while the soldermask is positive - is there a standard? 3. I have seen some users who place a text description containing the file name and image orientation above the board outline for each layer? Is this necessary and could you do this using gEDA? I am going to order some no-touch boards from protoexpress and I could just imagine no-touch meaning: "we sprayed all your pads with resist because you stated the soldermask image was positive - best wishes". Anyone ever experience any problems from fab houses over this sort of thing? Thanks, Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: simulation advice
Dave McGuire wrote: On Apr 3, 2007, at 3:25 PM, David Kerber wrote: As a windows user who does java programming (which is case-sensitive), I can understand being used to it, but why would you actually prefer it? I can tell you why *I* prefer case-sensitivity. It makes sense. 'A' is simply not the same thing as 'a'. Even in something as imprecise as the English language, they are used differently. Making things insensitive to case involves expending effort to reduce accuracy...and that really seems dumb to me. I just had a "Windows flashback" thinking of case sensitivity. I was recently coerced into reviewing some VC++ code using VisualStudio - what a freaking nightmare. People speak of this IDE system as if it fell from the sky - it is actually the most unintuitive, complex piece of garbage I have ever laid eyes on. Case insensitivity is at the top of the PITA list for non-windows developers. Case sensitivity and code development (and general file/directory organization for some) go hand in hand. Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Design Lab Equipment
If you are familiar with C I'd suggest a microcontroller that is capable of being programmed in C, assembly can be tighter and cleaner, but that takes practice. I am fond of the Atmel AVR series, and the GCC tool chain that goes along with it, it is also convient for OS X and Linux users, as the basic stamps native environment is windows. yes they have compilers and such for linux, but the AVRs have better OS X support. With the GCC tool chain you have the ability to use both assembly and C I also like the microchip PIC line. CCS offers a nice compiler in Linux for about 80 bucks (with a student discount) - but, if you are new to all of this, I would second the motion for the Atmel AVR series as well; since they offer the gcc avr compiler for Linux. I purchased the STK500 kit from digi-key some time ago and am still waiting on a free moment to evaluate it. Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Some Linux distros to consider
The Gentoo install is time consuming and sometimes tricky, but the end result beats everything I have tried. Installation of gEDA is as simple as "emerge geda" (unless you want the nightly snapshots of course). Gentoo has more scientific/engineering packages than anything I have seen ; and, you can stay on the bleeding edge - if you prefer that. Additionally, the documentation is, without a doubt, the best set of Linux docs on the web. If you can get past the install and learn the basics of portage, you have no reason to use anything else. Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Layer selection screw-up
Ben Jackson wrote: On Wed, Mar 21, 2007 at 04:00:28PM -0400, Ryan Seal wrote: problem and need to move each trace to the opposite side of the board. I did this once. It's easy, just edit the .pcb in a text editor, find the block with the lines, and move them around. So you'll see something like: Layer(4 "component") ( Line[239000 53000 230900 53000 2500 2000 ""] Line[259000 38000 254000 43000 2500 2000 ""] ... ) Just move the Line bits (or change the Layer "statement"). It worked. I changed my layer names via emacs and then swapped my component-side and solder-side labels in pcb. I suppose I could have done this through the pcb interface (as DJ Delorie suggested) but wasn't quite sure and I laid down almost 500 traces before catching my obvious mistake - so I was a little hesitant. Thanks again, Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Layer selection screw-up
Ben Jackson wrote: On Wed, Mar 21, 2007 at 04:00:28PM -0400, Ryan Seal wrote: problem and need to move each trace to the opposite side of the board. I did this once. It's easy, just edit the .pcb in a text editor, find the block with the lines, and move them around. So you'll see something like: Layer(4 "component") ( Line[239000 53000 230900 53000 2500 2000 ""] Line[259000 38000 254000 43000 2500 2000 ""] ... ) Just move the Line bits (or change the Layer "statement"). Thanks a million - I'll give it a try. Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Layer selection screw-up
Hi, I made a mistake when setting up a 4-layer board and grouped my solder layer with my components and vice versa. I have now corrected the layer problem and need to move each trace to the opposite side of the board. The problem with this is that hitting to move layers now places a VIA because the trace is in segments. Can I turn off this behavior; or, is their an easier way to correct my mistake. Thanks, Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Re: Flame about XML
What we need from you folks, the users, is a description of what functionality you need and why, The wiki at http://geda.seul.org/wiki/ is a good place for this right? Would Design Flows be a good heading? Or... Functionality we Want from gschem and PCB and gnetlist? Or something else? Design Flows w/o embedded XML Design Flows w/ XML plugins... No XML allowed John Griessen How about: Features, Functionality, the Future. I would like to see a CVS/Subversion library that holds symbols and footprints by manufacturer and/or part number. And some sort of sanity check to verify the symbol and the footprint (something like Eagle but maybe not as strict). Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Re: Flame about XML
Steve Meier wrote: I am not saying it is broke I am saying it lacks capabilities that I need (and by comments on why geda isn't used more in universities i suspect I am not alone). Now that isn't a reason to rewrite the code to support xml files. But the other _expression_ is why re-invent the wheel. If some file format or other does the job and has the parsers Steve Meier On Thu, 2007-03-15 at 15:10 -0400, Ryan Seal wrote: DJ Delorie wrote: Good to know. Should we put up a little list on the gEDA home page where the developers, contributors and users of gEDA can state if they are pro or con XML? I am neither pro nor con XLM per se. I am against change for its own sake, especially when it involves a lot of effort for little gain. So far, nobody has come up with a compelling reason to switch to XML, other than it being today's buzzword, which even balances out the effort required to add and support it, much less exceeds it. Have you ever heard the saying "If it ain't broke then don't fix it". Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Re: Flame about XML
DJ Delorie wrote: Good to know. Should we put up a little list on the gEDA home page where the developers, contributors and users of gEDA can state if they are pro or con XML? I am neither pro nor con XLM per se. I am against change for its own sake, especially when it involves a lot of effort for little gain. So far, nobody has come up with a compelling reason to switch to XML, other than it being today's buzzword, which even balances out the effort required to add and support it, much less exceeds it. Have you ever heard the saying "If it ain't broke then don't fix it". Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: net vs netname (was Re: gEDA-user: Busses in gschem)
Thanks. Looking through the documentation I even found it in the gschem FAQ. However I'm a bit confused about net and netname attributes. You and the net attribute mini-howot suggest that I should specify the net attribute if I want several thing to be in the same net. In other parts of the documentation the attribute is called netname though. gschem offers both in it's dropdown list for adding attributes. Philipp I use the bus lines in my schematics. To make a long story short: 1. The bus line is purely graphical; no hidden meaning. 2. Nets are used in the component symbol to select VCC:GND pins. You can override them in the schematic. 3. You want to use netname with your data bus. This will connect across multiple schematics. My current project uses 8 schematics and works perfectly as far as I can tell. If you have multiple grounds and voltages on a schematic you use the NET attribute to override the default VCC:GND. Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Hi.... first post
Can you please help me with one part of my original question? 1. When I load the netlist into the PCB program, it gives errors saying that it couldn't find pins with the names given in the footprints, or some such thing. Just try loading my .pcb file first, then try loading the netlist, and you will see what I mean. This problem does not go away even after you :ExecuteFile(test-schem.cmd) Open your symbol with gschem and check for: 1. proper pinnumber attributes. 2. proper pinlabel. Make sure the footprint pins match the pinnumber attribute in the symbol. The problem does not go away because it shouldn't be there in the first place. If you are using pinlabels properly, the ExecuteFile(test-schem.cmd) should replace the pinnumbers in the pcb layout with the pinlabel names from the symbol. At least it does for me. Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Any-to-one connections
Philipp Klaus Krause wrote: I'm currently drawing a schematic using gschem. There's a GAL in it and some other chips. Since the GAL's outputs /inputs are all equivalent I don't care which output is used for some task. For example I want to feed a GAL output into the output enable of an EPROM. So I want one of the GAL's outputs connected to the OE input of the EPROM, but I don't care which one is used. Is there a way to tell gschem about this? Depending on which output is used the resulting pcb would use a different number of vias, etc. Philipp I do the following: 1. Assign all I/O in the schematic. 2. Generate a pcb file. 3. Look at the layout at point out potential problems. 4. Go back and alter the schematic connections. 5. Regenerate the pcb file (just a new net file). 6. Load the altered net into the existing pcb layout. 7. Repeat until satisfied. I don't know how you could tell gschem that you don't care about connections? What would your final schematic look like? Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Spurious ratlines in PCB
Could it be possible that your footprint has duplicated pin 2 in place of pin 28 ? I think that might cause this behavior. In pcb you can mouse over the pad and press to check the name. Sorry for the late response; disregard. Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Spurious ratlines in PCB
TheOtherSam wrote: PCB seems to be drawing spurious Rat lines for connections that are not in the net list. In particular, I have a pair of 34-pin headers and each shows a connection between pin 2 and pin 28 of the same header. There is a signal routed to pin 2, but pin 28 is a no-connect. The Net List window in PCB shows no corrosponding connections, and the *.net file created by gsch2pcb likewise shows no such connection. Could it be possible that your footprint has duplicated pin 2 in place of pin 28 ? I think that might cause this behavior. In pcb you can mouse over the pad and press to check the name. Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Some footprints I tried to create
John Griessen wrote: Dave McGuire wrote: On Mar 14, 2007, at 9:29 AM, Steve Meier wrote: Also, which office suite do you use? gEDA. So, do you have a set of gschem borders for the starting template for your letters and brochures, or do you use PCB for that -- a set of launch and load layout scripts and starting layouts? Sounds like a job for XML :-) . Really, I don't see the big deal. If you would like am XML format, write a parser that will take the current format and generate XML to and from that. This could be located in the File->Export / File->Import menu (or something like that). Now you get your XML and others can keep what they currently use. Ryan John G ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Questions concerning footprints and libraries
2. Under the pcblib-newlib directory, there are two locations for the 1206.fp footprint; 1) geda and 2) generic. Is this a problem and how does PCB handle this? PCB doesn't. When you load from the library, you specify exactly which one you want. Once it's loaded, there's no reference to where it came from any more - it's embedded. gsch2pcb is the other way to get footprints into your design; I don't know what algorithm it uses to choose. You're right. I was referring to gsch2pcb. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Questions concerning footprints and libraries
What I do is I place all of the footprints I have reviewed in a single directory and I only use footprints from that directory. I have a shell script called sch2pcb which contains the lines --- #!/bin/bash gsch2pcb --use-files --elements-dir /local/lan/pcb/packages $@ Only footprints from the directory /local/lan/pcb/packages are ever used in my designs. (* jcl *) Thanks for the advice. This appears to be the only safe solution. Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Questions concerning footprints and libraries
I am trying to use a "1206" smd footprint in my schematic and have the following questions: 1. In the schematic should I use "footprint=1206.fp" or "footprint=1206" ? Does the ".fp" extension designate the newer footprints? 2. Under the pcblib-newlib directory, there are two locations for the 1206.fp footprint; 1) geda and 2) generic. Is this a problem and how does PCB handle this? I have noticed there are more than a few duplicated footprints sprinkled throughout the footprint libraries ? I can go in and make custom footprints for everything but that kind of defeats the purpose. Is there a particular directory that I should be choosing my footprints from ? Thanks, Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gEDA Symbols
Felipe Balbi wrote: How can I create gEDA symbols for "unsupported" parts ?? Thanks in advance http://www.naic.edu/~rseal/geda-symbols.html ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: net and netname usage
I am having a little difficulty understanding the differences between the "net" and "netname" attributes. I am currently working on a board that uses a variety of voltages and a common ground. Currently, I drop a part into the schematic and edit the "net" attribute to override the hidden power and ground nets. I am also using a few bus lines to clean up the schematic. These bus lines span multiple schematics. Here is my question: Should I use the "netname" attribute to label the nets going to/from the bus lines? Will they be connected when I generate a netlist? Am I doing this properly? Thanks, Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: home made hot plate
Dave N6NZ wrote: Seeing DJ's hot plate photo brought to mind a link I once saw, where a guy built a home-brew SMT hot plate. I can't find the link, but as I recall, he used a few low-ohm high-watt power resistors epoxied to a piece of aluminum sheet. He drove it with a 0-30V bench supply and controlled the temperature manually by varying the voltage. Seems to me that one should be able to build a pretty good hot plate that way for not a lot of money. Although I would think that copper might give more uniform heat spreading than aluminum (at much greater expense, however, unless you get lucky). And a thermostatic temperature control shouldn't be hard. -dave Why not heating wire? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: minor PCB annoyance
DJ Delorie wrote: When selecting a component from the "Select Component" dialog box, That would be in gschem, not pcb? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user Yes, you are right; it is gschem. Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: minor PCB annoyance
Hi, When selecting a component from the "Select Component" dialog box, you must first use the TAB key or mouse click to bring focus to the "Filter:" edit line in order for the search to work properly. If you simply start typing in the Filter box without first manually bringing focus to the edit line, the text is accepted but nothing happens. I suspect this is one of those tricky focus problems that plague all GUI packages. Anyone else see this. By the way, thanks for all of the advice with the ground plane discussion; I did get the fill to work properly after changing a few options as suggested. Thanks, Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: ground plane fill
Hi, I am new to gEDA and beginning my first non-trivial project. I have experimented with different layouts trying to get a feel for the pcb program and cannot seem to get the polygon/rectangle fill to work properly. It seems other layout programs (eagle,protel) allow you to perform the routes, get everything the way you want it, and then apply a fill over the existing board. Normally, this will provide proper clearance around parts, traces, vias, etc... but the behavior seems different when using pcb. Can someone point me in the right direction or provide a short answer on the proper usage of the polygon/rectangle fill function. Thanks, Ryan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
