Re: gEDA-user: bypass caps
On Aug 21, 2006, at 8:41 PM, John Griessen wrote: Do you hack code on the old machines and also hack on their circuit boards/ Just how much hacking are we talking about here? Both. Lots of both! 8-) I'm currently restoring a PDP-8/e with two RK05 disk drives, a TU56 tape subsystem, and 24kW of core. Good stuff. The system is running OS/8. -Dave -- Dave McGuire Cape Coral, FL ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
Dave, Do you hack code on the old machines and also hack on their circuit boards/ Just how much hacking are we talking about here? JOhn G Dave McGuire wrote: (I have ~200 qbus, unibus, and omnibus boards here; I hack on 'em all the time) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
Does the 60% derating term mean use 40% of the full value? Does the de in derating imply a subtract? John G John Doty wrote: I just located my copy of NASA practice no PD-ED-1201, which covers electronic part derating. Table I in that doc calls out derating caps by 60%. It does not distinguish between electrolytics, ceramics, or ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
You're hurtin' me here. HURTIN' ME! ;) -Dave On Aug 21, 2006, at 7:01 PM, Steve Meier wrote: Stuart, Yep it is time to put a cap on it. Steve M. I feel like I'm beating this horse far beyond the point where it's already dead. . . . . . Stuart ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user -- Dave McGuire Cape Coral, FL ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
Stuart, Yep it is time to put a cap on it. Steve M. > I feel like I'm beating this horse far beyond the point where it's > already dead. . . . . . > Stuart ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
> I feel like I'm beating this horse far beyond the point where it's > already dead. . . . . . But I'm still learning stuff, so I'm OK with it. > But I looked at your most recent layout, and another question > occurred to me: Is there a reason you are using long, spindly traces > [1] for VCC/GND, and not using great big polygons (areafills) [2]? I thought of that. I'm still tweaking the layout a little, and managing the polygons is hard (and slow) with complex boards. > [2] Besides the fact that doing areafills using PCB is still a PITA, > that is . . . . :-P ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
On Aug 21, 2006, at 12:19 PM, Stuart Brorson wrote: I believe that back in the 70s DEC used to use two layer boards with PWR and GND run on busses layed out on a rectilinear grid. Signal traces were on top (IIRC) and PWR/GND on teh bottom. The DIPs were layed out in rectangular rows following teh same grid. Fingers would extend from the PWR and GND busses to each DIP to feed its power/ground pins. This is true of *some* DEC boards but definitely not all. I see it on about 1/3 of them. That scheme didn't seem to last long before they went to multilayer boards with embedded power/ground layers. (I have ~200 qbus, unibus, and omnibus boards here; I hack on 'em all the time) -Dave -- Dave McGuire Cape Coral, FL ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
I updated the board online, adding five 10uF 0805s around the board. One near each incoming power, two in the middle, and one at the other end of the board. Plus the one 10uF on the 3.3v regulator. I feel like I'm beating this horse far beyond the point where it's already dead. . . . . . But I looked at your most recent layout, and another question occurred to me: Is there a reason you are using long, spindly traces [1] for VCC/GND, and not using great big polygons (areafills) [2]? For SI, it would be far, far better to have large PWR/GND plane areas separated by small voids than have long, spindly traces like you have now. It would certainly cut way down on teh inductance you have in your PWR/GND network . . . . Stuart [1] Yes, I realize they are 12 or 20 mil (or somethign like that), but they are not great big areafills. And since they are long, isolated traces, they will have inductance. [2] Besides the fact that doing areafills using PCB is still a PITA, that is . . . . ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
One more factoid for the general edification of the group: If you google around you can also find JPL's latest derating guidelines. It is a very good doc which I just uncovered since this discussion put me in the mood to uncover more source material. The doc you want is JPL-D-8545, Rev. D. Google on "JPL JPL-D-8545". Stuart ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
On Aug 21, 2006, at 1:26 PM, Stuart Brorson wrote: Also remember that NASA recommendations tend to be super conservative. I would normally agree, except that NASA's 60% rating suggests using a 10V cap to hold off 6V, which seems too low to me. A 2X derating would suggest at least 12V to stand off 6V, whereas my 3X derating guideline says at least 18V rated caps. I don't know why NASA suggests only 60% derating. Remember that chips are easier to kill with overvoltage than caps, and standard operating voltages for chips are usually >60% of maximum ratings. A lot depends on what you're doing with it though. Capacitor voltage ratings for AC and high current pulse ratings are often much lower than DC. But a bypass cap tends to lead a rather sheltered life. Also don't derate *too* much: I've gotten my wrist slapped by a NASA R&QA guy for using 50V ceramic bypasses in 5V circuits. 10X derating is wy over the top, don't you think? But if the caps come in the same footprint as 15V caps, say, then why not? Well, that was my reasoning. But the NASA R&QA guy didn't like it because of this self-healing theory... John Doty Noqsi Aerospace, Ltd. [EMAIL PROTECTED] ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
Also remember that NASA recommendations tend to be super conservative. I would normally agree, except that NASA's 60% rating suggests using a 10V cap to hold off 6V, which seems too low to me. A 2X derating would suggest at least 12V to stand off 6V, whereas my 3X derating guideline says at least 18V rated caps. I don't know why NASA suggests only 60% derating. Also don't derate *too* much: I've gotten my wrist slapped by a NASA R&QA guy for using 50V ceramic bypasses in 5V circuits. 10X derating is wy over the top, don't you think? But if the caps come in the same footprint as 15V caps, say, then why not? Stuart ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
Here are some links I found from "electrolytic capacitor lifetime": http://www.aavidthermalloy.com/technical/papers/capacitor.shtml http://www.nichicon-us.com/english/seihin/pdfs/e-nx.pdf http://powerelectronics.com/mag/power_optimize_electrolytic_capacitor/index.html http://www.evoxrifa.com/electrolytic_cat/electrolytic_appguide.pdf On Mon, 21 Aug 2006, DJ Delorie wrote: Also, a Google search will turn up lots of info about how to properly select an electrolytic cap. Too much info. What keywords should I be using? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
On Aug 21, 2006, at 5:10 AM, Stuart Brorson wrote: For your furnace controller, you probably won't see any difference between 1.0uF and 0.1 uF; either one will work for you. It's not necessarily in the same class as the GHz server motherboards or 10 GHz router boards that the SI gurus argue about. It's not the *application* that matters: it's the *parts*! A chip capable of 500 MHz operation needs layout and bypassing appropriate to that speed. Otherwise, you're asking for double clocking, oscillation, crosstalk, etc. This can be a real problem with specialized aerospace chips (so-called "high reliability". Yeah right...), where things like clock rates are grossly derated on the spec sheet already, and you can be burned by things that are a *lot* faster than you expect. I've seen this cost millions of dollars when at the last moment it was found that the circuit didn't work cold, because a chip ran too fast for its bypass arrangements... John Doty Noqsi Aerospace, Ltd. [EMAIL PROTECTED] ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
> You may want to try the capacitor manufacturer websites --- Kemet, > AVX, Nichicon, etc. Ah, so Google isn't always my friend? ;-) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
On 8/21/06, DJ Delorie <[EMAIL PROTECTED]> wrote: > Also, a Google search will turn up lots of info about how to > properly select an electrolytic cap. Too much info. What keywords should I be using? You may want to try the capacitor manufacturer websites --- Kemet, AVX, Nichicon, etc. (* jcl *) -- http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
> Also, a Google search will turn up lots of info about how to > properly select an electrolytic cap. Too much info. What keywords should I be using? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
On Aug 21, 2006, at 12:52 PM, Stuart Brorson wrote: I just located my copy of NASA practice no PD-ED-1201, which covers electronic part derating. Table I in that doc calls out derating caps by 60%. It does not distinguish between electrolytics, ceramics, or other types of cap. You may be able to locate that doc by Googling (TM) for it. Therefore, my 3X derating is conservative. FWIW, 3X is not my invention, but rather a derating I leared somewhere along the line. In any event, I'd rather stick with a conservative derating than have to fix burned boards! Also remember that NASA recommendations tend to be super conservative. Also don't derate *too* much: I've gotten my wrist slapped by a NASA R&QA guy for using 50V ceramic bypasses in 5V circuits. There is a belief that ceramics can be self healing if not derated *too* much. I flew the caps anyway, hundreds of them, and they have been fine for nearly six years in orbit. With NASA, you need to do a lot of research to figure out which recommendations are rationally based in real experience, which are 40 year old superstition, and which are the result of empire building by ambitious bureaucrats. For tantalums, some manufacturers publish data on expected life versus stress. I believe Kemet is one. The data suggest much longer life at low stress (voltage, ripple current). John Doty Noqsi Aerospace, Ltd. [EMAIL PROTECTED] ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
On Aug 20, 2006, at 10:56 PM, DJ Delorie wrote: 0.1 uF or 1 uF ? Same footprint (0603), the 1uFs are a few cents more each (er, ~ 40% more cost for 10x the capacitance). Don't know if the 0.1uFs have some benefits inductance-wise or ESR-wise, in general. If they are both 0603, inductance should be about the same. For a component (like a resistor or capacitor) that doesn't concentrate a magnetic field internally, the inductance you measure depends more on the test setup (particularly where the return current flows) than on the component. A metal slug in place of the component will give you about the same result. As a rough estimate, figure ~1nF/mm of component length assuming the return path isn't too far away (this is why a ground plane is good). ESR is a whole other can of worms. It's not sensitive to test geometry like inductance, but it's very sensitive to the frequency and amplitude of the test signal. John Doty Noqsi Aerospace, Ltd. [EMAIL PROTECTED] ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
> Also, with electrolytics, you need to pay attention to the temp > rating. 85C rated caps are for cheap consumer junk. You want at > least 105C for industrial equpt, IMO, and 125C is better It's going to be bolted to my FURNACE. So yeah, high temp range is good. It's on the duct that carries freshly heated or cooled air back to the house. > if you don't mind the cost Shouldn't be that bad for a one-off. Er, three-off. > and increased board real estate. That might be an issue. I'll have to see how much space remains when I get to that point. I'm putting it off a little to get these other projects out of the way, and because I'm waiting for digikey to carry the new connectors I want (3.5mm top-access-only) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
What about Al electrolytics? Like, for power supply bulk filtering? The furnace controller will be seeing 34 Vdc peak, does that mean 100v caps? Yes, that's what I'd do. I just located my copy of NASA practice no PD-ED-1201, which covers electronic part derating. Table I in that doc calls out derating caps by 60%. It does not distinguish between electrolytics, ceramics, or other types of cap. You may be able to locate that doc by Googling (TM) for it. Therefore, my 3X derating is conservative. FWIW, 3X is not my invention, but rather a derating I leared somewhere along the line. In any event, I'd rather stick with a conservative derating than have to fix burned boards! Stuart ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
What about Al electrolytics? Like, for power supply bulk filtering? The furnace controller will be seeing 34 Vdc peak, does that mean 100v caps? Yes, that's what I'd do. Also, with electrolytics, you need to pay attention to the temp rating. 85C rated caps are for cheap consumer junk. You want at least 105C for industrial equpt, IMO, and 125C is better if you don't mind the cost and increased board real estate. The lifetime of an electrolytic cap depends exponentially upon the difference (rated temp - operating temp), so using higher rated temps is a very good idea. Nichicon has a long app note talking about electrolytic cap lifetime issues. Google for it, it's worth reading. Also, a Google search will turn up lots of info about how to properly select an electrolytic cap. Stuart ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
> 1. Make sure DigiKey has stock (info available from their web site). I have a search box on my home page that automatically selects "in stock only". It's something I'm slightly paranoid about. I can also alter the design after I order based on what I *actually* get. > 2. The rule of thumb for voltage ratings on caps is to use 3X the > highest voltage you will place on it. That is, for a 5V rail, use 16V > rated caps. (Some people will use 2X, but that's cutting it close, > IMO.) Therefore, you should use at least 16V rated ceramic caps. I'll see what I can find for 16v then. > For Ta caps, use at least 3X the voltage, and use more if feasible. What about Al electrolytics? Like, for power supply bulk filtering? The furnace controller will be seeing 34 Vdc peak, does that mean 100v caps? > gattrib foo_1.sch foo_2.sch foo_3.sch > > Or am I missing something? Ok, that was easy :-P ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
> Yeah, my sort algorithm (stolen from the web somewhere) sorts by > ASCII character, not by anything more intelligent. I can fix that > at some point. pcb has a sort-helper that does the right thing, if you want to grab a copy of it. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
Hmmm, do you actually have 10uF 0603 ceramic caps in hand? I'd bet dollars to doughnuts that you either haven't looked for them, or your haven't ordered them yet (so you haven't found out that they are only brochureware). Digikey ECJ-1VB0J106M It's the biggest value 0603 cap Panasonic makes (6.3v though) Murata makes an 0805 10uF 16v ceramic for a little less. Maybe I should switch to that? 1. Make sure DigiKey has stock (info available from their web site). If not, check the lead time. 2. The rule of thumb for voltage ratings on caps is to use 3X the highest voltage you will place on it. That is, for a 5V rail, use 16V rated caps. (Some people will use 2X, but that's cutting it close, IMO.) Therefore, you should use at least 16V rated ceramic caps. For Ta caps, use at least 3X the voltage, and use more if feasible. FYI I've spent the last day or so finalizing the sram board, which means I've spent a LOT of time with gattrib and gsch2pcb, and filling in the manufacturer and digikey part numbers, pdf references, and prices. I'm near the ordering step, so I'm avoiding things that I can't actually buy :-) gattrib wish: support multi-page schematics, and I REALLY want to be able to paste whole blocks of bypass caps from one example row! gattrib foo_1.sch foo_2.sch foo_3.sch Or am I missing something? If you open schematics from gattrib's file->open menu, then you can use the shift key to select multiple files to open at once. Also, refdes should sort number parts numerically; I see C30 C301 C302 C31 C32 etc. Yeah, my sort algorithm (stolen from the web somewhere) sorts by ASCII character, not by anything more intelligent. I can fix that at some point. Stuart ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
> > I put a copy here: http://www.delorie.com/pcb/m3a-exp-board.pcb > > I looked at your board. The 0603 position on the back of the board > looks good. One thing: Why not put a couple of 10uF tantalum caps at > strategic positions along the PWR/GND busses? I updated the board online, adding five 10uF 0805s around the board. One near each incoming power, two in the middle, and one at the other end of the board. Plus the one 10uF on the 3.3v regulator. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
> Have you ever looked at the capacitance-vs-voltage curves for Y5V > dielectric? Yuck. I've been avoiding the 20/80 caps for anything other than bulk bypassing, but I'm easily talked out of them completely. OTOH this board will only see room temperature. I'll look for high-temp-range parts for the furnace controller. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
DJ - On Mon, Aug 21, 2006 at 02:01:51PM -0400, DJ Delorie wrote: > > Plus scattering some 10uF (also 0603 ceramic) around. > Or this one: digikey PCC2233CT-ND > 10uF 0805 ceramic, 10v, +20% -80%, only $0.20 each. Have you ever looked at the capacitance-vs-voltage curves for Y5V dielectric? Yuck. - Larry ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
> Plus scattering some 10uF (also 0603 ceramic) around. Or this one: digikey PCC2233CT-ND 10uF 0805 ceramic, 10v, +20% -80%, only $0.20 each. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
> Hmmm, do you actually have 10uF 0603 ceramic caps in hand? I'd bet > dollars to doughnuts that you either haven't looked for them, or your > haven't ordered them yet (so you haven't found out that they are only > brochureware). Digikey ECJ-1VB0J106M It's the biggest value 0603 cap Panasonic makes (6.3v though) Murata makes an 0805 10uF 16v ceramic for a little less. Maybe I should switch to that? FYI I've spent the last day or so finalizing the sram board, which means I've spent a LOT of time with gattrib and gsch2pcb, and filling in the manufacturer and digikey part numbers, pdf references, and prices. I'm near the ordering step, so I'm avoiding things that I can't actually buy :-) gattrib wish: support multi-page schematics, and I REALLY want to be able to paste whole blocks of bypass caps from one example row! Also, refdes should sort number parts numerically; I see C30 C301 C302 C31 C32 etc. And this time, I'm waiting for the parts to show up - so I can compare them to the board layout prints - before I fab the board! ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
Great minds think alike; I'm currently doing that. Caps are cheap, so for the srams example, I'm using 0.1uF at each power pin (16 total), and 1uF at the end of each sram bus (eight total). Plus scattering some 10uF (also 0603 ceramic) around. Hmmm, do you actually have 10uF 0603 ceramic caps in hand? I'd bet dollars to doughnuts that you either haven't looked for them, or your haven't ordered them yet (so you haven't found out that they are only brochureware). The reason I say that is that you can't get 10uF 0603 ceramic caps . . . to the best of my knowledge that is. The 0603 package is too small to support 10uF. Getting 10uF into 1206 is pushing it. I'm willing to be proven wrong, of course, but you should at least be aware that 10uF in a 0603 package is a stretch. You're better off with Ta caps when you get to these larger values since your options for procuring real parts are much better. Stuart ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
On 8/21/06, DJ Delorie <[EMAIL PROTECTED]> wrote: Plus scattering some 10uF (also 0603 ceramic) around. > Don't forget to derate the Ta voltage by a factor of 3. That is, if > your VCC is 5V, you need at least a 16V Ta cap for safety. I think they're all 16v anyway, but I'll double check. You only need the derating for the Ta cap. If you are using the ceramic 10uF you will be OK. (* jcl *) -- http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
> I looked at your board. The 0603 position on the back of the board > looks good. One thing: Why not put a couple of 10uF tantalum caps > at strategic positions along the PWR/GND busses? Great minds think alike; I'm currently doing that. Caps are cheap, so for the srams example, I'm using 0.1uF at each power pin (16 total), and 1uF at the end of each sram bus (eight total). Plus scattering some 10uF (also 0603 ceramic) around. > Don't forget to derate the Ta voltage by a factor of 3. That is, if > your VCC is 5V, you need at least a 16V Ta cap for safety. I think they're all 16v anyway, but I'll double check. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
I put a copy here: http://www.delorie.com/pcb/m3a-exp-board.pcb I looked at your board. The 0603 position on teh back of the board looks good. One thing: Why not put a couple of 10uF tantalum caps at strategic positions along the PWR/GND busses? Perhaps one at each power connector, and one in the middle? Or -- better -- 10uF at each power conn, and then a 2.2uF on teh back side for each SOIC row pair? You really want to have some bulk decoupling, and for a bus topology like this it helps to distribute the capacitance rather than lumping it in one place. Don't forget to derate the Ta voltage by a factor of 3. That is, if your VCC is 5V, you need at least a 16V Ta cap for safety. Stuart ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
> Panelize ;-) 1. It's the sq in cost that's still high. 2. I'm already putting 100 challenge boards and one sram board onto the panel. 3. It's not like I've got *that* many four layer projects to do! ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
On 8/21/06, DJ Delorie <[EMAIL PROTECTED]> wrote: > Yuck! No GND plane! How barbaric! How '70s! Yeah, well, when 4 layer proto costs come down as much as 2 layer have come down recently, I'll switch for good. Panelize ;-) (* jcl *) -- http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
> Yuck! No GND plane! How barbaric! How '70s! Yeah, well, when 4 layer proto costs come down as much as 2 layer have come down recently, I'll switch for good. I put a copy here: http://www.delorie.com/pcb/m3a-exp-board.pcb ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
I'm working on a simple sram/ethernet add-on card for one of my m32c starter kits. It's a 2 layer 3.5x4.5 board, 32MHz signalling, and the power and ground are "tree structure" - i.e. no planes (won't fit) - with 20 mil traces (signals are 8 mil). Heck power and ground enter the board about 3" apart on the connector! (yes, they put one on each end). This fab will also have the challenge boards on it, so 4 layer is not an option. Yuck! No GND plane! How barbaric! How '70s! I believe that back in the 70s DEC used to use two layer boards with PWR and GND run on busses layed out on a rectilinear grid. Signal traces were on top (IIRC) and PWR/GND on teh bottom. The DIPs were layed out in rectangular rows following teh same grid. Fingers would extend from the PWR and GND busses to each DIP to feed its power/ground pins. If you adopt that approach, then you should put some big tantalum caps between the PWR and GND busses at the end of each component row. Then, at each component use a 0.1uF ceramic cap to bypas each chip. Here's some ASCII art describing the scheme: VCC GND Feed point #### ##|| ## ##||--##10uF tant ##|| ## #### #### ##||--##.1uF ceramic ## - # ## | |## ## | |## ## | |## #-## #### #### ##||--## .1 uF ceramic ## - # ## | |## ## | |## ## | |## #-## #### #### VCC GND Feed point I won't guarantee that it is the optimal layout, particularly for a high-speed board, but it's what the folks at DEC used to do back in the day. Stuart ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
Ok, in all fairness, my fault for not specifying the project (not the furnace controller this time). I'm working on a simple sram/ethernet add-on card for one of my m32c starter kits. It's a 2 layer 3.5x4.5 board, 32MHz signalling, and the power and ground are "tree structure" - i.e. no planes (won't fit) - with 20 mil traces (signals are 8 mil). Heck power and ground enter the board about 3" apart on the connector! (yes, they put one on each end). This fab will also have the challenge boards on it, so 4 layer is not an option. Each of the eight 512k SRAM chips have two power pairs, so two bypass caps. The ethernet chip gets three at the chip, and two more (larger) around the 3.3v regulator. Plus one for the 3:8 address decoder. But it sounds like 0.1uF at the power pins and a few 1uF elsewhere would be ok? The m32c board itself has a 100uF after the 7805. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
DJ - On Mon, Aug 21, 2006 at 12:56:37AM -0400, DJ Delorie wrote: > > 0.1 uF or 1 uF ? Same footprint (0603), the 1uFs are a few cents more > each (er, ~ 40% more cost for 10x the capacitance). > Don't know if the 0.1uFs have some benefits inductance-wise or > ESR-wise, in general. This is indeed the trick -- it's unusual to get believable parasitic inductance information from capacitor manufacturers. ESR on a ceramic cap is pretty close to zero; all the damping at the LC resonance will come from the parallel resistance provided by your circuit. I found some nice ceramic capacitor inductance curves (representative, not definitive) from AVX. Go to Digi-Key, bring up a page of 0.1 uF ceramic capacitors, and click through to the datasheets. Like I say, some manufacturers are more helpful than others. The actual parts probably don't change much, as long as you stick to the same package size and dielectric type. - Larry ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
0.1 uF or 1 uF ? Same footprint (0603), the 1uFs are a few cents more each (er, ~ 40% more cost for 10x the capacitance). Don't know if the 0.1uFs have some benefits inductance-wise or ESR-wise, in general. This question (and those like it) is the topic of constant debate on SI-LIST. My take-away is that if you are doing an agressive high speed design, then you need to worry about the inductance of your caps. Caps turn inductive at high frequencies (lead inductance, stray inductance, etc.) The 1.0uF will turn inductave at a lower frequency than the 0.1uF cap. Therefore, the SI gurus suggest that you use a pair of caps in parallel -- 1uF and 0.01uF say -- to maximize the frequency region over which your bypass circuit looks capacitave. That being said, I have never actually used this advice. I haven't been doing RF boards that sensitive to SI issues. I tend to use either an 0.01uF or 0.1uF cap on each power pin, and sprinkle a couple of 10uF Tantalum caps around the board for bulk decoupling. For small boards, just one 10uF tantalum cap at each power supply is sufficient. That approach works just fine in my experience. For your furnace controller, you probably won't see any difference between 1.0uF and 0.1 uF; either one will work for you. It's not necessarily in the same class as the GHz server motherboards or 10 GHz router boards that the SI gurus argue about. You *are* going to use a GND plane on the board's back, aren't you? Putting a GND plane on the back of your board is 1 times more important than the difference between 1.0uF and 0.1uF bypass caps. Stuart ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: bypass caps
A more expansive question is about the selection of inductors and capacitors for power supplies. The issue as I under stand it is that we put inductors comming out of power supplies to insure a "constant" current and capacitors are there for a "constant" voltage. In reality these devices help but arn't perfect so that there isn't a constant current or voltage but there is an approximation that has an amount of ripple which is dependent upon the selection "intentional or not" of the amount of inductance and capacitance. The amount of ripple can be critical. hmmm ask any drunk they might tell you the more the ripple the happier we can be. For your furnace controller i suspect we are talking low frequencies so either .1 or 1 uF will probably do just as well. For high frequency systems the ripple might become critical. Look at recomndations for Altera or xilinx devices... uh from a practicle purpose toss in a few extra land points for capacitors or be preparied to stack them. Power supplies sometimes do require tweeking. Steve Meier DJ Delorie wrote: >0.1 uF or 1 uF ? Same footprint (0603), the 1uFs are a few cents more >each (er, ~ 40% more cost for 10x the capacitance). > >Don't know if the 0.1uFs have some benefits inductance-wise or >ESR-wise, in general. > > >___ >geda-user mailing list >geda-user@moria.seul.org >http://www.seul.org/cgi-bin/mailman/listinfo/geda-user > > ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
