AW: [PATCH 0/4] ARM: Add support for emtrion's octa-core emCON-RZ/G1H and Renesas SCIFA
patch 1: https://www.mail-archive.com/jailhouse-dev@googlegroups.com/msg04188.html (based on next) patch 2: https://www.mail-archive.com/jailhouse-dev@googlegroups.com/msg04190.html (based on next) patch 3: https://www.mail-archive.com/jailhouse-dev@googlegroups.com/msg04194.html (based on next) -Ursprüngliche Nachricht- Von: Jan Kiszka [mailto:jan.kis...@siemens.com] Gesendet: Donnerstag, 1. Februar 2018 18:54 An: von Wiarda, Jan; JailhouseMailingListe Betreff: Re: [PATCH 0/4] ARM: Add support for emtrion's octa-core emCON-RZ/G1H and Renesas SCIFA On 2018-01-31 14:34, jan.vonwia...@emtrion.com wrote: > From: Jan von Wiarda > > This patchset introduces support for emtrion's octa-core emCON-RZ/G1H > and Renesas SCIFA serial interfaces. > > Jan von Wiarda (4): > configs: Add support for emtrion's octa-core emCON-RZ/G1H > inmates: Add inmate support for Renesas SCIFA serial communication > interface > arm: Add hypervisor support for Renesas SCIFA serial communication > interface > core: Add Renesas SCIFA as console type > > configs/arm/dts/inmate-emtrion-emconrzg1h.dts | 182 + > configs/arm/emtrion-rzg1h-linux-demo.c| 170 > configs/arm/emtrion-rzg1h-uart-demo.c | 56 > configs/arm/emtrion-rzg1h.c | 370 > ++ > hypervisor/arch/arm-common/Kbuild | 2 +- > hypervisor/arch/arm-common/dbg-write.c| 2 + > hypervisor/arch/arm-common/include/asm/uart.h | 2 +- > hypervisor/arch/arm-common/uart-scifa.c | 73 + > include/jailhouse/cell-config.h | 1 + > inmates/lib/arm-common/Makefile.lib | 2 +- > inmates/lib/arm-common/include/uart.h | 1 + > inmates/lib/arm-common/printk.c | 2 + > inmates/lib/arm-common/uart-scifa.c | 88 ++ > inmates/lib/arm/include/mach.h| 20 +- > 14 files changed, 964 insertions(+), 7 deletions(-) create mode > 100644 configs/arm/dts/inmate-emtrion-emconrzg1h.dts > create mode 100644 configs/arm/emtrion-rzg1h-linux-demo.c > create mode 100644 configs/arm/emtrion-rzg1h-uart-demo.c > create mode 100644 configs/arm/emtrion-rzg1h.c create mode 100644 > hypervisor/arch/arm-common/uart-scifa.c > create mode 100644 inmates/lib/arm-common/uart-scifa.c > Err, and that is v2, replacing both the first series [1] as well as the fix-up I just commented on [2], correct? Please version your patches/series and state if some other patch became obsolete. Thanks, Jan [1]https://www.mail-archive.com/jailhouse-dev@googlegroups.com/msg04115.html [2] https://www.mail-archive.com/jailhouse-dev@googlegroups.com/msg04157.html -- Siemens AG, Corporate Technology, CT RDA IOT SES-DE Corporate Competence Center Embedded Linux -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to jailhouse-dev+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout. <>
[PATCH v2] configs: Device Tree Revision for Linux inmates on emCON-RZ/G1E and emCON-RZ/G1M
From: Jan von Wiarda This patchset removes the warnings of the latest 4.15 device tree compiler. In addition it includes the defines of missing header files directly in the device tree source file. Signed-off-by: Jan von Wiarda Signed-off-by: Ruediger Fichter --- configs/arm/dts/inmate-emtrion-emconrzg1e.dts | 23 +++ configs/arm/dts/inmate-emtrion-emconrzg1m.dts | 24 +++- 2 files changed, 14 insertions(+), 33 deletions(-) diff --git a/configs/arm/dts/inmate-emtrion-emconrzg1e.dts b/configs/arm/dts/inmate-emtrion-emconrzg1e.dts index 44266251..d04bd3e7 100644 --- a/configs/arm/dts/inmate-emtrion-emconrzg1e.dts +++ b/configs/arm/dts/inmate-emtrion-emconrzg1e.dts @@ -14,7 +14,9 @@ */ #include -#include + +#define R8A7745_PD_CA7_CPU16 +#define R8A7745_PD_ALWAYS_ON 32 /dts-v1/; @@ -37,18 +39,13 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu@1 { enable-method = "psci"; device_type = "cpu"; compatible = "arm,cortex-a7"; - reg = <0x0>; - clock-frequency = <0x3b9aca00>; - power-domains = <0x2 0x5>; - clocks = <0x3>; - operating-points = <0xf4240 0xf4240>; - next-level-cache = <0x4>; - linux,phandle = <0x5>; - phandle = <0x5>; + reg = <1>; + clock-frequency = <10>; + power-domains = <&sysc R8A7745_PD_CA7_CPU1>; }; }; @@ -116,15 +113,10 @@ pfc: pin-controller@e606 { compatible = "renesas,pfc-r8a7745"; reg = <0x0 0xe606 0x0 0x11c>; - #gpio-range-cells = <0x3>; - linux,phandle = <0x7>; - phandle = <0x7>; serial4 { renesas,groups = "scif4_data_c"; renesas,function = "scif4"; - linux,phandle = <0x12>; - phandle = <0x12>; }; sdhi0_pins: sd0 { @@ -163,7 +155,6 @@ status = "okay"; clocks = <&scif4_clk 0>; clock-names = "peripheral_clk"; - pinctrl-0 = <0x12>; pinctrl-names = "default"; }; diff --git a/configs/arm/dts/inmate-emtrion-emconrzg1m.dts b/configs/arm/dts/inmate-emtrion-emconrzg1m.dts index ee433010..d95a03d2 100644 --- a/configs/arm/dts/inmate-emtrion-emconrzg1m.dts +++ b/configs/arm/dts/inmate-emtrion-emconrzg1m.dts @@ -14,7 +14,9 @@ */ #include -#include + +#define R8A7743_PD_CA15_CPU1 1 +#define R8A7743_PD_ALWAYS_ON 32 /dts-v1/; @@ -37,19 +39,13 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu@1 { enable-method = "psci"; device_type = "cpu"; compatible = "arm,cortex-a15"; - reg = <0x0>; - clock-frequency = <0x59682f00>; - voltage-tolerance = <0x1>; - clocks = <0x2 0x8>; - clock-latency = <0x493e0>; - power-domains = <0x3 0x0>; - operating-points = <0x16e360 0xf4240 0x1406f4 0xf4240 - 0x112a88 0xf4240 0xe4e1c 0xf4240 - 0xb71b0 0xf4240 0x5b8d8 0xf4240>; + reg = <1>; + clock-frequency = <15>; + power-domains = <&sysc R8A7743_PD_CA15_CPU1>; }; }; @@ -117,15 +113,10 @@ pfc: pin-controller@e606 { compatible = "renesas,pfc-r8a7743"; reg = <0x0 0xe606 0x0 0x11c>; - #gpio-range-cells = <0x3>; - linux,phandle = <0x7>; - phandle = <0x7>; serial6 { renesas,groups = "scif4_data_c"; renesas,function = "scif4"; - linux,phandle = <0x12>; - phandle = <0x12>; }; sdhi0_pins: sd0 { @@ -164,7 +155,6 @@ status = "okay"; clocks = <&scif4_clk 0>; clock-names = "peripheral_clk"; - pinctrl-0 = <0x12>; pinctrl-names = "default"; }; -- 2.11.0 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to jailhouse-dev+unsubscr...@googlegroups.com. For more options, visit https://groups.
Re: [PATCH 0/4] ARM: Add support for emtrion's octa-core emCON-RZ/G1H and Renesas SCIFA
On 2018-01-31 14:34, jan.vonwia...@emtrion.com wrote: > From: Jan von Wiarda > > This patchset introduces support for emtrion's octa-core emCON-RZ/G1H and > Renesas SCIFA serial interfaces. > > Jan von Wiarda (4): > configs: Add support for emtrion's octa-core emCON-RZ/G1H > inmates: Add inmate support for Renesas SCIFA serial communication > interface > arm: Add hypervisor support for Renesas SCIFA serial communication > interface > core: Add Renesas SCIFA as console type > > configs/arm/dts/inmate-emtrion-emconrzg1h.dts | 182 + > configs/arm/emtrion-rzg1h-linux-demo.c| 170 > configs/arm/emtrion-rzg1h-uart-demo.c | 56 > configs/arm/emtrion-rzg1h.c | 370 > ++ > hypervisor/arch/arm-common/Kbuild | 2 +- > hypervisor/arch/arm-common/dbg-write.c| 2 + > hypervisor/arch/arm-common/include/asm/uart.h | 2 +- > hypervisor/arch/arm-common/uart-scifa.c | 73 + > include/jailhouse/cell-config.h | 1 + > inmates/lib/arm-common/Makefile.lib | 2 +- > inmates/lib/arm-common/include/uart.h | 1 + > inmates/lib/arm-common/printk.c | 2 + > inmates/lib/arm-common/uart-scifa.c | 88 ++ > inmates/lib/arm/include/mach.h| 20 +- > 14 files changed, 964 insertions(+), 7 deletions(-) > create mode 100644 configs/arm/dts/inmate-emtrion-emconrzg1h.dts > create mode 100644 configs/arm/emtrion-rzg1h-linux-demo.c > create mode 100644 configs/arm/emtrion-rzg1h-uart-demo.c > create mode 100644 configs/arm/emtrion-rzg1h.c > create mode 100644 hypervisor/arch/arm-common/uart-scifa.c > create mode 100644 inmates/lib/arm-common/uart-scifa.c > Err, and that is v2, replacing both the first series [1] as well as the fix-up I just commented on [2], correct? Please version your patches/series and state if some other patch became obsolete. Thanks, Jan [1]https://www.mail-archive.com/jailhouse-dev@googlegroups.com/msg04115.html [2] https://www.mail-archive.com/jailhouse-dev@googlegroups.com/msg04157.html -- Siemens AG, Corporate Technology, CT RDA IOT SES-DE Corporate Competence Center Embedded Linux -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to jailhouse-dev+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [PATCH] configs: Device Tree Revision for Linux inmates on emCON-RZ/G1E and emCON-RZ/G1M
On 2018-01-29 12:18, jan.vonwia...@emtrion.com wrote: > From: Jan von Wiarda > > This patchset removes the warnings of the latest 4.15 device tree compiler. > In addition it includes the defines of missing header files directly in the > device tree source file. > > Signed-off-by: Jan von Wiarda > Signed-off-by: Ruediger Fichter > --- > configs/dts/inmate-emtrion-emconrzg1e.dts | 23 +++ > configs/dts/inmate-emtrion-emconrzg1m.dts | 24 +++- > 2 files changed, 14 insertions(+), 33 deletions(-) > > diff --git a/configs/dts/inmate-emtrion-emconrzg1e.dts > b/configs/dts/inmate-emtrion-emconrzg1e.dts > index 05b8ca0..ec7bcc4 100644 > --- a/configs/dts/inmate-emtrion-emconrzg1e.dts > +++ b/configs/dts/inmate-emtrion-emconrzg1e.dts > @@ -14,7 +14,9 @@ > */ > > #include > -#include > + > +#define R8A7745_PD_CA7_CPU1 6 > +#define R8A7745_PD_ALWAYS_ON 32 > > /dts-v1/; > > @@ -37,18 +39,13 @@ > #address-cells = <1>; > #size-cells = <0>; > > - cpu@0 { > + cpu@1 { > enable-method = "psci"; > device_type = "cpu"; > compatible = "arm,cortex-a7"; > - reg = <0x0>; > - clock-frequency = <0x3b9aca00>; > - power-domains = <0x2 0x5>; > - clocks = <0x3>; > - operating-points = <0xf4240 0xf4240>; > - next-level-cache = <0x4>; > - linux,phandle = <0x5>; > - phandle = <0x5>; > + reg = <1>; > + clock-frequency = <10>; > + power-domains = <&sysc R8A7745_PD_CA7_CPU1>; > }; > }; > > @@ -116,15 +113,10 @@ > pfc: pin-controller@e606 { > compatible = "renesas,pfc-r8a7745"; > reg = <0x0 0xe606 0x0 0x11c>; > - #gpio-range-cells = <0x3>; > - linux,phandle = <0x7>; > - phandle = <0x7>; > > serial4 { > renesas,groups = "scif4_data_c"; > renesas,function = "scif4"; > - linux,phandle = <0x12>; > - phandle = <0x12>; > }; > > sdhi0_pins: sd0 { > @@ -163,7 +155,6 @@ > status = "okay"; > clocks = <&scif4_clk 0>; > clock-names = "peripheral_clk"; > - pinctrl-0 = <0x12>; > pinctrl-names = "default"; > }; > > diff --git a/configs/dts/inmate-emtrion-emconrzg1m.dts > b/configs/dts/inmate-emtrion-emconrzg1m.dts > index 035331c..9c23489 100644 > --- a/configs/dts/inmate-emtrion-emconrzg1m.dts > +++ b/configs/dts/inmate-emtrion-emconrzg1m.dts > @@ -14,7 +14,9 @@ > */ > > #include > -#include > + > +#define R8A7743_PD_CA15_CPU1 1 > +#define R8A7743_PD_ALWAYS_ON 32 > > /dts-v1/; > > @@ -37,19 +39,13 @@ > #address-cells = <1>; > #size-cells = <0>; > > - cpu@0 { > + cpu@1 { > enable-method = "psci"; > device_type = "cpu"; > compatible = "arm,cortex-a15"; > - reg = <0x0>; > - clock-frequency = <0x59682f00>; > - voltage-tolerance = <0x1>; > - clocks = <0x2 0x8>; > - clock-latency = <0x493e0>; > - power-domains = <0x3 0x0>; > - operating-points = <0x16e360 0xf4240 0x1406f4 0xf4240 > - 0x112a88 0xf4240 0xe4e1c 0xf4240 > - 0xb71b0 0xf4240 0x5b8d8 0xf4240>; > + reg = <1>; > + clock-frequency = <15>; > + power-domains = <&sysc R8A7743_PD_CA15_CPU1>; > }; > }; > > @@ -117,15 +113,10 @@ > pfc: pin-controller@e606 { > compatible = "renesas,pfc-r8a7743"; > reg = <0x0 0xe606 0x0 0x11c>; > - #gpio-range-cells = <0x3>; > - linux,phandle = <0x7>; > - phandle = <0x7>; > > serial6 { > renesas,groups = "scif4_data_c"; > renesas,function = "scif4"; > - linux,phandle = <0x12>; > - phandle = <0x12>; > }; > > sdhi0_pins: sd0 { > @@ -164,7 +155,6 @@ > status = "okay"; > clocks = <&scif4_clk 0>; > clock-names = "peripheral_clk"; > - pinctrl-0 = <0x12>; > pinctrl-names = "default"; > }; > > Am I right: this only fixes the warning for your new series and should go in afterwards? There is no fix for the existing warnings yet? Sorry, I los
FOSDEM
Hi all, in case someone is interested in chatting about Jailhouse over a beer or something else: Henning and I will be hanging out at FOSDEM this weekend. Drop a note, and we can organize a meeting point. Jan -- Siemens AG, Corporate Technology, CT RDA IOT SES-DE Corporate Competence Center Embedded Linux -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to jailhouse-dev+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[PATCH] documentation: Update emCON-RZ/G debug and setup documentation files
From: Jan von Wiarda -added the two new debug interfaces HSCIF and SCIFA from Renesas to the debug output documentation -updated device specific defines in setup documentation of emcon-RZ/G Signed-off-by: Jan von Wiarda --- Documentation/debug-output.md | 2 ++ Documentation/setup-on-emtrion-emcon-rz-boards.md | 10 -- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/Documentation/debug-output.md b/Documentation/debug-output.md index a6f18cd0..10b593c6 100644 --- a/Documentation/debug-output.md +++ b/Documentation/debug-output.md @@ -29,6 +29,8 @@ Possible debug outputs for arm and arm64: - JAILHOUSE_CON1_TYPE_PL011 /* AMBA PL011 UART */ - JAILHOUSE_CON1_TYPE_XUARTPS /* Xilinx UART */ - JAILHOUSE_CON1_TYPE_MVEBU /* Marvell UART */ +- JAILHOUSE_CON1_TYPE_HSCIF /* Renesas HSCIF UART */ +- JAILHOUSE_CON1_TYPE_SCIFA /* Renesas SCIFA UART */ Possible access modes, to be or'ed: diff --git a/Documentation/setup-on-emtrion-emcon-rz-boards.md b/Documentation/setup-on-emtrion-emcon-rz-boards.md index e8ccea0c..c8073502 100644 --- a/Documentation/setup-on-emtrion-emcon-rz-boards.md +++ b/Documentation/setup-on-emtrion-emcon-rz-boards.md @@ -25,9 +25,15 @@ Install and start Jailhouse on emCON-RZ/G1x First we need access to the RootFS of the Linux running on the emCON-RZ/G1x. We assume that you have mounted this on your development workstation through sshfs or nfs. -Copy the Jailhouse config file to the hypervisor include directory: +Now in your Jailhouse source directory, create a file include/jailhouse/config.h. -cp -av ci/jailhouse-config-emcon-rzg.h include/jailhouse/config.h +If you own an emCON-RZ/G1E or emCON-RZ/G1M put the following line to this file: + +#define CONFIG_MACH_EMCON_RZG 1 + +If you own an emCON-RZ/G1H put the following line to this file: + +#define CONFIG_MACH_EMCON_RZG1H1 Then you can compile and install Jailhouse using this command on the development workstation: -- 2.11.0 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to jailhouse-dev+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.