Re: [PATCH] i2c-designware: fix RX FIFO overrun
It does. The bug appears with fairly-sized read transactions (in the order of kB) returning corrupted data. Josef > Josef. > > This fixes a real bug for us does it not, some failure case with a > sustained amount of traffic ? > > > Bryan > > -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] i2c-designware: fix RX FIFO overrun
From a969728248c3b439dc97a69e7dac133b5efa34e7 Mon Sep 17 00:00:00 2001
From: Josef Ahmad
Date: Fri, 19 Apr 2013 17:28:10 +0100
Subject: [PATCH] i2c-designware: fix RX FIFO overrun
i2c_dw_xfer_msg() pushes a number of bytes to transmit/receive
to/from the bus into the TX FIFO.
For master-rx transactions, the maximum amount of data that can be
received is calculated depending solely on TX and RX FIFO load.
This is racy - TX FIFO may contain master-rx data yet to be
processed, which will eventually land into the RX FIFO. This
data is not taken into account and the function may request more
data than the controller is actually capable of storing.
This patch ensures the driver takes into account the outstanding
master-rx data in TX FIFO to prevent RX FIFO overrun.
Signed-off-by: Josef Ahmad
---
drivers/i2c/busses/i2c-designware-core.c | 11 ++-
drivers/i2c/busses/i2c-designware-core.h |2 ++
2 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware-core.c
b/drivers/i2c/busses/i2c-designware-core.c
index 94fd818..8dbeef1 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -426,8 +426,14 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
cmd |= BIT(9);
if (msgs[dev->msg_write_idx].flags & I2C_M_RD) {
+
+ /* avoid rx buffer overrun */
+ if (rx_limit - dev->rx_outstanding <= 0)
+ break;
+
dw_writel(dev, cmd | 0x100, DW_IC_DATA_CMD);
rx_limit--;
+ dev->rx_outstanding++;
} else
dw_writel(dev, cmd | *buf++, DW_IC_DATA_CMD);
tx_limit--; buf_len--;
@@ -480,8 +486,10 @@ i2c_dw_read(struct dw_i2c_dev *dev)
rx_valid = dw_readl(dev, DW_IC_RXFLR);
- for (; len > 0 && rx_valid > 0; len--, rx_valid--)
+ for (; len > 0 && rx_valid > 0; len--, rx_valid--) {
*buf++ = dw_readl(dev, DW_IC_DATA_CMD);
+ dev->rx_outstanding--;
+ }
if (len > 0) {
dev->status |= STATUS_READ_IN_PROGRESS;
@@ -539,6 +547,7 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg
msgs[], int num)
dev->msg_err = 0;
dev->status = STATUS_IDLE;
dev->abort_source = 0;
+ dev->rx_outstanding = 0;
ret = i2c_dw_wait_bus_not_busy(dev);
if (ret < 0)
diff --git a/drivers/i2c/busses/i2c-designware-core.h
b/drivers/i2c/busses/i2c-designware-core.h
index 9c1840e..e761ad1 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -60,6 +60,7 @@
* @adapter: i2c subsystem adapter node
* @tx_fifo_depth: depth of the hardware tx fifo
* @rx_fifo_depth: depth of the hardware rx fifo
+ * @rx_outstanding: current master-rx elements in tx fifo
*/
struct dw_i2c_dev {
struct device *dev;
@@ -88,6 +89,7 @@ struct dw_i2c_dev {
u32 master_cfg;
unsigned inttx_fifo_depth;
unsigned intrx_fifo_depth;
+ int rx_outstanding;
};
#define ACCESS_SWAP0x0001
--
1.7.0.7
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Re: [PATCH] I2C: EXYNOS: High speed mode clock setting for HSI2C
On Fri, Apr 19, 2013 at 05:26:23PM +0530, Yuvaraj Kumar C D wrote: > This patch configure the High speed mode timing register using the > clock speed mentioned in the dts file.Also it configure the MASTER_ID > for High speed i2c transfer. > For i2c high speed transaction, tarnsaction initially starts with the > fast mode i,e 400Kbits/sec and then switches to high speed mode.For this > purpose it requires to set up timing value for fast mode and high speed > mode. > > Signed-off-by: Yuvaraj Kumar C D Since the exynos5 driver needs to be resent anyhow, I assume this will be included in the next version? Please note that I had comments regarding the bindings of the bus speed. We have a generic binding for that already. Thanks, Wolfram -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Re: [PATCH] I2C: Change the value of octeon i2c adapter timeout value
On Fri, Apr 19, 2013 at 09:13:54AM +, EUNBONG SONG wrote: > > > On Fri, Apr 19, 2013 at 12:01:04AM +, EUNBONG SONG wrote: > >> > >> I think HZ/50 is better than 2 for adapter timeout. > > > Basically OK. But why HZ/50? Most drivers use HZ. > > Actually, I just translated 2 jiffies because HZ is 100 in default cavium > config. > You can find that in "arch/mips/configs/cavium_octeon_defconfig". > And i have been using this value over 1 year in octeon board without problem. Have you been writing to EEPROMS? Their erase/write cycle might be longer. But I am not forcing you to change the value, just giving some suggestions. -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] I2C: Fix i2c fail problem when a process is terminated by a signal on octeon in 3.8
On Thu, Apr 18, 2013 at 07:40:16AM +, 송은봉 wrote: > > I rewrite my patch because the patch before i sent have many white space. > Thanks! This should have been below the "---" after the sigend-off. > --- > I've been debugging the abnormal operation of i2c on octeon. > If a process is terminated by signal in the middle of i2c operation, > next i2c read operation which is done by another process was failed. > So i changed to ignore signal in the middle of i2c operation. > After that the problem was not reproduced. > > Signed-off-by: Eunbong Song Applied to for-next, thanks! -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: i2c-mxs woes
Hi Lucas, On 19/04/2013 13:53, Lucas Stach wrote: > Hi Alexandre, > > Am Freitag, den 19.04.2013, 13:37 +0200 schrieb Alexandre Belloni: >> Hi, >> >> I'm having some issues with the i2c-mxs driver in 3.9. Marek already >> pointed me to the patches from Lucas and that greatly improved the >> situation. >> >> For the context, my board has three nau7802 adcs, connected to a gpio >> i2c-muxer, connected to i2c1. >> >> Here is what I observe: >> >> On 3.9: >> >> # time cat /sys/bus/iio/devices/iio:device1/in_voltage0_raw >> 2620 >> real 0m 7.08s >> user 0m 0.00s >> sys 0m 0.02s >> # time cat /sys/bus/iio/devices/iio:device1/in_voltage1_raw >> 2623 >> real 0m 6.07s >> user 0m 0.01s >> sys 0m 0.01s >> # >> > Is this with or without my patches? Before introduction of the error > handling in PIO code there were a lot of situations where the controller > would signal an error, but the driver would go on as usual, so the next > transaction wouldn't succeed and stop for a whole second until the > timeout hits and resets the controller. This is with v2 of your patches. I applied "i2c-mxs remove races in PIO code" and "i2c-mxs do error checking and handling in PIO mode" Regards, -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: i2c-mxs woes
On 19/04/2013 13:49, Marek Vasut wrote: > Looks like there's a fixes 7-second delay. Like a timeout maybe? Yeah, probably, I'm reading 6 times 3 registers of the ADC BTW, the code is there: https://github.com/crystalfontz/cfa_10036_kernel/blob/cfa-3.9-12-10049-i2c-adc/drivers/iio/adc/nau7802.c -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] I2C: EXYNOS: High speed mode clock setting for HSI2C
This patch configure the High speed mode timing register using the
clock speed mentioned in the dts file.Also it configure the MASTER_ID
for High speed i2c transfer.
For i2c high speed transaction, tarnsaction initially starts with the
fast mode i,e 400Kbits/sec and then switches to high speed mode.For this
purpose it requires to set up timing value for fast mode and high speed
mode.
Signed-off-by: Yuvaraj Kumar C D
---
drivers/i2c/busses/i2c-exynos5.c | 85 ++
1 file changed, 58 insertions(+), 27 deletions(-)
diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c
index 968c34f..ef7155f 100644
--- a/drivers/i2c/busses/i2c-exynos5.c
+++ b/drivers/i2c/busses/i2c-exynos5.c
@@ -139,12 +139,14 @@
#define HSI2C_SLV_ADDR_SLV(x) ((x & 0x3ff) << 0)
#define HSI2C_SLV_ADDR_MAS(x) ((x & 0x3ff) << 10)
#define HSI2C_MASTER_ID(x) ((x & 0xff) << 24)
+#define MASTER_ID(x) ((x & 0x7) + 0x08)
/* Controller operating frequency, timing values for operation
* are calculated against this frequency
*/
#define HSI2C_HS_TX_CLOCK 100
-#define HSI2C_FS_TX_CLOCK 100
+/*HSI2C supports upto 400 kb/s in FAST Mode and 3.4 Mb/s in High Speed Mode*/
+#define HSI2C_FS_TX_CLOCK 40
#define HSI2C_HIGH_SPD 1
#define HSI2C_FAST_SPD 0
@@ -173,7 +175,8 @@ struct exynos5_i2c {
int gpios[2];
/* Controller operating frequency */
- unsigned intclock;
+ unsigned intfs_clock;
+ unsigned inths_clock;
unsigned intclk_cycle;
unsigned intclk_div;
@@ -182,6 +185,7 @@ struct exynos5_i2c {
* 2. Fast speed upto 1Mbps
*/
int speed_mode;
+ int current_mode;
};
static const struct of_device_id exynos5_i2c_match[] = {
@@ -222,10 +226,11 @@ static void exynos5_i2c_clr_pend_irq(struct exynos5_i2c
*i2c)
*/
static int exynos5_i2c_clock_info(struct exynos5_i2c *i2c)
{
- unsigned int op_clk = i2c->clock;
unsigned int clkin = clk_get_rate(i2c->clk);
- unsigned int i, utemp0 = 0, utemp1 = 0;
+ unsigned int div, utemp0 = 0, utemp1 = 0;
unsigned int t_ftl_cycle;
+ unsigned int op_clk = (i2c->current_mode == HSI2C_HIGH_SPD) ?
+ i2c->hs_clock : i2c->fs_clock;
/* FPCLK / FI2C =
* (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + 8 + 2 * FLT_CYCLE
@@ -236,8 +241,8 @@ static int exynos5_i2c_clock_info(struct exynos5_i2c *i2c)
utemp0 = (clkin / op_clk) - 8 - 2 * t_ftl_cycle;
/* CLK_DIV max is 256 */
- for (i = 0; i < 256; i++) {
- utemp1 = utemp0 / (i + 1);
+ for (div = 0; div < 256; div++) {
+ utemp1 = utemp0 / (div + 1);
/* SCL_L and SCL_H each has max value of 255
* Hence, For the clk_cycle to the have right value
@@ -245,7 +250,7 @@ static int exynos5_i2c_clock_info(struct exynos5_i2c *i2c)
*/
if ((utemp1 < 512) && (utemp1 > 4)) {
i2c->clk_cycle = utemp1 - 2;
- i2c->clk_div = i;
+ i2c->clk_div = div;
return 0;
}
}
@@ -297,7 +302,7 @@ static void exynos5_i2c_set_timing(struct exynos5_i2c *i2c)
n_clkdiv, t_sr_release);
dev_dbg(i2c->dev, "tDATA_HD: %X\n", t_data_hd);
- if (i2c->speed_mode == HSI2C_HIGH_SPD) {
+ if (i2c->current_mode == HSI2C_HIGH_SPD) {
writel(i2c_timing_s1, i2c->regs + HSI2C_TIMING_HS1);
writel(i2c_timing_s2, i2c->regs + HSI2C_TIMING_HS2);
writel(i2c_timing_s3, i2c->regs + HSI2C_TIMING_HS3);
@@ -309,25 +314,52 @@ static void exynos5_i2c_set_timing(struct exynos5_i2c
*i2c)
writel(i2c_timing_sla, i2c->regs + HSI2C_TIMING_SLA);
}
+static int exynos5_hsi2c_clock_setup(struct exynos5_i2c *i2c)
+{
+
+ if (exynos5_i2c_clock_info(i2c)) {
+ dev_err(i2c->dev, "HSI2C FS Clock set up failed\n");
+ return -EINVAL;
+ }
+ exynos5_i2c_set_timing(i2c);
+/*If controller supports High Speed configure the High speed timing value*/
+ if (i2c->speed_mode == HSI2C_HIGH_SPD) {
+ i2c->current_mode = HSI2C_HIGH_SPD;
+ if (exynos5_i2c_clock_info(i2c)) {
+ dev_err(i2c->dev, "HSI2C HS Clock set up failed\n");
+ return -EINVAL;
+ }
+ exynos5_i2c_set_timing(i2c);
+ }
+ return 0;
+}
+
/* exynos5_i2c_init: configures the controller for I2C functionality
* Programs I2C controller for Master mode operation
*
* Note: Currently, supports AUTO mode of operation.
*/
-static void exynos5_i2c_init(struct ex
Re: i2c-mxs woes
Hi Alexandre, Am Freitag, den 19.04.2013, 13:37 +0200 schrieb Alexandre Belloni: > Hi, > > I'm having some issues with the i2c-mxs driver in 3.9. Marek already > pointed me to the patches from Lucas and that greatly improved the > situation. > > For the context, my board has three nau7802 adcs, connected to a gpio > i2c-muxer, connected to i2c1. > > Here is what I observe: > > On 3.9: > > # time cat /sys/bus/iio/devices/iio:device1/in_voltage0_raw > 2620 > real 0m 7.08s > user 0m 0.00s > sys 0m 0.02s > # time cat /sys/bus/iio/devices/iio:device1/in_voltage1_raw > 2623 > real 0m 6.07s > user 0m 0.01s > sys 0m 0.01s > # > Is this with or without my patches? Before introduction of the error handling in PIO code there were a lot of situations where the controller would signal an error, but the driver would go on as usual, so the next transaction wouldn't succeed and stop for a whole second until the timeout hits and resets the controller. Regards, Lucas -- Pengutronix e.K. | Lucas Stach | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-5076 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: i2c-mxs woes
Dear Alexandre Belloni, > Hi, > > I'm having some issues with the i2c-mxs driver in 3.9. Marek already > pointed me to the patches from Lucas and that greatly improved the > situation. > > For the context, my board has three nau7802 adcs, connected to a gpio > i2c-muxer, connected to i2c1. > > Here is what I observe: > > On 3.9: > > # time cat /sys/bus/iio/devices/iio:device1/in_voltage0_raw > 2620 > real 0m 7.08s > user 0m 0.00s > sys 0m 0.02s > # time cat /sys/bus/iio/devices/iio:device1/in_voltage1_raw > 2623 > real 0m 6.07s > user 0m 0.01s > sys 0m 0.01s > # Looks like there's a fixes 7-second delay. Like a timeout maybe? Best regards, Marek Vasut -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] i2c: davinci: drop superfluous {get|put}_device
On 4/18/2013 10:43 PM, Wolfram Sang wrote:
> Driver core already takes care of refcounting, no need to do this on
> driver level again.
>
> Signed-off-by: Wolfram Sang
Tested I2C probe on DA850 EVM.
Tested-by: Sekhar Nori
Thanks,
Sekhar
> ---
> drivers/i2c/busses/i2c-davinci.c | 19 ++-
> 1 file changed, 6 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-davinci.c
> b/drivers/i2c/busses/i2c-davinci.c
> index c01edac..cf20e06 100644
> --- a/drivers/i2c/busses/i2c-davinci.c
> +++ b/drivers/i2c/busses/i2c-davinci.c
> @@ -670,7 +670,7 @@ static int davinci_i2c_probe(struct platform_device *pdev)
> #ifdef CONFIG_CPU_FREQ
> init_completion(&dev->xfr_complete);
> #endif
> - dev->dev = get_device(&pdev->dev);
> + dev->dev = &pdev->dev;
> dev->irq = irq->start;
> dev->pdata = dev->dev->platform_data;
> platform_set_drvdata(pdev, dev);
> @@ -680,10 +680,9 @@ static int davinci_i2c_probe(struct platform_device
> *pdev)
>
> dev->pdata = devm_kzalloc(&pdev->dev,
> sizeof(struct davinci_i2c_platform_data), GFP_KERNEL);
> - if (!dev->pdata) {
> - r = -ENOMEM;
> - goto err_free_mem;
> - }
> + if (!dev->pdata)
> + return -ENOMEM;
> +
> memcpy(dev->pdata, &davinci_i2c_platform_data_default,
> sizeof(struct davinci_i2c_platform_data));
> if (!of_property_read_u32(pdev->dev.of_node, "clock-frequency",
> @@ -694,10 +693,8 @@ static int davinci_i2c_probe(struct platform_device
> *pdev)
> }
>
> dev->clk = devm_clk_get(&pdev->dev, NULL);
> - if (IS_ERR(dev->clk)) {
> - r = -ENODEV;
> - goto err_free_mem;
> - }
> + if (IS_ERR(dev->clk))
> + return -ENODEV;
> clk_prepare_enable(dev->clk);
>
> dev->base = devm_ioremap_resource(&pdev->dev, mem);
> @@ -744,9 +741,6 @@ static int davinci_i2c_probe(struct platform_device *pdev)
> err_unuse_clocks:
> clk_disable_unprepare(dev->clk);
> dev->clk = NULL;
> -err_free_mem:
> - put_device(&pdev->dev);
> -
> return r;
> }
>
> @@ -757,7 +751,6 @@ static int davinci_i2c_remove(struct platform_device
> *pdev)
> i2c_davinci_cpufreq_deregister(dev);
>
> i2c_del_adapter(&dev->adapter);
> - put_device(&pdev->dev);
>
> clk_disable_unprepare(dev->clk);
> dev->clk = NULL;
>
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i2c-mxs woes
Hi, I'm having some issues with the i2c-mxs driver in 3.9. Marek already pointed me to the patches from Lucas and that greatly improved the situation. For the context, my board has three nau7802 adcs, connected to a gpio i2c-muxer, connected to i2c1. Here is what I observe: On 3.9: # time cat /sys/bus/iio/devices/iio:device1/in_voltage0_raw 2620 real0m 7.08s user0m 0.00s sys 0m 0.02s # time cat /sys/bus/iio/devices/iio:device1/in_voltage1_raw 2623 real0m 6.07s user0m 0.01s sys 0m 0.01s # On 3.9 but using i2c-gpio to bitbang on the bus: # time cat /sys/bus/iio/devices/iio:device1/in_voltage0_raw 2661 real0m 0.08s user0m 0.00s sys 0m 0.06s # time cat /sys/bus/iio/devices/iio:device1/in_voltage1_raw 2270 real0m 0.08s user0m 0.00s sys 0m 0.05s # On 3.7, i2c-mxs: # time cat /sys/bus/iio/devices/iio:device1/in_voltage0_raw 2643 real0m 0.06s user0m 0.01s sys0m 0.02s # time cat /sys/bus/iio/devices/iio:device1/in_voltage1_raw 1546 real0m 0.05s user0m 0.00s sys0m 0.02s # Any input would be appreciated. Regards, -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 4/6] ARM: at91: dts: add i2c dma support
On 04/19/2013 11:11 AM, ludovic.desroc...@atmel.com : > From: Ludovic Desroches > > Add DMA resources to i2c nodes. > > Signed-off-by: Ludovic Desroches I have made little corrections, but do not bother, it is already in my tree: [nicolas.fe...@atmel.com: correct 9n12 dma phandle name] Acked-by: Nicolas Ferre And stacked in at91-3.10-soc. thanks, > --- > arch/arm/boot/dts/at91sam9n12.dtsi | 6 ++ > arch/arm/boot/dts/at91sam9x5.dtsi | 9 + > arch/arm/boot/dts/sama5d3.dtsi | 9 + > 3 files changed, 24 insertions(+) > > diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi > b/arch/arm/boot/dts/at91sam9n12.dtsi > index acc4526..f912124 100644 > --- a/arch/arm/boot/dts/at91sam9n12.dtsi > +++ b/arch/arm/boot/dts/at91sam9n12.dtsi > @@ -361,6 +361,9 @@ > compatible = "atmel,at91sam9x5-i2c"; > reg = <0xf801 0x100>; > interrupts = <9 4 6>; > + dmas = <&dma0 1 13>, > +<&dma0 1 14>; single dma controller in 9n12: s/dma0/dma/ > + dma-names = "tx", "rx"; > #address-cells = <1>; > #size-cells = <0>; > status = "disabled"; > @@ -370,6 +373,9 @@ > compatible = "atmel,at91sam9x5-i2c"; > reg = <0xf8014000 0x100>; > interrupts = <10 4 6>; > + dmas = <&dma0 1 15>, > +<&dma0 1 16>; Ditto > + dma-names = "tx", "rx"; > #address-cells = <1>; > #size-cells = <0>; > status = "disabled"; > diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi > b/arch/arm/boot/dts/at91sam9x5.dtsi > index 8e83d87..16c9b81 100644 > --- a/arch/arm/boot/dts/at91sam9x5.dtsi > +++ b/arch/arm/boot/dts/at91sam9x5.dtsi > @@ -519,6 +519,9 @@ > compatible = "atmel,at91sam9x5-i2c"; > reg = <0xf801 0x100>; > interrupts = <9 4 6>; > + dmas = <&dma0 1 7>, > +<&dma0 1 8>; > + dma-names = "tx", "rx"; > #address-cells = <1>; > #size-cells = <0>; > pinctrl-names = "default"; > @@ -530,6 +533,9 @@ > compatible = "atmel,at91sam9x5-i2c"; > reg = <0xf8014000 0x100>; > interrupts = <10 4 6>; > + dmas = <&dma1 1 5>, > +<&dma1 1 6>; > + dma-names = "tx", "rx"; > #address-cells = <1>; > #size-cells = <0>; > pinctrl-names = "default"; > @@ -541,6 +547,9 @@ > compatible = "atmel,at91sam9x5-i2c"; > reg = <0xf8018000 0x100>; > interrupts = <11 4 6>; > + dmas = <&dma0 1 9>, > +<&dma0 1 10>; > + dma-names = "tx", "rx"; > #address-cells = <1>; > #size-cells = <0>; > pinctrl-names = "default"; > diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi > index 95c00a3..8e87277 100644 > --- a/arch/arm/boot/dts/sama5d3.dtsi > +++ b/arch/arm/boot/dts/sama5d3.dtsi > @@ -111,6 +111,9 @@ > compatible = "atmel,at91sam9x5-i2c"; > reg = <0xf0014000 0x4000>; > interrupts = <18 4 6>; > + dmas = <&dma0 2 7>, > +<&dma0 2 8>; > + dma-names = "tx", "rx"; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_i2c0>; > #address-cells = <1>; > @@ -122,6 +125,9 @@ > compatible = "atmel,at91sam9x5-i2c"; > reg = <0xf0018000 0x4000>; > interrupts = <19 4 6>; > + dmas = <&dma0 2 9>, > +<&dma0 2 10>; > + dma-names = "tx", "rx"; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_i2c1>; > #address-cells = <1>; > @@ -294,6 +300,9 @@ > compatible = "atmel,
Re: [PATCH v3 6/6] ARM: at91: dts: add MCI DMA support
On 04/19/2013 11:11 AM, ludovic.desroc...@atmel.com : > From: Ludovic Desroches > > Add DMA resources to MCI nodes. > > Signed-off-by: Ludovic Desroches I have made little corrections, but do not bother, it is already in my tree: [nicolas.fe...@atmel.com: correct 9g45, 9n12 dma phandle name] Acked-by: Nicolas Ferre And stacked in at91-3.10-soc. thanks, > --- > arch/arm/boot/dts/at91sam9g45.dtsi | 4 > arch/arm/boot/dts/at91sam9n12.dtsi | 2 ++ > arch/arm/boot/dts/at91sam9x5.dtsi | 4 > arch/arm/boot/dts/sama5d3.dtsi | 6 ++ > 4 files changed, 16 insertions(+) > > diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi > b/arch/arm/boot/dts/at91sam9g45.dtsi > index 275e768..de2abc0 100644 > --- a/arch/arm/boot/dts/at91sam9g45.dtsi > +++ b/arch/arm/boot/dts/at91sam9g45.dtsi > @@ -513,6 +513,8 @@ > compatible = "atmel,hsmci"; > reg = <0xfff8 0x600>; > interrupts = <11 4 0>; > + dmas = <&dma0 1 0>; single dma controller in 9g45: s/dma0/dma/ > + dma-names = "rxtx"; > #address-cells = <1>; > #size-cells = <0>; > status = "disabled"; > @@ -522,6 +524,8 @@ > compatible = "atmel,hsmci"; > reg = <0xfffd 0x600>; > interrupts = <29 4 0>; > + dmas = <&dma0 1 13>; Ditto > + dma-names = "rxtx"; > #address-cells = <1>; > #size-cells = <0>; > status = "disabled"; > diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi > b/arch/arm/boot/dts/at91sam9n12.dtsi > index f912124..0b61c41 100644 > --- a/arch/arm/boot/dts/at91sam9n12.dtsi > +++ b/arch/arm/boot/dts/at91sam9n12.dtsi > @@ -89,6 +89,8 @@ > compatible = "atmel,hsmci"; > reg = <0xf0008000 0x600>; > interrupts = <12 4 0>; > + dmas = <&dma0 1 0> single dma controller in 9n12: s/dma0/dma/ + do not forget the tailing ";" > + dma-names = "rxtx"; > #address-cells = <1>; > #size-cells = <0>; > status = "disabled"; > diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi > b/arch/arm/boot/dts/at91sam9x5.dtsi > index 16c9b81..5f42e7a 100644 > --- a/arch/arm/boot/dts/at91sam9x5.dtsi > +++ b/arch/arm/boot/dts/at91sam9x5.dtsi > @@ -449,6 +449,8 @@ > compatible = "atmel,hsmci"; > reg = <0xf0008000 0x600>; > interrupts = <12 4 0>; > + dmas = <&dma0 1 0>; > + dma-names = "rxtx"; > #address-cells = <1>; > #size-cells = <0>; > status = "disabled"; > @@ -458,6 +460,8 @@ > compatible = "atmel,hsmci"; > reg = <0xf000c000 0x600>; > interrupts = <26 4 0>; > + dmas = <&dma1 1 0>; > + dma-names = "rxtx"; > #address-cells = <1>; > #size-cells = <0>; > status = "disabled"; > diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi > index 8e87277..2e643ea 100644 > --- a/arch/arm/boot/dts/sama5d3.dtsi > +++ b/arch/arm/boot/dts/sama5d3.dtsi > @@ -60,6 +60,8 @@ > compatible = "atmel,hsmci"; > reg = <0xf000 0x600>; > interrupts = <21 4 0>; > + dmas = <&dma0 2 0>; > + dma-names = "rxtx"; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 > &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; > status = "disabled"; > @@ -173,6 +175,8 @@ > compatible = "atmel,hsmci"; > reg = <0xf800 0x600>; > interrupts = <22 4 0>; > + dmas = <&dma1 2 0>; > + dma-names = "rxtx"; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 > &pinctrl_mmc1_dat1_3>; > status = "disabled"; > @@ -184,6 +188,8 @@ > compatible = "atmel,hsmci"; > reg = <0xf8004000 0x600>;
Re: [PATCH 3/3] i2c: designware-pci: drop superfluous {get|put}_device
On Thu, Apr 18, 2013 at 07:13:38PM +0200, Wolfram Sang wrote: > Driver core already takes care of refcounting, no need to do this on > driver level again. > > Signed-off-by: Wolfram Sang Tested-by: Mika Westerberg -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/3] i2c: designware-plat: drop superfluous {get|put}_device
On Thu, Apr 18, 2013 at 07:13:37PM +0200, Wolfram Sang wrote: > Driver core already takes care of refcounting, no need to do this on > driver level again. > > Signed-off-by: Wolfram Sang Tested-by: Mika Westerberg -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 2/6] ARM: at91: dts: set #dma-cells to the correct value
On 04/19/2013 11:11 AM, ludovic.desroc...@atmel.com :
> From: Ludovic Desroches
>
> Moving to generic DMA DT binding involves to set #dma-cells to 2.
>
> Signed-off-by: Ludovic Desroches
Acked-by: Nicolas Ferre
And stacked in at91-3.10-soc.
thanks,
> ---
> arch/arm/boot/dts/at91sam9g45.dtsi | 1 +
> arch/arm/boot/dts/at91sam9n12.dtsi | 1 +
> arch/arm/boot/dts/at91sam9x5.dtsi | 2 ++
> arch/arm/boot/dts/sama5d3.dtsi | 4 ++--
> 4 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi
> b/arch/arm/boot/dts/at91sam9g45.dtsi
> index 6b1d4ca..275e768 100644
> --- a/arch/arm/boot/dts/at91sam9g45.dtsi
> +++ b/arch/arm/boot/dts/at91sam9g45.dtsi
> @@ -108,6 +108,7 @@
> compatible = "atmel,at91sam9g45-dma";
> reg = <0xec00 0x200>;
> interrupts = <21 4 0>;
> + #dma-cells = <2>;
> };
>
> pinctrl@f200 {
> diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi
> b/arch/arm/boot/dts/at91sam9n12.dtsi
> index 7750f98..acc4526 100644
> --- a/arch/arm/boot/dts/at91sam9n12.dtsi
> +++ b/arch/arm/boot/dts/at91sam9n12.dtsi
> @@ -110,6 +110,7 @@
> compatible = "atmel,at91sam9g45-dma";
> reg = <0xec00 0x200>;
> interrupts = <20 4 0>;
> + #dma-cells = <2>;
> };
>
> pinctrl@f400 {
> diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi
> b/arch/arm/boot/dts/at91sam9x5.dtsi
> index 3870322..8e83d87 100644
> --- a/arch/arm/boot/dts/at91sam9x5.dtsi
> +++ b/arch/arm/boot/dts/at91sam9x5.dtsi
> @@ -104,12 +104,14 @@
> compatible = "atmel,at91sam9g45-dma";
> reg = <0xec00 0x200>;
> interrupts = <20 4 0>;
> + #dma-cells = <2>;
> };
>
> dma1: dma-controller@ee00 {
> compatible = "atmel,at91sam9g45-dma";
> reg = <0xee00 0x200>;
> interrupts = <21 4 0>;
> + #dma-cells = <2>;
> };
>
> pinctrl@f400 {
> diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
> index 39b0458..95c00a3 100644
> --- a/arch/arm/boot/dts/sama5d3.dtsi
> +++ b/arch/arm/boot/dts/sama5d3.dtsi
> @@ -348,14 +348,14 @@
> compatible = "atmel,at91sam9g45-dma";
> reg = <0xe600 0x200>;
> interrupts = <30 4 0>;
> - #dma-cells = <1>;
> + #dma-cells = <2>;
> };
>
> dma1: dma-controller@e800 {
> compatible = "atmel,at91sam9g45-dma";
> reg = <0xe800 0x200>;
> interrupts = <31 4 0>;
> - #dma-cells = <1>;
> + #dma-cells = <2>;
> };
>
> ramc0: ramc@ea00 {
>
--
Nicolas Ferre
--
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Re: Re: [PATCH] I2C: Change the value of octeon i2c adapter timeout value
On Fri, Apr 19, 2013 at 12:01:04AM +, EUNBONG SONG wrote: >> >> I think HZ/50 is better than 2 for adapter timeout. > Basically OK. But why HZ/50? Most drivers use HZ. Actually, I just translated 2 jiffies because HZ is 100 in default cavium config. You can find that in "arch/mips/configs/cavium_octeon_defconfig". And i have been using this value over 1 year in octeon board without problem. Thanks.
[PATCH v3 6/6] ARM: at91: dts: add MCI DMA support
From: Ludovic Desroches Add DMA resources to MCI nodes. Signed-off-by: Ludovic Desroches --- arch/arm/boot/dts/at91sam9g45.dtsi | 4 arch/arm/boot/dts/at91sam9n12.dtsi | 2 ++ arch/arm/boot/dts/at91sam9x5.dtsi | 4 arch/arm/boot/dts/sama5d3.dtsi | 6 ++ 4 files changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index 275e768..de2abc0 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -513,6 +513,8 @@ compatible = "atmel,hsmci"; reg = <0xfff8 0x600>; interrupts = <11 4 0>; + dmas = <&dma0 1 0>; + dma-names = "rxtx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -522,6 +524,8 @@ compatible = "atmel,hsmci"; reg = <0xfffd 0x600>; interrupts = <29 4 0>; + dmas = <&dma0 1 13>; + dma-names = "rxtx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index f912124..0b61c41 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -89,6 +89,8 @@ compatible = "atmel,hsmci"; reg = <0xf0008000 0x600>; interrupts = <12 4 0>; + dmas = <&dma0 1 0> + dma-names = "rxtx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 16c9b81..5f42e7a 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -449,6 +449,8 @@ compatible = "atmel,hsmci"; reg = <0xf0008000 0x600>; interrupts = <12 4 0>; + dmas = <&dma0 1 0>; + dma-names = "rxtx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -458,6 +460,8 @@ compatible = "atmel,hsmci"; reg = <0xf000c000 0x600>; interrupts = <26 4 0>; + dmas = <&dma1 1 0>; + dma-names = "rxtx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 8e87277..2e643ea 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -60,6 +60,8 @@ compatible = "atmel,hsmci"; reg = <0xf000 0x600>; interrupts = <21 4 0>; + dmas = <&dma0 2 0>; + dma-names = "rxtx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; status = "disabled"; @@ -173,6 +175,8 @@ compatible = "atmel,hsmci"; reg = <0xf800 0x600>; interrupts = <22 4 0>; + dmas = <&dma1 2 0>; + dma-names = "rxtx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; status = "disabled"; @@ -184,6 +188,8 @@ compatible = "atmel,hsmci"; reg = <0xf8004000 0x600>; interrupts = <23 4 0>; + dmas = <&dma1 2 1>; + dma-names = "rxtx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; status = "disabled"; -- 1.7.11.3 -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a messa
[PATCH v3 5/6] mci: at91: convert to dma_request_slave_channel_compat()
From: Ludovic Desroches
Use generic DMA DT helper. Platforms booting with or without DT populated are
both supported.
Signed-off-by: Ludovic Desroches
Acked-by: Jean-Christophe PLAGNIOL-VILLARD
Acked-by: Nicolas Ferre
---
drivers/mmc/host/atmel-mci.c | 25 -
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
index 10f8b73..ffbd0d3 100644
--- a/drivers/mmc/host/atmel-mci.c
+++ b/drivers/mmc/host/atmel-mci.c
@@ -2224,10 +2224,15 @@ static void __exit atmci_cleanup_slot(struct
atmel_mci_slot *slot,
mmc_free_host(slot->mmc);
}
-static bool atmci_filter(struct dma_chan *chan, void *slave)
+static bool atmci_filter(struct dma_chan *chan, void *pdata)
{
- struct mci_dma_data *sl = slave;
+ struct mci_platform_data *sl_pdata = pdata;
+ struct mci_dma_data *sl;
+ if (!sl_pdata)
+ return false;
+
+ sl = sl_pdata->dma_slave;
if (sl && find_slave_dev(sl) == chan->device->dev) {
chan->private = slave_data_ptr(sl);
return true;
@@ -2239,24 +2244,18 @@ static bool atmci_filter(struct dma_chan *chan, void
*slave)
static bool atmci_configure_dma(struct atmel_mci *host)
{
struct mci_platform_data*pdata;
+ dma_cap_mask_t mask;
if (host == NULL)
return false;
pdata = host->pdev->dev.platform_data;
- if (!pdata)
- return false;
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
- if (pdata->dma_slave && find_slave_dev(pdata->dma_slave)) {
- dma_cap_mask_t mask;
-
- /* Try to grab a DMA channel */
- dma_cap_zero(mask);
- dma_cap_set(DMA_SLAVE, mask);
- host->dma.chan =
- dma_request_channel(mask, atmci_filter,
pdata->dma_slave);
- }
+ host->dma.chan = dma_request_slave_channel_compat(mask, atmci_filter,
pdata,
+ &host->pdev->dev,
"rxtx");
if (!host->dma.chan) {
dev_warn(&host->pdev->dev, "no DMA channel available\n");
return false;
--
1.7.11.3
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[PATCH v3 4/6] ARM: at91: dts: add i2c dma support
From: Ludovic Desroches Add DMA resources to i2c nodes. Signed-off-by: Ludovic Desroches --- arch/arm/boot/dts/at91sam9n12.dtsi | 6 ++ arch/arm/boot/dts/at91sam9x5.dtsi | 9 + arch/arm/boot/dts/sama5d3.dtsi | 9 + 3 files changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index acc4526..f912124 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -361,6 +361,9 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf801 0x100>; interrupts = <9 4 6>; + dmas = <&dma0 1 13>, + <&dma0 1 14>; + dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -370,6 +373,9 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8014000 0x100>; interrupts = <10 4 6>; + dmas = <&dma0 1 15>, + <&dma0 1 16>; + dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 8e83d87..16c9b81 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -519,6 +519,9 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf801 0x100>; interrupts = <9 4 6>; + dmas = <&dma0 1 7>, + <&dma0 1 8>; + dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -530,6 +533,9 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8014000 0x100>; interrupts = <10 4 6>; + dmas = <&dma1 1 5>, + <&dma1 1 6>; + dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -541,6 +547,9 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8018000 0x100>; interrupts = <11 4 6>; + dmas = <&dma0 1 9>, + <&dma0 1 10>; + dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 95c00a3..8e87277 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -111,6 +111,9 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf0014000 0x4000>; interrupts = <18 4 6>; + dmas = <&dma0 2 7>, + <&dma0 2 8>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; #address-cells = <1>; @@ -122,6 +125,9 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf0018000 0x4000>; interrupts = <19 4 6>; + dmas = <&dma0 2 9>, + <&dma0 2 10>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; #address-cells = <1>; @@ -294,6 +300,9 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf801c000 0x4000>; interrupts = <20 4 6>; + dmas = <&dma1 2 11>, + <&dma1 2 12>; + dma-names = "tx", "rx"; #address-cells = <1>;
[PATCH v3 3/6] i2c: at91: convert to dma_request_slave_channel_compat()
From: Ludovic Desroches
Use generic DMA DT helper. Platforms booting with or without DT populated are
both supported.
Signed-off-by: Ludovic Desroches
Acked-by: Nicolas Ferre
Acked-by: Jean-Christophe PLAGNIOL-VILLARD
---
drivers/i2c/busses/i2c-at91.c | 49 ++-
1 file changed, 25 insertions(+), 24 deletions(-)
diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index 75195e3..7ffd544 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -607,11 +607,16 @@ MODULE_DEVICE_TABLE(of, atmel_twi_dt_ids);
#define atmel_twi_dt_ids NULL
#endif
-static bool filter(struct dma_chan *chan, void *slave)
+static bool filter(struct dma_chan *chan, void *pdata)
{
- struct at_dma_slave *sl = slave;
+ struct at91_twi_pdata *sl_pdata = pdata;
+ struct at_dma_slave *sl;
- if (sl->dma_dev == chan->device->dev) {
+ if (!sl_pdata)
+ return false;
+
+ sl = &sl_pdata->dma_slave;
+ if (sl && (sl->dma_dev == chan->device->dev)) {
chan->private = sl;
return true;
} else {
@@ -622,11 +627,10 @@ static bool filter(struct dma_chan *chan, void *slave)
static int at91_twi_configure_dma(struct at91_twi_dev *dev, u32 phy_addr)
{
int ret = 0;
- struct at_dma_slave *sdata;
+ struct at91_twi_pdata *pdata = dev->pdata;
struct dma_slave_config slave_config;
struct at91_twi_dma *dma = &dev->dma;
-
- sdata = &dev->pdata->dma_slave;
+ dma_cap_mask_t mask;
memset(&slave_config, 0, sizeof(slave_config));
slave_config.src_addr = (dma_addr_t)phy_addr + AT91_TWI_RHR;
@@ -637,25 +641,22 @@ static int at91_twi_configure_dma(struct at91_twi_dev
*dev, u32 phy_addr)
slave_config.dst_maxburst = 1;
slave_config.device_fc = false;
- if (sdata && sdata->dma_dev) {
- dma_cap_mask_t mask;
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
- dma_cap_zero(mask);
- dma_cap_set(DMA_SLAVE, mask);
- dma->chan_tx = dma_request_channel(mask, filter, sdata);
- if (!dma->chan_tx) {
- dev_err(dev->dev, "no DMA channel available for tx\n");
- ret = -EBUSY;
- goto error;
- }
- dma->chan_rx = dma_request_channel(mask, filter, sdata);
- if (!dma->chan_rx) {
- dev_err(dev->dev, "no DMA channel available for rx\n");
- ret = -EBUSY;
- goto error;
- }
- } else {
- ret = -EINVAL;
+ dma->chan_tx = dma_request_slave_channel_compat(mask, filter, pdata,
+ dev->dev, "tx");
+ if (!dma->chan_tx) {
+ dev_err(dev->dev, "can't get a DMA channel for tx\n");
+ ret = -EBUSY;
+ goto error;
+ }
+
+ dma->chan_rx = dma_request_slave_channel_compat(mask, filter, pdata,
+ dev->dev, "rx");
+ if (!dma->chan_rx) {
+ dev_err(dev->dev, "can't get a DMA channel for rx\n");
+ ret = -EBUSY;
goto error;
}
--
1.7.11.3
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[PATCH v3 2/6] ARM: at91: dts: set #dma-cells to the correct value
From: Ludovic Desroches
Moving to generic DMA DT binding involves to set #dma-cells to 2.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/at91sam9g45.dtsi | 1 +
arch/arm/boot/dts/at91sam9n12.dtsi | 1 +
arch/arm/boot/dts/at91sam9x5.dtsi | 2 ++
arch/arm/boot/dts/sama5d3.dtsi | 4 ++--
4 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi
b/arch/arm/boot/dts/at91sam9g45.dtsi
index 6b1d4ca..275e768 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -108,6 +108,7 @@
compatible = "atmel,at91sam9g45-dma";
reg = <0xec00 0x200>;
interrupts = <21 4 0>;
+ #dma-cells = <2>;
};
pinctrl@f200 {
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi
b/arch/arm/boot/dts/at91sam9n12.dtsi
index 7750f98..acc4526 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -110,6 +110,7 @@
compatible = "atmel,at91sam9g45-dma";
reg = <0xec00 0x200>;
interrupts = <20 4 0>;
+ #dma-cells = <2>;
};
pinctrl@f400 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi
b/arch/arm/boot/dts/at91sam9x5.dtsi
index 3870322..8e83d87 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -104,12 +104,14 @@
compatible = "atmel,at91sam9g45-dma";
reg = <0xec00 0x200>;
interrupts = <20 4 0>;
+ #dma-cells = <2>;
};
dma1: dma-controller@ee00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xee00 0x200>;
interrupts = <21 4 0>;
+ #dma-cells = <2>;
};
pinctrl@f400 {
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 39b0458..95c00a3 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -348,14 +348,14 @@
compatible = "atmel,at91sam9g45-dma";
reg = <0xe600 0x200>;
interrupts = <30 4 0>;
- #dma-cells = <1>;
+ #dma-cells = <2>;
};
dma1: dma-controller@e800 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xe800 0x200>;
interrupts = <31 4 0>;
- #dma-cells = <1>;
+ #dma-cells = <2>;
};
ramc0: ramc@ea00 {
--
1.7.11.3
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[PATCH v3 1/6] at_hdmac: move to generic DMA binding
From: Ludovic Desroches
Update at_hdmac driver to support generic DMA device tree binding. Devices
can still request channel with dma_request_channel() then it doesn't break
DMA for non DT boards.
Signed-off-by: Ludovic Desroches
Acked-by: Nicolas Ferre
Acked-by: Jean-Christophe PLAGNIOL-VILLARD
Acked-by: Arnd Bergmann
---
.../devicetree/bindings/dma/atmel-dma.txt | 35 ++--
drivers/dma/at_hdmac.c | 93 --
drivers/dma/at_hdmac_regs.h| 4 +
3 files changed, 121 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/atmel-dma.txt
b/Documentation/devicetree/bindings/dma/atmel-dma.txt
index 3c046ee..c80e8a3 100644
--- a/Documentation/devicetree/bindings/dma/atmel-dma.txt
+++ b/Documentation/devicetree/bindings/dma/atmel-dma.txt
@@ -1,14 +1,39 @@
* Atmel Direct Memory Access Controller (DMA)
Required properties:
-- compatible: Should be "atmel,-dma"
-- reg: Should contain DMA registers location and length
-- interrupts: Should contain DMA interrupt
+- compatible: Should be "atmel,-dma".
+- reg: Should contain DMA registers location and length.
+- interrupts: Should contain DMA interrupt.
+- #dma-cells: Must be <2>, used to represent the number of integer cells in
+the dmas property of client devices.
-Examples:
+Example:
-dma@ec00 {
+dma0: dma@ec00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xec00 0x200>;
interrupts = <21>;
+ #dma-cells = <2>;
+};
+
+DMA clients connected to the Atmel DMA controller must use the format
+described in the dma.txt file, using a three-cell specifier for each channel:
+a phandle plus two interger cells.
+The three cells in order are:
+
+1. A phandle pointing to the DMA controller.
+2. The memory interface (16 most significant bits), the peripheral interface
+(16 less significant bits).
+3. The peripheral identifier for the hardware handshaking interface. The
+identifier can be different for tx and rx.
+
+Example:
+
+i2c0@i2c@f801 {
+ compatible = "atmel,at91sam9x5-i2c";
+ reg = <0xf801 0x100>;
+ interrupts = <9 4 6>;
+ dmas = <&dma0 1 7>,
+ <&dma0 1 8>;
+ dma-names = "tx", "rx";
};
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index de4e930..fda2661 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -24,6 +24,7 @@
#include
#include
#include
+#include
#include "at_hdmac_regs.h"
#include "dmaengine.h"
@@ -677,7 +678,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist
*sgl,
ctrlb |= ATC_DST_ADDR_MODE_FIXED
| ATC_SRC_ADDR_MODE_INCR
| ATC_FC_MEM2PER
- | ATC_SIF(AT_DMA_MEM_IF) | ATC_DIF(AT_DMA_PER_IF);
+ | ATC_SIF(atchan->mem_if) | ATC_DIF(atchan->per_if);
reg = sconfig->dst_addr;
for_each_sg(sgl, sg, sg_len, i) {
struct at_desc *desc;
@@ -716,7 +717,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist
*sgl,
ctrlb |= ATC_DST_ADDR_MODE_INCR
| ATC_SRC_ADDR_MODE_FIXED
| ATC_FC_PER2MEM
- | ATC_SIF(AT_DMA_PER_IF) | ATC_DIF(AT_DMA_MEM_IF);
+ | ATC_SIF(atchan->per_if) | ATC_DIF(atchan->mem_if);
reg = sconfig->src_addr;
for_each_sg(sgl, sg, sg_len, i) {
@@ -822,8 +823,8 @@ atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct
at_desc *desc,
desc->lli.ctrlb = ATC_DST_ADDR_MODE_FIXED
| ATC_SRC_ADDR_MODE_INCR
| ATC_FC_MEM2PER
- | ATC_SIF(AT_DMA_MEM_IF)
- | ATC_DIF(AT_DMA_PER_IF);
+ | ATC_SIF(atchan->mem_if)
+ | ATC_DIF(atchan->per_if);
break;
case DMA_DEV_TO_MEM:
@@ -833,8 +834,8 @@ atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct
at_desc *desc,
desc->lli.ctrlb = ATC_DST_ADDR_MODE_INCR
| ATC_SRC_ADDR_MODE_FIXED
| ATC_FC_PER2MEM
- | ATC_SIF(AT_DMA_PER_IF)
- | ATC_DIF(AT_DMA_MEM_IF);
+ | ATC_SIF(atchan->per_if)
+ | ATC_DIF(atchan->mem_if);
break;
default:
@@ -1190,6 +1191,67 @@ static void atc_free_chan_resources(struct dma_chan
*chan)
dev_vdbg(chan2dev(chan), "free_chan_resources: done\n");
}
+#ifdef CONFIG_OF
+static bool at_dma_filter(struct dma_chan *chan, void *slave)
+{
+ struct at_dma_slave *atslave = slave;
+
+ if (atslave->dma_dev == chan->device->dev) {
+ chan->private = atslave;
+ return tru
[PATCH v3 0/6] ARM: at91: move to generic DMA device tree binding
From: Ludovic Desroches Hi, I resend the set of patches due to minor fixes. I think patches will go through different subsytems. Patch 1/6: dma subsystem Patch 2/6, 4/6, 6/6: arm-soc Patch 3/6: i2c subsystem, already taken by Wolfram, thx. Patch 5/6: mmc subsystem v3 changes: - compile at_dma_filter function only if CONFIG_OF is set since it is only used in at_dma_xlate - remove trailing whitespaces in patch 5/6 v2 changes: - update documentation about dma bindings according to Nicolas' comments - put dtsi changes in a separate patch - add dtb update for i2c and mci nodes Ludovic Desroches (6): at_hdmac: move to generic DMA binding ARM: at91: dts: set #dma-cells to the correct value i2c: at91: convert to dma_request_slave_channel_compat() ARM: at91: dts: add i2c dma support mci: at91: convert to dma_request_slave_channel_compat() ARM: at91: dts: add MCI DMA support .../devicetree/bindings/dma/atmel-dma.txt | 35 ++-- arch/arm/boot/dts/at91sam9g45.dtsi | 5 ++ arch/arm/boot/dts/at91sam9n12.dtsi | 9 +++ arch/arm/boot/dts/at91sam9x5.dtsi | 15 arch/arm/boot/dts/sama5d3.dtsi | 19 - drivers/dma/at_hdmac.c | 93 -- drivers/dma/at_hdmac_regs.h| 4 + drivers/i2c/busses/i2c-at91.c | 49 ++-- drivers/mmc/host/atmel-mci.c | 25 +++--- 9 files changed, 204 insertions(+), 50 deletions(-) -- 1.7.11.3 -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] I2C: Change the value of octeon i2c adapter timeout value
On Fri, Apr 19, 2013 at 12:01:04AM +, EUNBONG SONG wrote: > > I think HZ/50 is better than 2 for adapter timeout. Basically OK. But why HZ/50? Most drivers use HZ. -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
