Signed-off-by: Laurent Vivier
---
target-m68k/translate.c | 26 +-
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 80033fc..9a38235 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -2351,21 +2351,36 @@ DISAS_INSN(mull)
}
}
-DISAS_INSN(link)
+static void gen_link(DisasContext *s, uint16_t insn, int32_t offset)
{
-int16_t offset;
TCGv reg;
TCGv tmp;
-offset = cpu_ldsw_code(env, s->pc);
-s->pc += 2;
reg = AREG(insn, 0);
tmp = tcg_temp_new();
tcg_gen_subi_i32(tmp, QREG_SP, 4);
gen_store(s, OS_LONG, tmp, reg);
-if ((insn & 7) != 7)
+if ((insn & 7) != 7) {
tcg_gen_mov_i32(reg, tmp);
+}
tcg_gen_addi_i32(QREG_SP, tmp, offset);
+tcg_temp_free(tmp);
+}
+
+DISAS_INSN(link)
+{
+int16_t offset;
+
+offset = read_im16(env, s);
+gen_link(s, insn, offset);
+}
+
+DISAS_INSN(linkl)
+{
+int32_t offset;
+
+offset = read_im32(env, s);
+gen_link(s, insn, offset);
}
DISAS_INSN(unlk)
@@ -4661,6 +4676,7 @@ void register_m68k_insns (CPUM68KState *env)
INSN(undef, 46c0, ffc0, M68000);
INSN(move_to_sr, 46c0, ffc0, CF_ISA_A);
INSN(nbcd, 4800, ffc0, M68000);
+INSN(linkl, 4808, fff8, M68000);
BASE(pea, 4840, ffc0);
BASE(swap, 4840, fff8);
INSN(bkpt, 4848, fff8, M68000);
--
2.5.5