Re: [U-Boot-Users] [PATCH] Add brackets to if condition in tools/setlocalversion

[Wolfgang Denk]

In message <[EMAIL PROTECTED]> you wrote:
> The long condition in the script causes all ColdFire platforms
> unable to compile correctly. By adding square brackets, all
> compile without error.
> 
> Signed-off-by: TsiChung Liew <[EMAIL PROTECTED]>
> ---
>  tools/setlocalversion |4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/tools/setlocalversion b/tools/setlocalversion
> index 9bbdafd..2c27291 100755
> --- a/tools/setlocalversion
> +++ b/tools/setlocalversion
> @@ -11,8 +11,8 @@ cd "${1:-.}" || usage
>  # Check for git and a git repo.
>  if head=`git rev-parse --verify HEAD 2>/dev/null`; then
>   # Do we have an untagged version?
> - if git name-rev --tags HEAD | \
> -grep -E '^HEAD[[:space:]]+(.*~[0-9]*|undefined)$' > /dev/null; then
> + if [git name-rev --tags HEAD | \
> +grep -E '^HEAD[[:space:]]+(.*~[0-9]*|undefined)$' > /dev/null]; then
>   git describe | awk -F- '{printf("-%05d-%s", $(NF-1),$(NF))}'
>   fi

Ummm... what exactly has this code, which is running natively in the
shell on your development host, to do with a ColdFire cross-compile?

Note that the very same code is used in the Linux kernel.

If this code doesn't work for you, you also cannot compile any recent
Linux kernel code?

Also, I don't understand what you do.

Unless you can provide a really good explanation why that should be
needed I will reject this patch.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
Computers are not intelligent.  They only think they are.

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[U-Boot-Users] [PATCH] Add brackets to if condition in tools/setlocalversion

[Tsi-Chung Liew]

The long condition in the script causes all ColdFire platforms
unable to compile correctly. By adding square brackets, all
compile without error.

Signed-off-by: TsiChung Liew <[EMAIL PROTECTED]>
---
 tools/setlocalversion |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/setlocalversion b/tools/setlocalversion
index 9bbdafd..2c27291 100755
--- a/tools/setlocalversion
+++ b/tools/setlocalversion
@@ -11,8 +11,8 @@ cd "${1:-.}" || usage
 # Check for git and a git repo.
 if head=`git rev-parse --verify HEAD 2>/dev/null`; then
# Do we have an untagged version?
-   if git name-rev --tags HEAD | \
-  grep -E '^HEAD[[:space:]]+(.*~[0-9]*|undefined)$' > /dev/null; then
+   if [git name-rev --tags HEAD | \
+  grep -E '^HEAD[[:space:]]+(.*~[0-9]*|undefined)$' > /dev/null]; then
git describe | awk -F- '{printf("-%05d-%s", $(NF-1),$(NF))}'
fi
 
-- 
1.5.4.1


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[U-Boot-Users] [PATCH 7/7] [new uImage] Enable new uImage support for the pcs440ep board.

[Bartlomiej Sieka]

Signed-off-by: Bartlomiej Sieka <[EMAIL PROTECTED]>
---

 include/configs/pcs440ep.h |6 ++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h
index 893924b..ba6d932 100644
--- a/include/configs/pcs440ep.h
+++ b/include/configs/pcs440ep.h
@@ -27,6 +27,12 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+
+/* new uImage format support */
+#define CONFIG_FIT 1
+#define CONFIG_OF_LIBFDT   1
+#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
+
 /*---
  * High Level Configuration Options
  *--*/


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[U-Boot-Users] [PATCH 6/7] [new uImage] Do not compile new uImage format support by default

[Bartlomiej Sieka]

Disable default building of new uImage format support in preparation
for merge with the master. Support for new format can be enabled on
a per-board basis, by defining the following in the board's config file:

#define CONFIG_FIT 1
#define CONFIG_OF_LIBFDT   1

This can be optionally defined to give more verbose output:

#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */

Signed-off-by: Bartlomiej Sieka <[EMAIL PROTECTED]>
---

 include/image.h |6 --
 1 files changed, 0 insertions(+), 6 deletions(-)

diff --git a/include/image.h b/include/image.h
index f22dafd..36143e2 100644
--- a/include/image.h
+++ b/include/image.h
@@ -41,12 +41,6 @@
 #include 
 #include 
 
-/* new uImage format support enabled on target
- * To be moved to board configuration file */
-#define CONFIG_FIT 1
-#define CONFIG_OF_LIBFDT   1
-#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
-
 #else
 
 /* new uImage format support enabled on host */


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[U-Boot-Users] [PATCH 5/7] [new uImage] Disable debuging output in preparation for merge with master

[Bartlomiej Sieka]

Signed-off-by: Bartlomiej Sieka <[EMAIL PROTECTED]>
---

 common/cmd_bootm.c |1 -
 common/image.c |1 -
 lib_ppc/bootm.c|1 -
 3 files changed, 0 insertions(+), 3 deletions(-)

diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 2f232e7..789ee03 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -21,7 +21,6 @@
  * MA 02111-1307 USA
  */
 
-#define DEBUG
 
 /*
  * Boot support
diff --git a/common/image.c b/common/image.c
index 6508df9..f04826a 100644
--- a/common/image.c
+++ b/common/image.c
@@ -23,7 +23,6 @@
  * MA 02111-1307 USA
  */
 
-#define DEBUG
 
 #ifndef USE_HOSTCC
 #include 
diff --git a/lib_ppc/bootm.c b/lib_ppc/bootm.c
index 8cdace2..89463e3 100644
--- a/lib_ppc/bootm.c
+++ b/lib_ppc/bootm.c
@@ -23,7 +23,6 @@
  * MA 02111-1307 USA
  */
 
-#define DEBUG
 
 #include 
 #include 


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[U-Boot-Users] [PATCH 4/7] [new uImage] Compilation and new uImage handling fixes for imxtract

[Bartlomiej Sieka]

Fix imxtract command not being compiled-in despite CONFIG_CMD_XIMG being in
include/config_cmd_default.h. Fix few warnings and handling of new format
images.

Signed-off-by: Bartlomiej Sieka <[EMAIL PROTECTED]>
---

 common/cmd_ximg.c |   12 
 1 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/common/cmd_ximg.c b/common/cmd_ximg.c
index 77f68c4..7916fc1 100644
--- a/common/cmd_ximg.c
+++ b/common/cmd_ximg.c
@@ -24,7 +24,6 @@
  * MA 02111-1307 USA
  */
 
-#if defined(CONFIG_CMD_XIMG)
 
 /*
  * Multi Image extract
@@ -40,13 +39,12 @@ do_imgextract(cmd_tbl_t * cmdtp, int flag, int argc, char 
*argv[])
ulong   addr = load_addr;
ulong   dest = 0;
ulong   data, len, count;
-   int i, verify;
+   int verify;
int part = 0;
charpbuf[10];
-   char*s;
image_header_t  *hdr;
 #if defined(CONFIG_FIT)
-   const char  *uname;
+   const char  *uname = NULL;
const void* fit_hdr;
int noffset;
const void  *fit_data;
@@ -134,7 +132,7 @@ do_imgextract(cmd_tbl_t * cmdtp, int flag, int argc, char 
*argv[])
}
 
/* get subimage node offset */
-   noffset = fit_image_get_node (fit_hdr, fit_uname);
+   noffset = fit_image_get_node (fit_hdr, uname);
if (noffset < 0) {
printf ("Can't find '%s' FIT subimage\n", uname);
return 1;
@@ -160,7 +158,7 @@ do_imgextract(cmd_tbl_t * cmdtp, int flag, int argc, char 
*argv[])
return 1;
}
 
-   data = (ulong *)fit_data;
+   data = (ulong)fit_data;
len = (ulong)fit_len;
break;
 #endif
@@ -190,5 +188,3 @@ U_BOOT_CMD(imxtract, 4, 1, do_imgextract,
   "- extract  subimage from FIT image at  and copy to 
\n"
 #endif
 );
-
-#endif


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[U-Boot-Users] [PATCH 3/7] [new uImage] Fix autoscr command used with new uImage format

[Bartlomiej Sieka]

Signed-off-by: Bartlomiej Sieka <[EMAIL PROTECTED]>
---

 common/cmd_autoscript.c |9 +++--
 1 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/common/cmd_autoscript.c b/common/cmd_autoscript.c
index 5163d57..1a37b90 100644
--- a/common/cmd_autoscript.c
+++ b/common/cmd_autoscript.c
@@ -100,6 +100,13 @@ autoscript (ulong addr, const char *fit_uname)
puts ("Empty Script\n");
return 1;
}
+
+   /*
+* scripts are just multi-image files with one component, seek
+* past the zero-terminated sequence of image lengths to get
+* to the actual image data
+*/
+   while (*data++);
break;
 #if defined(CONFIG_FIT)
case IMAGE_FORMAT_FIT:
@@ -155,8 +162,6 @@ autoscript (ulong addr, const char *fit_uname)
return 1;
}
 
-   while (*data++);
-
/* make sure cmd is null terminated */
memmove (cmd, (char *)data, len);
*(cmd + len) = 0;


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[U-Boot-Users] [PATCH 2/7] [new uImage] Fix *.its files location in documentation

[Bartlomiej Sieka]

Signed-off-by: Bartlomiej Sieka <[EMAIL PROTECTED]>
---

 doc/uImage.FIT/howto.txt  |   19 ++-
 doc/uImage.FIT/source_file_format.txt |2 +-
 2 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/doc/uImage.FIT/howto.txt b/doc/uImage.FIT/howto.txt
index 35ab97d..4ae5303 100644
--- a/doc/uImage.FIT/howto.txt
+++ b/doc/uImage.FIT/howto.txt
@@ -49,10 +49,11 @@ Consider a simple scenario, where a PPC Linux kernel built 
from sources on the
 development host is to be booted old-style (non-FDT) by U-Boot on an embedded
 target. Assume that the outcome of the build is vmlinux.bin.gz, a file which
 contains a gzip-compressed PPC Linux kernel (the only data file in this case).
-The uImage can be produced using the image source file examples/kernel.its
-(note that kernel.its assumes that vmlinux.bin.gz is in the current working
-directory; if desired, an alternative path can be specified in the kernel.its
-file). Here's how to create the image and inspect its contents:
+The uImage can be produced using the image source file
+doc/uImage.FIT/kernel.its (note that kernel.its assumes that vmlinux.bin.gz is
+in the current working directory; if desired, an alternative path can be
+specified in the kernel.its file). Here's how to create the image and inspect
+its contents:
 
 [on the host system]
 $ mkimage -f kernel.its kernel.itb
@@ -159,10 +160,10 @@ Example 2 -- new-style (FDT) kernel booting
 Consider another simple scenario, where a PPC Linux kernel is to be booted
 new-style, i.e., with a FDT blob. In this case there are two prerequisite data
 files: vmlinux.bin.gz (Linux kernel) and target.dtb (FDT blob). The uImage can
-be produced using image source file examples/kernel_fdt.its like this (note
-again, that both prerequisite data files are assumed to be present in the
-current working directory -- image source file kernel_fdt.its can be modified
-to take the files from some other location if needed):
+be produced using image source file doc/uImage.FIT/kernel_fdt.its like this
+(note again, that both prerequisite data files are assumed to be present in
+the current working directory -- image source file kernel_fdt.its can be
+modified to take the files from some other location if needed):
 
 [on the host system]
 $ mkimage -f kernel_fdt.its kernel_fdt.itb
@@ -292,5 +293,5 @@ Bytes transferred = 1109776 (10ef10 hex)
 Example 3 -- advanced booting
 -
 
-Refer to examples/multi.its for an image source file that allows more
+Refer to doc/uImage.FIT/multi.its for an image source file that allows more
 sophisticated booting scenarios (multiple kernels, ramdisks and fdt blobs).
diff --git a/doc/uImage.FIT/source_file_format.txt 
b/doc/uImage.FIT/source_file_format.txt
index 3f7104f..1d75458 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -259,4 +259,4 @@ not* be specified in a configuration node.
 8) Examples
 ---
 
-Please see examples/*.its for actual image source files.
+Please see doc/uImage.FIT/*.its for actual image source files.


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[U-Boot-Users] [PATCH 0/7] [new uImage] final fixes and cleanups

[Bartlomiej Sieka]

Hi,

This patch series consists of final fixes and cleanups of the new uImage work:
- fix style issue in previously posted patch
- update to doc/uImage.FIT/
- fixes to autoscr and mxtract commands
- preparation for merge with the master
  - disable debugging output
  - disable new format support by default
  - example of enabling new format support for a board (pcs440ep)

The patchset is available on the new-image branch of the u-boot-testing
repository, which now contains complete new uImage support (including MD5).

The new-image branch will soon be merged to the mainline U-Boot, and I'd like
to again encourage people to help with testing. To repeat: reports on test
results of the following areas not tested due to hardware unavailability will
be greatly appreciated:
- boards other that ppc
- booting from dataflash
- U-Boot commands:
  - diskboot
  - docboot
  - fdcboot
  - fpga
  - nboot
  - scsiboot
  - usbboot

Note that new format is not enabled by default -- to try it out, you must
define the following in the board config file:
#define CONFIG_FIT  1
#define CONFIG_OF_LIBFDT1
and  optionally:
#define CONFIG_FIT_VERBOSE  1

Compiling support for the new image format increases the size of U-Boot, so
depending on your Flash sector layout, adjustments to CFG_MONITOR_LEN might be
necessary.

Finally, reading doc/uImage.FIT/howto.txt should be sufficient to get you
started with the new format.

Comments and questions are welcome.

Regards,
Bartlomiej

Bartlomiej Sieka (7):
  [new uImage] Enable new uImage support for the pcs440ep board.
  [new uImage] Do not compile new uImage format support by default
  [new uImage] Disable debuging output in preparation for merge with master
  [new uImage] Compilation and new uImage handling fixes for imxtract
  [new uImage] Fix autoscr command used with new uImage format
  [new uImage] Fix *.its files location in documentation
  [new uImage] Style fix



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[U-Boot-Users] [PATCH 1/7] [new uImage] Style fix

[Bartlomiej Sieka]

Fix style issue spotted by Wolfgang Denk <[EMAIL PROTECTED]>

Signed-off-by: Bartlomiej Sieka <[EMAIL PROTECTED]>
---

 board/trab/auto_update.c |   18 +++---
 1 files changed, 7 insertions(+), 11 deletions(-)

diff --git a/board/trab/auto_update.c b/board/trab/auto_update.c
index 5311e12..46110cc 100644
--- a/board/trab/auto_update.c
+++ b/board/trab/auto_update.c
@@ -218,14 +218,12 @@ au_check_cksum_valid(int idx, long nbytes)
}
 #endif
 
-   if (nbytes != image_get_image_size (hdr))
-   {
+   if (nbytes != image_get_image_size (hdr)) {
printf ("Image %s bad total SIZE\n", aufile[idx]);
return -1;
}
/* check the data CRC */
-   if (!image_check_dcrc (hdr))
-   {
+   if (!image_check_dcrc (hdr)) {
printf ("Image %s bad data checksum\n", aufile[idx]);
return -1;
}
@@ -255,13 +253,11 @@ au_check_header_valid(int idx, long nbytes)
printf("size %#x %#lx ", image_get_data_size (hdr), nbytes);
printf("type %#x %#x ", image_get_type (hdr), IH_TYPE_KERNEL);
 #endif
-   if (nbytes < image_get_header_size ())
-   {
+   if (nbytes < image_get_header_size ()) {
printf ("Image %s bad header SIZE\n", aufile[idx]);
return -1;
}
-   if (!image_check_magic (hdr) || !image_check_arch (hdr, IH_ARCH_ARM))
-   {
+   if (!image_check_magic (hdr) || !image_check_arch (hdr, IH_ARCH_ARM)) {
printf ("Image %s bad MAGIC or ARCH\n", aufile[idx]);
return -1;
}
@@ -271,7 +267,8 @@ au_check_header_valid(int idx, long nbytes)
return -1;
}
/* check the type - could do this all in one gigantic if() */
-   if ((idx == IDX_FIRMWARE) && !image_check_type (hdr, IH_TYPE_FIRMWARE)) 
{
+   if ((idx == IDX_FIRMWARE) &&
+   !image_check_type (hdr, IH_TYPE_FIRMWARE)) {
printf ("Image %s wrong type\n", aufile[idx]);
return -1;
}
@@ -289,8 +286,7 @@ au_check_header_valid(int idx, long nbytes)
return -1;
}
if ((idx == IDX_PREPARE || idx == IDX_PREINST || idx == IDX_POSTINST)
-   && !image_check_type (hdr, IH_TYPE_SCRIPT))
-   {
+   && !image_check_type (hdr, IH_TYPE_SCRIPT)) {
printf ("Image %s wrong type\n", aufile[idx]);
return -1;
}


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[U-Boot-Users] [PATCH] Update CONFIG_PCIAUTO_SKIP_HOST_BRIDGE to related boards

[Tsi-Chung Liew]

Signed-off-by: TsiChung Liew <[EMAIL PROTECTED]>
---
 drivers/pci/pci_auto.c  |2 +-
 include/configs/BC3450.h|1 +
 include/configs/M54455EVB.h |2 +-
 include/configs/M5475EVB.h  |2 +-
 include/configs/M5485EVB.h  |1 +
 include/configs/PM520.h |1 +
 include/configs/TOP5200.h   |1 +
 include/configs/TQM5200.h   |1 +
 include/configs/Total5200.h |1 +
 include/configs/aev.h   |1 +
 include/configs/cpci5200.h  |1 +
 include/configs/hmi1001.h   |1 +
 include/configs/inka4x0.h   |1 +
 include/configs/jupiter.h   |1 +
 include/configs/o2dnt.h |1 +
 include/configs/pf5200.h|1 +
 include/configs/spieval.h   |1 +
 17 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 1085a6c..a20b4e1 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -383,7 +383,7 @@ int pciauto_config_device(struct pci_controller *hose, 
pci_dev_t dev)
hose->current_busno++;
break;
 
-#if defined(CONFIG_MPC5200) || defined(CONFIG_PCIAUTO_SKIP_HOST_BRIDGE)
+#ifdef CONFIG_PCIAUTO_SKIP_HOST_BRIDGE
case PCI_CLASS_BRIDGE_OTHER:
DEBUGF("PCI Autoconfig: Skipping bridge device %d\n",
   PCI_DEV(dev));
diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h
index 3d09ee7..706c13e 100644
--- a/include/configs/BC3450.h
+++ b/include/configs/BC3450.h
@@ -87,6 +87,7 @@
 # define CONFIG_PCI1
 # define CONFIG_PCI_PNP1
 /* #define CONFIG_PCI_SCAN_SHOW 1 */
+#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE1
 
 #define CONFIG_PCI_MEM_BUS 0x4000
 #define CONFIG_PCI_MEM_PHYSCONFIG_PCI_MEM_BUS
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index 5f55761..f5edddf 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -175,7 +175,7 @@
 #ifdef CONFIG_CMD_PCI
 #define CONFIG_PCI 1
 #define CONFIG_PCI_PNP 1
-#define CONFIG_SKIPPCI_HOSTBRIDGE
+#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE1
 
 #define CFG_PCI_CACHE_LINE_SIZE4
 
diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h
index f0d42be..a4e6c5d 100644
--- a/include/configs/M5475EVB.h
+++ b/include/configs/M5475EVB.h
@@ -132,7 +132,7 @@
 #ifdef CONFIG_CMD_PCI
 #define CONFIG_PCI 1
 #define CONFIG_PCI_PNP 1
-#define CONFIG_SKIPPCI_HOSTBRIDGE
+#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE1
 
 #define CFG_PCI_CACHE_LINE_SIZE8
 
diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h
index 88dd219..9121023 100644
--- a/include/configs/M5485EVB.h
+++ b/include/configs/M5485EVB.h
@@ -129,6 +129,7 @@
 #ifdef CONFIG_CMD_PCI
 #define CONFIG_PCI 1
 #define CONFIG_PCI_PNP 1
+#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE1
 
 #define CFG_PCI_MEM_BUS0x8000
 #define CFG_PCI_MEM_PHYS   CFG_PCI_MEM_BUS
diff --git a/include/configs/PM520.h b/include/configs/PM520.h
index d9405b0..ad480a6 100644
--- a/include/configs/PM520.h
+++ b/include/configs/PM520.h
@@ -57,6 +57,7 @@
 #define CONFIG_PCI 1
 #define CONFIG_PCI_PNP 1
 #define CONFIG_PCI_SCAN_SHOW   1
+#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE1
 
 #define CONFIG_PCI_MEM_BUS 0x4000
 #define CONFIG_PCI_MEM_PHYSCONFIG_PCI_MEM_BUS
diff --git a/include/configs/TOP5200.h b/include/configs/TOP5200.h
index dea5ead..1affcfd 100644
--- a/include/configs/TOP5200.h
+++ b/include/configs/TOP5200.h
@@ -67,6 +67,7 @@
 #  define CONFIG_PCI   1
 #  define CONFIG_PCI_PNP   1
 #  define CONFIG_PCI_SCAN_SHOW 1
+#  define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE  1
 
 #  define CONFIG_PCI_MEM_BUS   0x4000
 #  define CONFIG_PCI_MEM_PHYS  CONFIG_PCI_MEM_BUS
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 9a0e9b8..30d7baf 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -85,6 +85,7 @@
 #define CONFIG_PCI 1
 #define CONFIG_PCI_PNP 1
 /* #define CONFIG_PCI_SCAN_SHOW1 */
+#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE1
 
 #define CONFIG_PCI_MEM_BUS 0x4000
 #define CONFIG_PCI_MEM_PHYSCONFIG_PCI_MEM_BUS
diff --git a/include/configs/Total5200.h b/include/configs/Total5200.h
index 2e9a2bc..2507d77 100644
--- a/include/configs/Total5200.h
+++ b/include/configs/Total5200.h
@@ -80,6 +80,7 @@
 #define CONFIG_PCI 1
 #define CONFIG_PCI_PNP 1
 #define CONFIG_PCI_SCAN_SHOW   1
+#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE1
 
 #define CONFIG_PCI_MEM_BUS 0x4000
 #define CONFIG_PCI_MEM_PHYSCONFIG_PCI_MEM_BUS
diff --git a/include/configs/aev.h b/include/configs/aev.h
index 0163025..2785db1 100644
--- a/include/configs/aev.h
+++ b/include/configs/aev.h
@@ -60,6 +60,7 @@
 #define CONFIG_PCI 1
 #define CONFIG_PCI_PNP 1
 /* #define CONFIG_PCI_SCAN_SHOW1 */

[U-Boot-Users] [PATCH] Add CONFIG_MII_INIT in cmd_mii.c

[Tsi-Chung Liew]

From: TsiChung Liew <[EMAIL PROTECTED]>

Provide common configuration in do_mii() to execute mii_init()
for all cpu architectures

Signed-off-by: TsiChung Liew <[EMAIL PROTECTED]>
---
 common/cmd_mii.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/common/cmd_mii.c b/common/cmd_mii.c
index 31ac43d..fa753dd 100644
--- a/common/cmd_mii.c
+++ b/common/cmd_mii.c
@@ -306,7 +306,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char 
*argv[])
return 1;
}
 
-#if defined(CONFIG_8xx) || defined(CONFIG_MCF532x)
+#if defined(CONFIG_8xx) || defined(CONFIG_MCF532x) || defined(CONFIG_MII_INIT)
mii_init ();
 #endif
 
-- 
1.5.4.1


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Re: [U-Boot-Users] include/autoconf.mk issue

[Grant Likely]

On Wed, Mar 19, 2008 at 5:29 PM, Wolfgang Denk <[EMAIL PROTECTED]> wrote:
> Dear Grant,
>
>  in http://news.gmane.org/gmane.comp.boot-loaders.u-boot
>  Jean-Christophe asked to get rid of the "#ifdef CONFIG_POST" parts in
>  the post code by using the "COBJS-$(CONFIG_POST) += " approach in the
>  Makefile. We tried, and it didn't work.
>
>  The reason is that the Makefile assumes that  the  CONFIG_*  variable
>  settings  in  include/autoconf.mk  have  a  value  of  "y", so we can
>  collect objects to build in the "COBJS-y" make variable.
>
>  However, this is not always true. Here is what we see for example on
>  the "lwmon5" board:
>
>  -> grep -v =y include/autoconf.mk
>  CONFIG_POST="(CFG_POST_CACHE | CFG_POST_CPU | CFG_POST_ECC_ON | 
> CFG_POST_ETHER | CFG_POST_FPU | CFG_POST_I2C | CFG_POST_MEMORY | CFG_POST_RTC 
> | CFG_POST_SPR | CFG_POST_UART | CFG_POST_SYSMON | CFG_POST_WATCHDOG | 
> CFG_POST_DSP | CFG_POST_BSPEC1 | CFG_POST_BSPEC2 | CFG_POST_BSPEC3 | 
> CFG_POST_BSPEC4 | CFG_POST_BSPEC5)"
>
>  In this case, only CONFIG_POST is critical, but  some  of  the  other
>  settings might show similar problems, and this is just an examplefrom
>  a  single  board  -  there  may be other, similar issues lurking with
>  other boards.

Yeah, I was expecting as much.  You're right of course that the
COBJS-y trick only works if the assumption that the symbol is defined
and has either an empty value or a value of '1'.  Any that do not fall
in this category cannot be used for "COBJS-${BLAH} += ..." statements.

This is true in the kernel also.  Only CONFIG values that are bool or
tristate are suitable for this type of use.

>  What is the suggested way to fix this? It's clear  that  the  current
>  string value
>
> CONFIG_POST="(CFG_POST_CACHE | ... )"
>
>  is of no use for the decistion which files need to  be  compiled.  My
>  initial idea was to say that all non-empty strings should be replaced
>  by  "y",  but  I'm not sure about side effects; also, what to do with
>  numeric values? Convert only non-zero values  to  "y"?  But  then,  a
>  "#define FOO 0" still means that "FOO" is defined...

No, the side effects would be too severe to blanket change all strings
into "y".  I see two possible solutions (both of which have already
been suggested by jdl):
1. Break up CONFIG_POST bitmask and replace with CONFIG_POST_CACHE,
etc.  Just like was done with CONFIG_CMD.
2. Add a CONFIG_HAS_POST value that specifies that CONFIG_POST has a value.

As for having to do this again for the next one; yes we will.  That's
just going to be part of the pain of moving to a Kconfig style system.
 Not all CONFIG_ values are suitable for conditional compilation from
the makefiles so where they are not we need to adapt.

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

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Re: [U-Boot-Users] make env

[Ladislav Michl]

On Thu, Mar 20, 2008 at 10:27:18PM +0100, Wolfgang Denk wrote:
> It's not fw_setenv specific. You would have to do the same  when  you
> cross-compile  any  other  native  Linux  application  code. The best
> approach would be to fix your toolchain.

Well, any other applications compile just fine. This is needed only when
you are interfacing some kernel subsystem (MTD in this case) and need
its headers. Current approach needs one toolchain for compiling fw_setenv
with 2.4 kernel and another for 2.6 kernel while there is no technical
reason not to use very same toolchain for both.

Best regards,
ladis

PS. I'm just pointing to one minor difficulty, as I have no problem with
that. I only tried to guess where might be Manuel's problem once he
figure out MTD_VERSION variable.

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Re: [U-Boot-Users] make env

[Wolfgang Denk]

In message <[EMAIL PROTECTED]> you wrote:
>
> > I'm not sure what you wanted to express with your comment?
> 
> Well, it seems you have "properly" configured toolchain - you installed
> proper kernel headers. In my case it ends with:

Well, yes, a correctly configured and working toolchain is considered
a prerequisite for U-Boot development.

> fw_env.c:39:27: error: mtd/mtd-user.h: No such file or directory
> 
> Here I have no opportunity to tell compiler where to find that header.
> I'd have to put them on some "standard" place, which could conflict with
> 2.4 headers. I do not want to pass U-Boot specific flags, just fw_setenv
> specific.

It's not fw_setenv specific. You would have to do the same  when  you
cross-compile  any  other  native  Linux  application  code. The best
approach would be to fix your toolchain.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
"The algorithm to do that is extremely nasty. You might want  to  mug
someone with it."   - M. Devine, Computer Science 340

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Re: [U-Boot-Users] [PATCH] ppc4xx: Don't use last 256 bytes of SDRAM, workaround for 440EPx CHIP 11 errata

[Stefan Roese]

Hi Larry,

On Thursday 20 March 2008, Larry Johnson wrote:
> Having multiple implementations of the 440EXp SDRAM setup code is, in
> itself, less than ideal.  One alternative is to have a 440EPX board with
> on-board SDRAM chips fake an array of SPD bytes describing the chips,
> and pass it to the "denali_spd_ddr2.c" code.  The SPD code then becomes
> the single location for the technology of how to configure the Denali
> SDRAM controller.

Generally a good idea. Unfortunately it can't be done. Think about 440EPx 
boards booting from NAND flash. Here the complete CPU setup code including 
SDRAM setup needs to fit into 4k. This can only be done with a fixed SDRAM 
setup. :-(

But your are right. Other boards without such a image size restriction should 
probably use the SPD code. One reason they aren't doing it right now is, that 
the SPD code is quite new and didn't exist when those board port were done. 
But they can be converted to use this code at some time.

> The additional benefit (for me, anyway :-) ) is having more eyeballs on
> the SPD code, with more opportunities for testing, bug fixing, and
> enhancements.

Ack.

BTW: Can you test your board with ECC modules? We need to change the ECC code 
in the Denali SPD routines to not touch the last 256 bytes here too. Best 
would be if you could provide a patch for this. :)

Thanks.

Best regards,
Stefan

=
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
=

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[U-Boot-Users] [PATCH] lwmon5 POST: remove unreachable code

[Wolfgang Denk]

plus some coding style cleanup

Signed-off-by: Wolfgang Denk <[EMAIL PROTECTED]>
---
 post/board/lwmon5/watchdog.c |   43 +++--
 1 files changed, 24 insertions(+), 19 deletions(-)

diff --git a/post/board/lwmon5/watchdog.c b/post/board/lwmon5/watchdog.c
index 8348346..48ff687 100644
--- a/post/board/lwmon5/watchdog.c
+++ b/post/board/lwmon5/watchdog.c
@@ -24,7 +24,8 @@
 
 #include 
 
-/* This test verifies if the reason of last reset was an abnormal voltage
+/*
+ * This test verifies if the reason of last reset was an abnormal voltage
  * condition, than it performs watchdog test, measuing time required to
  * trigger watchdog reset.
  */
@@ -55,7 +56,8 @@ static void watchdog_magic_write(uint value)
 int sysmon1_post_test(int flags)
 {
if (gpio_read_in_bit(CFG_GPIO_SYSMON_STATUS)) {
-   /* 3.1. GPIO62 is low
+   /*
+* 3.1. GPIO62 is low
 * Assuming system voltage failure.
 */
post_log("Abnormal voltage detected (GPIO62)\n");
@@ -67,11 +69,14 @@ int sysmon1_post_test(int flags)
 
 int lwmon5_watchdog_post_test(int flags)
 {
+   ulong time;
+
/* On each reset scratch register 1 should be tested,
 * but first test GPIO62:
 */
if (!(flags & POST_MANUAL) && sysmon1_post_test(flags)) {
-   /* 3.1. GPIO62 is low
+   /*
+* 3.1. GPIO62 is low
 * Assuming system voltage failure.
 */
/* 3.1.1. Set scratch register 1 to 0x */
@@ -81,12 +86,12 @@ int lwmon5_watchdog_post_test(int flags)
}
 
if (watchdog_magic_read() != CFG_WATCHDOG_MAGIC) {
-   /* 3.2. Scratch register 1 differs from magic value 0x1248
+   /*
+* 3.2. Scratch register 1 differs from magic value 0x1248
 * Assuming PowerOn
 */
int ints;
ulong base;
-   ulong time;
 
/* 3.2.1. Set magic value to scratch register */
watchdog_magic_write(CFG_WATCHDOG_MAGIC);
@@ -104,28 +109,28 @@ int lwmon5_watchdog_post_test(int flags)
if (ints)
enable_interrupts ();
 
-   /* 3.2.5. Reset didn't happen. - Set 0x
+   /*
+* 3.2.5. Reset didn't happen. - Set 0x
 * into scratch register 1
 */
watchdog_magic_write(0);
/* 3.2.6. Mark test as failed. */
post_log("hw watchdog time : %u ms, failed ", time);
return 2;
-   } else {
-   /* 3.3. Scratch register matches magic value 0x1248
-* Assume this is watchdog-initiated reset
-*/
-   ulong time;
-   /* 3.3.1. So, the test succeed, save measured time to syslog. */
-   time = in_be32((void *)CFG_WATCHDOG_TIME_ADDR);
-   post_log("hw watchdog time : %u ms, passed ", time);
-   /* 3.3.2. Set scratch register 1 to 0x */
-   watchdog_magic_write(0);
-   return 0;
}
-   return -1;
-}
 
+   /*
+* 3.3. Scratch register matches magic value 0x1248
+* Assume this is watchdog-initiated reset
+*/
+   /* 3.3.1. So, the test succeed, save measured time to syslog. */
+   time = in_be32((void *)CFG_WATCHDOG_TIME_ADDR);
+   post_log("hw watchdog time : %u ms, passed ", time);
+   /* 3.3.2. Set scratch register 1 to 0x */
+   watchdog_magic_write(0);
+
+   return 0;
+}
 
 #endif /* CONFIG_POST & CFG_POST_WATCHDOG */
 #endif /* CONFIG_POST */
-- 
1.5.4.2


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[U-Boot-Users] [PATCH] LWMON5: POST RTC fix

[Wolfgang Denk]

From: Yuri Tikhonov <[EMAIL PROTECTED]>

Modify the RTC API to provide one a status for the time reported by
the rtc_get() function:
  0 - a reliable time is guaranteed,
< 0 - a reliable time isn't guaranteed (power fault, clock issues,
  and so on).

The RTC chip drivers are responsible for providing this info if the
corresponding chip supports such functionality. If not - always
report that the time is reliable.

The POST RTC test was modified to detect the RTC faults utilizing
this new rtc_get() feature.

Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
---
 board/bmw/m48t59y.c |4 +++-
 board/cray/L1/L1.c  |4 ++--
 board/etin/debris/phantom.c |4 +++-
 board/mousse/m48t59y.c  |4 +++-
 cpu/s3c44b0/cpu.c   |4 +++-
 drivers/rtc/bfin_rtc.c  |6 --
 drivers/rtc/ds12887.c   |4 +++-
 drivers/rtc/ds1302.c|6 +-
 drivers/rtc/ds1306.c|8 ++--
 drivers/rtc/ds1307.c|6 +-
 drivers/rtc/ds1337.c|6 +-
 drivers/rtc/ds1374.c|   11 ---
 drivers/rtc/ds1556.c|3 ++-
 drivers/rtc/ds164x.c|4 +++-
 drivers/rtc/ds174x.c|4 +++-
 drivers/rtc/ds3231.c|6 +-
 drivers/rtc/isl1208.c   |6 +-
 drivers/rtc/m41t11.c|7 ++-
 drivers/rtc/m41t60.c|6 --
 drivers/rtc/m41t62.c|4 +++-
 drivers/rtc/m48t35ax.c  |4 +++-
 drivers/rtc/max6900.c   |4 +++-
 drivers/rtc/mc146818.c  |4 +++-
 drivers/rtc/mcfrtc.c|4 +++-
 drivers/rtc/mk48t59.c   |4 +++-
 drivers/rtc/mpc5xxx.c   |4 +++-
 drivers/rtc/mpc8xx.c|4 +++-
 drivers/rtc/pcf8563.c   |6 +-
 drivers/rtc/rs5c372.c   |8 
 drivers/rtc/rx8025.c|   17 +
 drivers/rtc/s3c24x0_rtc.c   |4 +++-
 drivers/rtc/x1205.c |4 +++-
 include/rtc.h   |2 +-
 post/drivers/rtc.c  |   15 +++
 34 files changed, 146 insertions(+), 45 deletions(-)

diff --git a/board/bmw/m48t59y.c b/board/bmw/m48t59y.c
index d72c861..a1a85d0 100644
--- a/board/bmw/m48t59y.c
+++ b/board/bmw/m48t59y.c
@@ -278,7 +278,7 @@ void m48_watchdog_arm(int usec)
 /*
  * U-Boot RTC support.
  */
-void
+int
 rtc_get( struct rtc_time *tmp )
 {
m48_tod_get(&tmp->tm_year,
@@ -295,6 +295,8 @@ rtc_get( struct rtc_time *tmp )
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec );
 #endif
+
+   return 0;
 }
 
 void
diff --git a/board/cray/L1/L1.c b/board/cray/L1/L1.c
index a0fac7f..5264baf 100644
--- a/board/cray/L1/L1.c
+++ b/board/cray/L1/L1.c
@@ -170,9 +170,9 @@ long int initdram (int board_type)
 
 /* - */
 /* stubs so we can print dates w/o any nvram RTC.*/
-void rtc_get (struct rtc_time *tmp)
+int rtc_get (struct rtc_time *tmp)
 {
-   return;
+   return 0;
 }
 void rtc_set (struct rtc_time *tmp)
 {
diff --git a/board/etin/debris/phantom.c b/board/etin/debris/phantom.c
index 18ab500..263da6b 100644
--- a/board/etin/debris/phantom.c
+++ b/board/etin/debris/phantom.c
@@ -182,7 +182,7 @@ static int get_century_flag(void)
return flag;
 }
 
-void rtc_get( struct rtc_time *tmp)
+int rtc_get( struct rtc_time *tmp)
 {
if (phantom_flag < 0)
phantom_flag = get_phantom_flag();
@@ -250,6 +250,8 @@ void rtc_get( struct rtc_time *tmp)
tmp->tm_yday = 0;
tmp->tm_isdst= 0;
}
+
+   return 0;
 }
 
 void rtc_set( struct rtc_time *tmp )
diff --git a/board/mousse/m48t59y.c b/board/mousse/m48t59y.c
index 37a6244..2c1e6cf 100644
--- a/board/mousse/m48t59y.c
+++ b/board/mousse/m48t59y.c
@@ -278,7 +278,7 @@ void m48_watchdog_arm(int usec)
 /*
  * U-Boot RTC support.
  */
-void
+int
 rtc_get( struct rtc_time *tmp )
 {
m48_tod_get(&tmp->tm_year,
@@ -295,6 +295,8 @@ rtc_get( struct rtc_time *tmp )
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec );
 #endif
+
+   return 0;
 }
 
 void
diff --git a/cpu/s3c44b0/cpu.c b/cpu/s3c44b0/cpu.c
index 5d50b3c..eae6adb 100644
--- a/cpu/s3c44b0/cpu.c
+++ b/cpu/s3c44b0/cpu.c
@@ -155,7 +155,7 @@ int dcache_status (void)
#define HEX2BCD(x) x) / 10) << 4) + (x) % 10)
 #endif
 
-void rtc_get (struct rtc_time* tm)
+int rtc_get (struct rtc_time* tm)
 {
RTCCON |= 1;
tm->tm_year  = BCD2HEX(BCDYEAR);
@@ -184,6 +184,8 @@ void rtc_get (struct rtc_time* tm)
tm->tm_year += 1900;
else
tm->tm_year += 2000;
+
+   return 0;
 }
 
 void rtc_set (struct rtc_time* tm)
diff --git a/drivers/rtc/bfin_rtc.c b/drivers/rtc/bfin_rtc.c
index 5755a20..ce4f171 100644
--- a/drivers/rtc/bfin_rtc.c
+++ b/drivers/rtc/bfin_rtc.c
@@ -85,7 +85,7 @@ void rtc_set(struct rtc_time *tmp)
 

Re: [U-Boot-Users] make env

[Ladislav Michl]

On Thu, Mar 20, 2008 at 09:02:58PM +0100, Wolfgang Denk wrote:
> Yes, and actually I think this is correct. What we're building is a
> target Linux application, so the U-Boto specific CFLAG settings have
> no meaning for this (or rather would be just dangerous).
> 
> Example:
> 
> -> make env
> make -C tools/env all MTD_VERSION= || exit 1
> make[1]: Entering directory `/home/wd/git/u-boot/work/tools/env'
> ln -s ../../lib_generic/crc32.c crc32.c
> make[1]: Leaving directory `/home/wd/git/u-boot/work/tools/env'
> make[1]: Entering directory `/home/wd/git/u-boot/work/tools/env'
> arm-linux-gcc -Wall -DUSE_HOSTCC crc32.c  fw_env.c  fw_env_main.c -o
> fw_printenv
> make[1]: Leaving directory `/home/wd/git/u-boot/work/tools/env'
> -> file tools/env/fw_printenv
> tools/env/fw_printenv: ELF 32-bit LSB executable, ARM, version 1, dynamically 
> linked (uses shared libs), for GNU/Linux 2.4.3, not stripped
> 
> I'm not sure what you wanted to express with your comment?

Well, it seems you have "properly" configured toolchain - you installed
proper kernel headers. In my case it ends with:

-> make env CROSS_COMPILE=arm-C411_L24-linux-gnu-
make -C tools/env all MTD_VERSION= || exit 1
make[1]: Entering directory `/home/ladis/src/u-boot/tools/env'
arm-C411_L24-linux-gnu-gcc -Wall -DUSE_HOSTCC crc32.c  fw_env.c
fw_env_main.c -o fw_printenv
fw_env.c:39:27: error: mtd/mtd-user.h: No such file or directory

Here I have no opportunity to tell compiler where to find that header.
I'd have to put them on some "standard" place, which could conflict with
2.4 headers. I do not want to pass U-Boot specific flags, just fw_setenv
specific.

Best regards,
ladis

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Re: [U-Boot-Users] make env

[Wolfgang Denk]

In message <[EMAIL PROTECTED]> you wrote:
> On Thu, Mar 20, 2008 at 05:04:35PM +0100, Wolfgang Denk wrote:
> > I guess (you fail to mention such a basic fact as which  version  you
> > are  using) that you are referring to old code. So I recommend to use
> > recent code (i. e. release 1.3.2).
> 
> No matter how recent version is he going to use. Related Makefile
> fragment reads:
> env:
>   $(MAKE) -C tools/env all MTD_VERSION=${MTD_VERSION} || exit 1
> 
> which means CFLAGS etc. are not propagated to fw_setenv utility...

Yes, and actually I think this is correct. What we're building is a
target Linux application, so the U-Boto specific CFLAG settings have
no meaning for this (or rather would be just dangerous).

Example:

-> make env
make -C tools/env all MTD_VERSION= || exit 1
make[1]: Entering directory `/home/wd/git/u-boot/work/tools/env'
ln -s ../../lib_generic/crc32.c crc32.c
make[1]: Leaving directory `/home/wd/git/u-boot/work/tools/env'
make[1]: Entering directory `/home/wd/git/u-boot/work/tools/env'
arm-linux-gcc -Wall -DUSE_HOSTCC crc32.c  fw_env.c  fw_env_main.c -o
fw_printenv
make[1]: Leaving directory `/home/wd/git/u-boot/work/tools/env'
-> file tools/env/fw_printenv
tools/env/fw_printenv: ELF 32-bit LSB executable, ARM, version 1, dynamically 
linked (uses shared libs), for GNU/Linux 2.4.3, not stripped


I'm not sure what you wanted to express with your comment?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
"I think trash is the most important manifestation of culture we have
in my lifetime."  - Johnny Legend

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Re: [U-Boot-Users] [PATCH v2 6/9] mpc83xx: serdes setup routines

[Kim Phillips]

On Thu, 20 Mar 2008 18:26:36 +0800
Dave Liu <[EMAIL PROTECTED]> wrote:

> From: Anton Vorontsov <[EMAIL PROTECTED]>
> 
> This patch adds few routines to configure serdes on 837x targets.
> 
> Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
> ---

sounds like Anton is re-doing this patch.

Kim

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Re: [U-Boot-Users] [PATCH v2 2/9] ATA: Add the libata support

[Kim Phillips]

On Thu, 20 Mar 2008 18:19:52 +0800
Dave Liu <[EMAIL PROTECTED]> wrote:

> diff --git a/drivers/block/libata.c b/drivers/block/libata.c
> new file mode 100644
> index 000..aed5be3
> --- /dev/null
> +++ b/drivers/block/libata.c
> @@ -0,0 +1,158 @@
> +/*
> + * Copyright (C) 2008 Freescale Semiconductor, Inc.
> + *   Dave Liu <[EMAIL PROTECTED]>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + *
> + * with the reference to libata of kernel

If you're going to copy code directly from the kernel, the kernel
files' copyrights need to be copied here, too.

Kim

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Re: [U-Boot-Users] ARM custodian change

[Stelian Pop]

Le jeudi 20 mars 2008 à 17:36 +, Nicolas Ferre a écrit :
> Ulf Samuelsson  atmel.com> writes:
> 
> > > Too bad. I think it would be a good idea, if "they" would try to work 
> > > with 
> > > the "official" U-Boot community again. Now with the custodian framework 
> > > in 
> > > place, some problems of the past should be solved.
> > 
> > I 'bcc' our own "Jean-Christophe" (Zettel) running the AT91 apps team
> > and he will have to discuss with the S/W team and decide.
> 
> "We" (the AT91 S/W team) are glad to work with the "one and only" U-Boot
> community. It is the first step to move to the last codebase that is the 
> hardest.
> 
> The work done by Stelian Pop to integrate AT91CAP9 shows the way for all
> AT91SAM9 support. We will for sure work with Stelian Pop, Jean-Christophe
> Plagniol-Villard , yourself the whole AT91 U-Boot community to have a smooth
> transition to the latest codebase.

As a matter of fact, Atmel has already provided me with the necessary
hardware. I will shortly, as time permits, start feeding the list with
AT91SAM patches...

-- 
Stelian Pop <[EMAIL PROTECTED]>


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Re: [U-Boot-Users] make env

[Ladislav Michl]

On Thu, Mar 20, 2008 at 05:04:35PM +0100, Wolfgang Denk wrote:
> I guess (you fail to mention such a basic fact as which  version  you
> are  using) that you are referring to old code. So I recommend to use
> recent code (i. e. release 1.3.2).

No matter how recent version is he going to use. Related Makefile
fragment reads:
env:
$(MAKE) -C tools/env all MTD_VERSION=${MTD_VERSION} || exit 1

which means CFLAGS etc. are not propagated to fw_setenv utility...

Best regards,
ladis


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Re: [U-Boot-Users] ARM custodian change

[Nicolas Ferre]

Ulf Samuelsson  atmel.com> writes:

> > Too bad. I think it would be a good idea, if "they" would try to work with 
> > the "official" U-Boot community again. Now with the custodian framework in 
> > place, some problems of the past should be solved.
> 
> I 'bcc' our own "Jean-Christophe" (Zettel) running the AT91 apps team
> and he will have to discuss with the S/W team and decide.

"We" (the AT91 S/W team) are glad to work with the "one and only" U-Boot
community. It is the first step to move to the last codebase that is the 
hardest.

The work done by Stelian Pop to integrate AT91CAP9 shows the way for all
AT91SAM9 support. We will for sure work with Stelian Pop, Jean-Christophe
Plagniol-Villard , yourself the whole AT91 U-Boot community to have a smooth
transition to the latest codebase.

Regards,
-- 
Nicolas Ferre


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Re: [U-Boot-Users] ARM custodian change

[Nicolas Ferre]

Ulf Samuelsson  atmel.com> writes:

> 
> > On Tuesday 18 March 2008, Ulf Samuelsson wrote:
> >> > Here a short announcement about a change in the U-Boot ARM 
> >> > custodianship:
> >> >
> >> > Since the ARM platform is so broad and has multiple vendor
> >> > specific "sub-architectures" it seemed necessary to add new U-Boot
> >> > custodian branches for those architectures. Fortunately we had some
> >> > volunteers. Here the list:
> >> >
> >> > u-boot-at91 (Atmel ARM) Jean-Christophe Plagniol-Villard

[..]

> >> Would it not be better if the Atmel ARM was handled by the Atmel AT91
> >> Product line

We (the AT91 software team) do not have this opinion. It is very enriching 
to work with people from the community.

> > Could be, I really don't know. I don't remember seeing Atmel ARM patches 
> > posted or reviewed by other Atmel than yourself.
> 
> They were sent in 3-4 years ago.
> Since there were no response, they lost interest, and have not tried 
> since then.
> They are maintaining a separate U-Boot source package.

Ulf, we do not lose interest ! We simply do not have the
opportunity to rebase and test our work against the latest developments 
for all chips&boards.
This opportunity is here now and we will be glad to contribute.

> > So for the time being, we gladly accept that Jean-Christophe volunteered 
> > to take over this custodianship. From my point of view, he is doing a 
> > very good job with his other U-Boot activities. So I expect that the 
> > AT91 support could be handled better from now on.
> 
> Have no criticism against Jean-Christophe, but I think that support for 
> new chips may be available earlier with the AT91 team.

We  will, for sure, work with Jean-Christophe and all AT91 u-boot 
contributors for new chips introduction.

> > But again, we are open for other suggestions here too. If you think 
> > someone at Atmel is better suited to do this job, then please let us 
> > know.
> 
> I will not have the time to maintain, that is for sure.
> 
> I think that the issue needs to be raised with the AT91 team, but it 
> might be that the AT91 team decides that they rather work closely 
> with Jean-Christophe.
> 
> Andrew Victor is doing a good job maintaining the AT91 Linux port
> so there is a precedent for this already.

It is exactly the kind of relationship we would like to build with the 
new custodian.

Regards,
-- 
Nicolas Ferre


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[U-Boot-Users] [PATCH 2/3] mpc8323erdb: Improve the system performance

[Michael Barkowski]

The following changes are based on kernel UCC ethernet performance:

1.  Make the CSB bus pipeline depth as 4, and enable the repeat mode
2.  Optimize transactions between QE and CSB.  Added CFG_SPCR_OPT
switch to enable this setting.

The following changes are based on the App Note AN3369 and
verified to improve memory latency using LMbench:

3.  CS0_CONFIG[AP_n_EN] is changed from 1 to 0
4.  CS0_CONFIG[ODT_WR_CONFIG] set to 1.  Was a reserved setting
previously.
5.  TIMING_CFG_1[WRREC] is changed from 3clks to 2clks  (based on
Twr=15ns, and this was already the setting in DDR_MODE)
6.  TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on
Trp=15ns)
7.  TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on
Tras=40ns)
8.  TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on
Trcd=15ns)
9.  TIMING_CFG_1[REFREC] changed from 21 clks to 11clks.  (based on
Trfc=75ns)
10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks.  (based
on Tfaw=50ns)
11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based
on CL=3 and WL=2).

Signed-off-by: Michael Barkowski <[EMAIL PROTECTED]>
Acked-by: Kim Phillips <[EMAIL PROTECTED]>
---
 cpu/mpc83xx/cpu_init.c|6 ++
 include/configs/MPC8323ERDB.h |   35 +--
 include/mpc83xx.h |1 +
 3 files changed, 28 insertions(+), 14 deletions(-)

diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index e643037..fba5b02 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -79,6 +79,12 @@ void cpu_init_f (volatile immap_t * im)
  (CFG_ACR_RPTCNT << ACR_RPTCNT_SHIFT);
 #endif
 
+#ifdef CFG_SPCR_OPT
+   /* Optimize transactions between CSB and other devices */
+   im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_OPT) |
+  (CFG_SPCR_OPT << SPCR_OPT_SHIFT);
+#endif
+
 #ifdef CFG_SPCR_TSECEP
/* all eTSEC's Emergency priority */
im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_TSECEP) |
diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index 53322d6..42571c7 100644
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -66,6 +66,13 @@
 #define CFG_IMMR   0xE000
 
 /*
+ * System performance
+ */
+#define CFG_ACR_PIPE_DEP   3   /* Arbiter pipeline depth (0-3) */
+#define CFG_ACR_RPTCNT 3   /* Arbiter repeat count (0-7) */
+#define CFG_SPCR_OPT   1   /* (0-1) Optimize transactions between  
CSB and the SEC and QUICC Engine block */
+
+/*
  * DDR Setup
  */
 #define CFG_DDR_BASE   0x  /* DDR is system memory */
@@ -83,10 +90,9 @@
  */
 #define CFG_DDR_SIZE   64  /* MB */
 #define CFG_DDR_CS0_CONFIG ( CSCONFIG_EN \
-   | CSCONFIG_AP \
-   | 0x0004 /* TODO */ \
+   | CSCONFIG_ODT_WR_ACS \
| CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_9 )
-   /* 0x80840101 */
+   /* 0x80010101 */
 #define CFG_DDR_TIMING_0   ( ( 0 << TIMING_CFG0_RWT_SHIFT ) \
| ( 0 << TIMING_CFG0_WRT_SHIFT ) \
| ( 0 << TIMING_CFG0_RRT_SHIFT ) \
@@ -96,28 +102,29 @@
| ( 8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT ) \
| ( 2 << TIMING_CFG0_MRS_CYC_SHIFT ) )
/* 0x00220802 */
-#define CFG_DDR_TIMING_1   ( ( 3 << TIMING_CFG1_PRETOACT_SHIFT ) \
-   | ( 9 << TIMING_CFG1_ACTTOPRE_SHIFT ) \
-   | ( 3 << TIMING_CFG1_ACTTORW_SHIFT ) \
+#define CFG_DDR_TIMING_1   ( ( 2 << TIMING_CFG1_PRETOACT_SHIFT ) \
+   | ( 6 << TIMING_CFG1_ACTTOPRE_SHIFT ) \
+   | ( 2 << TIMING_CFG1_ACTTORW_SHIFT ) \
| ( 5 << TIMING_CFG1_CASLAT_SHIFT ) \
-   | (13 << TIMING_CFG1_REFREC_SHIFT ) \
-   | ( 3 << TIMING_CFG1_WRREC_SHIFT ) \
+   | ( 3 << TIMING_CFG1_REFREC_SHIFT ) \
+   | ( 2 << TIMING_CFG1_WRREC_SHIFT ) \
| ( 2 << TIMING_CFG1_ACTTOACT_SHIFT ) \
| ( 2 << TIMING_CFG1_WRTORD_SHIFT ) )
-   /* 0x3935d322 */
-#define CFG_DDR_TIMING_2   ( (31 << TIMING_CFG2_CPO_SHIFT ) \
+   /* 0x26253222 */
+#define CFG_DDR_TIMING_2   ( ( 1 << TIMING_CFG2_ADD_LAT_SHIFT ) \
+   | (31 << TIMING_CFG2_CPO_SHIFT ) \
| ( 2 << TIMING_CFG2_WR_LAT_DELAY_SHIFT ) \
| ( 2 << TIMING_CFG2_RD_TO_PRE_SHIFT ) \
| ( 2 << TIMIN

[U-Boot-Users] [PATCH 3/3] mpc8323erdb: remove RTC and add EEPROM

[Michael Barkowski]

There's no on-board RTC on the MPC8323ERDB, but there is an EEPROM.

Signed-off-by: Michael Barkowski <[EMAIL PROTECTED]>
Acked-by: Kim Phillips <[EMAIL PROTECTED]>
---
 include/configs/MPC8323ERDB.h |7 ---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index 42571c7..94c4c6b 100644
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -321,10 +321,10 @@
 #define CFG_I2C_OFFSET 0x3000
 
 /*
- * Config on-board RTC
+ * Config on-board EEPROM
  */
-#define CONFIG_RTC_DS1374  /* use ds1374 rtc via i2c */
-#define CFG_I2C_RTC_ADDR   0x68/* at address 0x68 */
+#define CFG_I2C_EEPROM_ADDR 0x50
+#define CFG_I2C_EEPROM_ADDR_LEN 2
 
 /*
  * General PCI
@@ -417,6 +417,7 @@
 
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
 #define CONFIG_CMD_ASKENV
 
 #if defined(CONFIG_PCI)
-- 
1.5.3.6



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[U-Boot-Users] [PATCH 1/3] mpc8323erdb: use readable DDR config macros

[Michael Barkowski]

Use available shift/mask macros to define DDR configuration.

Signed-off-by: Michael Barkowski <[EMAIL PROTECTED]>
Acked-by: Kim Phillips <[EMAIL PROTECTED]>
---
 include/configs/MPC8323ERDB.h |   50 ++--
 1 files changed, 42 insertions(+), 8 deletions(-)

diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index bf5ef4b..53322d6 100644
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -82,17 +82,51 @@
 /* Manually set up DDR parameters
  */
 #define CFG_DDR_SIZE   64  /* MB */
-#define CFG_DDR_CS0_CONFIG 0x80840101
-#define CFG_DDR_TIMING_0   0x00220802
-#define CFG_DDR_TIMING_1   0x3935d322
-#define CFG_DDR_TIMING_2   0x0f9048ca
+#define CFG_DDR_CS0_CONFIG ( CSCONFIG_EN \
+   | CSCONFIG_AP \
+   | 0x0004 /* TODO */ \
+   | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_9 )
+   /* 0x80840101 */
+#define CFG_DDR_TIMING_0   ( ( 0 << TIMING_CFG0_RWT_SHIFT ) \
+   | ( 0 << TIMING_CFG0_WRT_SHIFT ) \
+   | ( 0 << TIMING_CFG0_RRT_SHIFT ) \
+   | ( 0 << TIMING_CFG0_WWT_SHIFT ) \
+   | ( 2 << TIMING_CFG0_ACT_PD_EXIT_SHIFT ) \
+   | ( 2 << TIMING_CFG0_PRE_PD_EXIT_SHIFT ) \
+   | ( 8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT ) \
+   | ( 2 << TIMING_CFG0_MRS_CYC_SHIFT ) )
+   /* 0x00220802 */
+#define CFG_DDR_TIMING_1   ( ( 3 << TIMING_CFG1_PRETOACT_SHIFT ) \
+   | ( 9 << TIMING_CFG1_ACTTOPRE_SHIFT ) \
+   | ( 3 << TIMING_CFG1_ACTTORW_SHIFT ) \
+   | ( 5 << TIMING_CFG1_CASLAT_SHIFT ) \
+   | (13 << TIMING_CFG1_REFREC_SHIFT ) \
+   | ( 3 << TIMING_CFG1_WRREC_SHIFT ) \
+   | ( 2 << TIMING_CFG1_ACTTOACT_SHIFT ) \
+   | ( 2 << TIMING_CFG1_WRTORD_SHIFT ) )
+   /* 0x3935d322 */
+#define CFG_DDR_TIMING_2   ( (31 << TIMING_CFG2_CPO_SHIFT ) \
+   | ( 2 << TIMING_CFG2_WR_LAT_DELAY_SHIFT ) \
+   | ( 2 << TIMING_CFG2_RD_TO_PRE_SHIFT ) \
+   | ( 2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT ) \
+   | ( 3 << TIMING_CFG2_CKE_PLS_SHIFT ) \
+   | (10 << TIMING_CFG2_FOUR_ACT_SHIFT) )
+   /* 0x0f9048ca */
 #define CFG_DDR_TIMING_3   0x
-#define CFG_DDR_CLK_CNTL   0x0200
-#define CFG_DDR_MODE   0x44400232
+#define CFG_DDR_CLK_CNTL   DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
+   /* 0x0200 */
+#define CFG_DDR_MODE   ( ( 0x4440 << SDRAM_MODE_ESD_SHIFT ) \
+   | ( 0x0232 << SDRAM_MODE_SD_SHIFT ) )
+   /* 0x44400232 */
 #define CFG_DDR_MODE2  0x8000c000
-#define CFG_DDR_INTERVAL   0x03200064
+#define CFG_DDR_INTERVAL   ( ( 800 << SDRAM_INTERVAL_REFINT_SHIFT ) \
+   | ( 100 << SDRAM_INTERVAL_BSTOPRE_SHIFT ) )
+   /* 0x03200064 */
 #define CFG_DDR_CS0_BNDS   0x0003
-#define CFG_DDR_SDRAM_CFG  0x4308
+#define CFG_DDR_SDRAM_CFG  ( SDRAM_CFG_SREN \
+   | SDRAM_CFG_SDRAM_TYPE_DDR2 \
+   | SDRAM_CFG_32_BE )
+   /* 0x4308 */
 #define CFG_DDR_SDRAM_CFG2 0x00401000
 #endif
 
-- 
1.5.3.6





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Re: [U-Boot-Users] include/autoconf.mk issue

[Jerry Van Baren]

Jon Loeliger wrote:
> On Thu, 2008-03-20 at 10:32, Wolfgang Denk wrote:
> 
>> Um... that would fix this specific situation - but we might still run
>> into the same problem with the next attempt to convert  code  to  the
>> new config style.
> 
> Yeah, we just need to pick 'em off one-by-one... :-)
> 
>> For example, there might be code which might be compiled depending on
>> CONFIG_PREBOOT.
> 
> Ah, as I understand that one, I think it gets solved in
> a slightly different manner.  The kernel introduces a "HAS"
> variant that indicates if the feature is enabled and
> then uses something like CONFIG_HAS_PREBOOT to indicate
> and test for its presence.  The actual _value_ remains
> the CONFIG_PREBOOT symbol.
> 
> jdl

Hi Jon,

In a recent patch (picked up by Stefan but not in the current ToT)
   
I added a config CONFIG_FLASH_SHOW_PROGRESS which I used to provide a 
countdown value as well as configure code (*not* a .o file).  Based on 
my limited understanding and perusal of the linux Kconfig methodology, 
this looked like an acceptable thing.

Is this a violation of Good Design[tm], or is the "CONFIG_HAS_*" 
principle an additional rule that only applies if you have a separately 
compiled file, necessary so that the "COBJS-y +=" trick works?

Thanks for clarifying,
gvb

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Re: [U-Boot-Users] [PATCH 1/7] 83xx: nand support for MPC837XRDB boards

[Anton Vorontsov]

On Thu, Mar 20, 2008 at 11:26:45AM -0500, Scott Wood wrote:
> On Wed, Mar 19, 2008 at 08:16:45PM -0500, Kim Phillips wrote:
> > On Tue, 18 Mar 2008 17:10:55 +0300
> > Anton Vorontsov <[EMAIL PROTECTED]> wrote:
> > 
> > > 
> > > > > -/* VSC7385 Gigabit Switch support */
> > > > > +/*
> > > > > + * VSC7385 Gigabit Switch support
> > > > > + */
> > > > > +#define CFG_VSC7385_BASE 0xF000
> > > > 
> > > > What does this have to do with NAND?
> > > 
> > > Nothing. I'm expanding VSC7385 comment to better separate it from
> > > the NAND code. Most lengthy parts of the RDB config are using
> > > 
> > > /*
> > >  *
> > >  */
> > > 
> > > as a logical separator. So did I.
> > 
> > that's fine, it just makes patch review easier and less susceptible to
> > comments like this if you keep your patches on-subject.
> 
> To be fair, the main reason for the comment was that I missed this line:
> -#define CFG_VSC7385_BASE 0xF000
> 
> way at the top of the diff, and thought the patch was introducing the
> #define rather than just reformatting the comment.

Nothing was introduced, but moved around. Anyway, I'll just drop it
on the next resend.

-- 
Anton Vorontsov
email: [EMAIL PROTECTED]
irc://irc.freenode.net/bd2

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Re: [U-Boot-Users] [PATCH 1/7] 83xx: nand support for MPC837XRDB boards

[Scott Wood]

On Wed, Mar 19, 2008 at 08:16:45PM -0500, Kim Phillips wrote:
> On Tue, 18 Mar 2008 17:10:55 +0300
> Anton Vorontsov <[EMAIL PROTECTED]> wrote:
> 
> > 
> > > > -/* VSC7385 Gigabit Switch support */
> > > > +/*
> > > > + * VSC7385 Gigabit Switch support
> > > > + */
> > > > +#define CFG_VSC7385_BASE   0xF000
> > > 
> > > What does this have to do with NAND?
> > 
> > Nothing. I'm expanding VSC7385 comment to better separate it from
> > the NAND code. Most lengthy parts of the RDB config are using
> > 
> > /*
> >  *
> >  */
> > 
> > as a logical separator. So did I.
> 
> that's fine, it just makes patch review easier and less susceptible to
> comments like this if you keep your patches on-subject.

To be fair, the main reason for the comment was that I missed this line:
-#define CFG_VSC7385_BASE   0xF000

way at the top of the diff, and thought the patch was introducing the
#define rather than just reformatting the comment.

-Scott

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Re: [U-Boot-Users] [PATCH] ppc4xx: Don't use last 256 bytes of SDRAM, workaround for 440EPx CHIP 11 errata

[Larry Johnson]

Stefan Roese wrote:
> Hi Wolfgang,
> 
> On Thursday 20 March 2008, Wolfgang Denk wrote:
>>> This patch adds this workaround for the following 440EPx boards:
>>> sequoia, lwmon5. Others should probably follow this example.
>> OK, the default configs for Sequoia doesn't use shared log buffer, and
>> the lwmon5 uses CONFIG_ALT_LB_ADDR (i. e. it puts the log buffer in
>> OCM), so these boards will work.
>>
>> But any changes to the configuration may easily break this again.
> 
> Understood.
> 
>> I don't like the idea that  each  affected  board  has  to  fix  this
>> (probably  differently)  in  it's board config file. I would prefer a
>> fix (common to all affected boards) in one central location.
> 
> I don't like this either. But I have not come up with a "generic" solution 
> till now. It's not so easy since the 440EPx SDRAM setup code is sometimes 
> common (cpu/ppc4xx/denali_spd_ddr2.c) and sometimes board specific. And it 
> gets even more complicated when ECC initialization is needed too. So 
> currently I have no "better" solution as to do it in a board specific way.
> 
> As always, patches implementing a "better" more generic solution are welcome.
> 
> Thanks.
> 
> Best regards,
> Stefan

Hi Stefan,

Having multiple implementations of the 440EXp SDRAM setup code is, in
itself, less than ideal.  One alternative is to have a 440EPX board with
on-board SDRAM chips fake an array of SPD bytes describing the chips,
and pass it to the "denali_spd_ddr2.c" code.  The SPD code then becomes
the single location for the technology of how to configure the Denali
SDRAM controller.

The additional benefit (for me, anyway :-) ) is having more eyeballs on
the SPD code, with more opportunities for testing, bug fixing, and
enhancements.

Best regards,
Larry


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Re: [U-Boot-Users] make env

[Wolfgang Denk]

In message <[EMAIL PROTECTED]> you wrote:
> SGVsbG8KCmNvdWxkIGFueWJvZHkgdGVsbCBtZSBob3cgdG8gY29tcGlsZSB0aGUgfGZ3X3NldGVu
> diBhbmQgfHxmd19zYXZlZW52IApiaW5hcmllcyA/CgpJIHRyeSB0byB1c2UKCm1ha2UgQVJDSD1h
> cm0gQ1JPU1NfQ09NUElMRT08UGF0aCB0byBteSBDcm9zc0NvbXBpbGVyPiBlbnYKCkJ1dCB0aGlz
> IGRvZXNuwrR0IHdvcmsuCgojZXJyb3IgVGhpcyBpcyBhIGtlcm5lbCBoZWFkZXIuIFBlcmhhcHMg
> aW5jbHVkZSBtdGQtdXNlci5oIGluc3RlYWQgPwphbmQgYSBsb3Qgb2YgZXJyb3IgbWVzc2FnZXMg
> YXBwYWVyID8KClRoYW5rIHlvdXwKCkJlc3QgcmVnYXJkcyAKCk1hbnVlbCBTYWhtCQoKCgoKLS0t
> LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t
> LS0tLS0tLS0tLS0tLQpUaGlzIFNGLm5ldCBlbWFpbCBpcyBzcG9uc29yZWQgYnk6IE1pY3Jvc29m
> dApEZWZ5IGFsbCBjaGFsbGVuZ2VzLiBNaWNyb3NvZnQoUikgVmlzdWFsIFN0dWRpbyAyMDA4Lgpo
> dHRwOi8vY2xrLmF0ZG10LmNvbS9NUlQvZ28vdnNlMDEyMDAwMDA3MG1ydC9kaXJlY3QvMDEvCl9f
> X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fClUtQm9vdC1Vc2Vy
> cyBtYWlsaW5nIGxpc3QKVS1Cb290LVVzZXJzQGxpc3RzLnNvdXJjZWZvcmdlLm5ldApodHRwczov
> L2xpc3RzLnNvdXJjZWZvcmdlLm5ldC9saXN0cy9saXN0aW5mby91LWJvb3QtdXNlcnMK

Please do not send base 64 encoded messages.

Please send plain text only.


> could anybody tell me how to compile the |fw_setenv and ||fw_saveenv 
> binaries ?

I guess (you fail to mention such a basic fact as which  version  you
are  using) that you are referring to old code. So I recommend to use
recent code (i. e. release 1.3.2).

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
"They that can give up essential liberty to obtain a little temporary
saftey deserve neither liberty not saftey." - Benjamin Franklin, 1759

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Re: [U-Boot-Users] include/autoconf.mk issue

[Wolfgang Denk]

In message <[EMAIL PROTECTED]> you wrote:
>
> Ah, as I understand that one, I think it gets solved in
> a slightly different manner.  The kernel introduces a "HAS"
> variant that indicates if the feature is enabled and
> then uses something like CONFIG_HAS_PREBOOT to indicate
> and test for its presence.  The actual _value_ remains
> the CONFIG_PREBOOT symbol.

Then we should do the same for autoconfig.mk, and use CONFIG_HAS_POST
in the POST Makefile?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
Q:  What's a light-year?
A:  One-third less calories than a regular year.

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[U-Boot-Users] make env

[Manuel Sahm]

Hello

could anybody tell me how to compile the |fw_setenv and ||fw_saveenv 
binaries ?

I try to use

make ARCH=arm CROSS_COMPILE= env

But this doesn´t work.

#error This is a kernel header. Perhaps include mtd-user.h instead ?
and a lot of error messages appaer ?

Thank you|

Best regards 

Manuel Sahm 




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Re: [U-Boot-Users] include/autoconf.mk issue

[Jon Loeliger]

On Thu, 2008-03-20 at 10:32, Wolfgang Denk wrote:

> Um... that would fix this specific situation - but we might still run
> into the same problem with the next attempt to convert  code  to  the
> new config style.

Yeah, we just need to pick 'em off one-by-one... :-)

> For example, there might be code which might be compiled depending on
> CONFIG_PREBOOT.

Ah, as I understand that one, I think it gets solved in
a slightly different manner.  The kernel introduces a "HAS"
variant that indicates if the feature is enabled and
then uses something like CONFIG_HAS_PREBOOT to indicate
and test for its presence.  The actual _value_ remains
the CONFIG_PREBOOT symbol.

jdl



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Re: [U-Boot-Users] include/autoconf.mk issue

[Wolfgang Denk]

In message <[EMAIL PROTECTED]> you wrote:
>
...
> > CONFIG_POST="(CFG_POST_CACHE | CFG_POST_CPU | CFG_POST_ECC_ON | 
> > CFG_POST_ETHER | CFG_POST_FPU | CFG_POST_I2C | CFG_POST_MEMORY | 
> > CFG_POST_RTC | CFG_POST_SPR | CFG_POST_UART | CFG_POST_SYSMON | 
> > CFG_POST_WATCHDOG | CFG_POST_DSP | CFG_POST_BSPEC1 | CFG_P
> OST_BSPEC2 | CFG_POST_BSPEC3 | CFG_POST_BSPEC4 | CFG_POST_BSPEC5)"
> > CONFIG_PREBOOT="setenv bootdelay 15"
...
> *sigh*
> 
> Needless to say, exactly the same change that I performed
> last year for CONFIG_COMMAND -> CONFIG_CMD_* and for
> CONFIG_BOOTP needs to be done here now for CONFIG_POST
> as well.

Um... that would fix this specific situation - but we might still run
into the same problem with the next attempt to convert  code  to  the
new config style.

For example, there might be code which might be compiled depending on
CONFIG_PREBOOT.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
Time is a drug. Too much of it kills you.
  - Terry Pratchett, _Small Gods_

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Re: [U-Boot-Users] include/autoconf.mk issue

[Jon Loeliger]

On Wed, 2008-03-19 at 18:29, Wolfgang Denk wrote:
> Dear Grant,
> 
> in http://news.gmane.org/gmane.comp.boot-loaders.u-boot
> Jean-Christophe asked to get rid of the "#ifdef CONFIG_POST" parts in
> the post code by using the "COBJS-$(CONFIG_POST) += " approach in the
> Makefile. We tried, and it didn't work.
> 
> The reason is that the Makefile assumes that  the  CONFIG_*  variable
> settings  in  include/autoconf.mk  have  a  value  of  "y", so we can
> collect objects to build in the "COBJS-y" make variable.
> 
> However, this is not always true. Here is what we see for example on
> the "lwmon5" board:
> 
> -> grep -v =y include/autoconf.mk
> CONFIG_SYS_CLK_FREQ=3330
> CONFIG_POST_WATCHDOG="{ "Watchdog timer test", "watchdog", "This test checks 
> the watchdog timer.", POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | 
> POST_REBOOT, &lwmon5_watchdog_post_test, NULL, NULL, CFG_POST_WATCHDOG }"
> CONFIG_BOOTDELAY=5
> CONFIG_ALT_LB_ADDR="(CFG_OCM_BASE)"
> CONFIG_BOOTCOMMAND="run flash_self"
> CONFIG_POST_KEY_MAGIC="3C+3E"
> CONFIG_PHY_RESET_DELAY=300
> CONFIG_POST_BSPEC1="{ "dsPIC init test", "dspic_init", "This test returns 
> result of dsPIC READY test run earlier.", POST_RAM | POST_ALWAYS, 
> &dspic_init_post_test, NULL, NULL, CFG_POST_BSPEC1 }"
> CONFIG_POST_BSPEC2="{ "dsPIC test", "dspic", "This test gets result of dsPIC 
> POST and dsPIC version.", POST_RAM | POST_ALWAYS, &dspic_post_test, NULL, 
> NULL, CFG_POST_BSPEC2 }"
> CONFIG_POST_BSPEC3="{ "FPGA test", "fpga", "This test checks FPGA registers 
> and memory.", POST_RAM | POST_ALWAYS, &fpga_post_test, NULL, NULL, 
> CFG_POST_BSPEC3 }"
> CONFIG_POST_BSPEC4="{ "GDC test", "gdc", "This test checks GDC registers and 
> memory.", POST_RAM | POST_ALWAYS, &gdc_post_test, NULL, NULL, CFG_POST_BSPEC4 
> }"
> CONFIG_POST_BSPEC5="{ "SYSMON1 test", "sysmon1", "This test checks 
> GPIO_62_EPX pin indicating power failure.", POST_RAM | POST_MANUAL | 
> POST_NORMAL | POST_SLOWTEST, &sysmon1_post_test, NULL, NULL, CFG_POST_BSPEC5 
> }"
> CONFIG_PHY_ADDR=3
> CONFIG_BAUDRATE=115200
> CONFIG_ALT_LH_ADDR="(CFG_PERIPHERAL_BASE + GPT0_COMP1)"
> CONFIG_POST="(CFG_POST_CACHE | CFG_POST_CPU | CFG_POST_ECC_ON | 
> CFG_POST_ETHER | CFG_POST_FPU | CFG_POST_I2C | CFG_POST_MEMORY | CFG_POST_RTC 
> | CFG_POST_SPR | CFG_POST_UART | CFG_POST_SYSMON | CFG_POST_WATCHDOG | 
> CFG_POST_DSP | CFG_POST_BSPEC1 | CFG_POST_BSPEC2 | CFG_POST_BSPEC3 | 
> CFG_POST_BSPEC4 | CFG_POST_BSPEC5)"
> CONFIG_PREBOOT="setenv bootdelay 15"
> CONFIG_WD_PERIOD=4


*sigh*

Needless to say, exactly the same change that I performed
last year for CONFIG_COMMAND -> CONFIG_CMD_* and for
CONFIG_BOOTP needs to be done here now for CONFIG_POST
as well.

I am personally swamped right now and will not be able
to get to it directly, but some enterprising young
whipper-snapper might get there before I do... :-)

jdl



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Re: [U-Boot-Users] [PATCH] [ARM] [RESUBMIT] Move ARM supplied dev boards to new board/arm directory

[Jon Loeliger]

On Thu, 2008-03-20 at 03:57, Peter Pearse wrote:

> Here git -M has decided that a new file 
> 
> board/arm/arm.S 
> 
> is actually a modified old file
> 
> cpu/arm926ejs/versatile/reset.S

Eh, don't worry about that.  Git is just using
a heuristic to guess where that file might have
come from, as enabled by the -M flag.  There's
no problem if git gets it wrong, as the important
fact is that the _content_ of the files are still
intact and correct.  Identifying a copy or a move
is purely a secondary side effect for the purpose
of exposing smaller change-sets to the users here.

jdl



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Re: [U-Boot-Users] DaVinci DM644x timer problem (divided by 16)

[Dirk Behme]

Pieter Voorthuijsen wrote:
> Hello,
> 
> Some months ago, a patch was submitted ([ARM] fix timer overflow in
> DaVinci). The result was that in /cpu/arm926ejs/davinci/timer.c
> read_timer was divided by 16. 
> 
> http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commit;h=ea686f52e4
> 5b3df2938866d3f5a98bb2556dfe2b
> 
> Right now, when I have my bootdelay variable (on a DVEVM) set to 2, and
> countdown takes 32 seconds... Also iprobe got very very  very slow.
> Maybe more items are affected by this timer division.
> 
> Is anybody else seeing this? Clearly when the timer is used by several
> blocks, it cannot be easily divided by 16. I think we need something
> else to work with the wrap around of the timer...

Thanks for the report!

Any idea what might be better?

Thanks

Dirk

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Re: [U-Boot-Users] [PATCH] ppc4xx: Don't use last 256 bytes of SDRAM, workaround for 440EPx CHIP 11 errata

[Stefan Roese]

On Thursday 20 March 2008, Dave Littell wrote:
> This may not be the "better, more generic solution", but I just added a
> CONFIG_CHIP_11_ERRATA option and code in lib_ppc/board.c to trim off
> only 256 bytes before the optional log buffer is carved out.

OK. I'll submit a similar patch in a short while. Please give it a try and let 
me know if you see problems with it.

> There's a kernel patch for this errata that trims the memory length.  If
> that patch is applied, does the kernel still need to be made to
> understand the changed logbuffer location?

I don't think so. With my next patch it should not be necessary anymore. With 
one exception: Linux kernel ports that have fixed memory sizes or calculate 
the memory size from the SDRAM controller setup (as done in some arch/powerpc 
kernels with bootwrapper support).

Best regards,
Stefan

=
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
=

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[U-Boot-Users] The truth to gaining inches

[harris velazquez]

Have a larger, thicker and more muscular tool today.


http://www.umbaratas.com/
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Re: [U-Boot-Users] [PATCH 2/2] DM644x: This adds support for the Prodrive PMDRA board, based on a DM6441

[Jean-Christophe PLAGNIOL-VILLARD]

On 12:28 Thu 20 Mar , Pieter Voorthuijsen wrote:
> Hello,
> 
> This patch adds support for the new Prodrive PMDR-A board. It is based
> on the DaVinci DM6441 processor, has 256M DDR2, 8M NOR and 256M of NAND.
> (This requires the previous patch that removes board specific code from
> /cpu/arm926ejs/davinci)
> 

Hi,

Fist your patch is wrapped please resend it
us git-send-email as example

and there is some codystyle
> Best regards,
> Pieter
> 
> 
> + if ((*mdstat & 0x1f) == 0x03)
> + return; /* Already on and enabled */
> +
> + *mdctl |= 0x03;
> +
> + /* Special treatment for some modules as for sprue14 p.7.4.2 */
> + if ((id == DAVINCI_LPSC_VPSSSLV) ||
> + (id == DAVINCI_LPSC_EMAC) ||
> + (id == DAVINCI_LPSC_EMAC_WRAPPER) ||
> + (id == DAVINCI_LPSC_MDIO) ||
> + (id == DAVINCI_LPSC_USB) ||
> + (id == DAVINCI_LPSC_ATA) ||
> + (id == DAVINCI_LPSC_VLYNQ) ||
> + (id == DAVINCI_LPSC_UHPI) ||
> + (id == DAVINCI_LPSC_DDR_EMIF) ||
> + (id == DAVINCI_LPSC_AEMIF) ||
> + (id == DAVINCI_LPSC_MMC_SD) ||
> + (id == DAVINCI_LPSC_MEMSTICK) ||
> + (id == DAVINCI_LPSC_McBSP) ||
> + (id == DAVINCI_LPSC_GPIO)
> +)
> + *mdctl |= 0x200;
^^^
Whitespaces please remove
> +
> + REG(PSC_PTCMD) = 0x01;
> +
> + while (REG(PSC_PTSTAT) & 0x03) {;}
   ^^^
Why not
while (REG(PSC_PTSTAT) & 0x03) {}
or
while (REG(PSC_PTSTAT) & 0x03) ;

> +}
> +
> + /* Bringup UART0 and 2 out of reset */
> +//   REG(UART0_PWREMU_MGMT) = 0xe003; /* Why does TI use reserved
> bits or bit that MUST be set to 0? */
If no need remove it
> + REG(UART0_PWREMU_MGMT) = 0x6001;
> + REG(UART2_PWREMU_MGMT) = 0x6001;
> + 
   ^
Whitespaces please remove
> + /* Enable GIO3.3V cells used for EMAC */
> + REG(VDD3P3V_PWDN) = 0;
> +
> + /* Enable UART0 and 2 MUX lines */
> + REG(PINMUX1) |= 1; //(0)
> + REG(PINMUX1) |= 4; //(2)
No C++ comments
> +
> +int misc_init_r (void)
> +{
> + int clk = 0;
> +
> + clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) +
> 1);
> +
> + printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) /
> 2);
> + printf ("DDR Clock : %dMHz\n", (clk / 2));
> +
> + if (!eth_hw_init()) {
> + printf("ethernet init failed!\n");
> + } else {
> + printf("ETH PHY   : %s\n", phy.name);
> + }
please remove the bracket
> +
> +/* I2C Configuration */
> +#undef CONFIG_SKIP_LOWLEVEL_INIT
> +#undef CONFIG_SKIP_RELOCATE_UBOOT
> +#define DEF_BOOTM""
> +#define CFG_ENV_IS_IN_FLASH  1
> +#undef CFG_NO_FLASH
No need
> +#define CFG_FLASH_CFI_DRIVER
> +#define CFG_FLASH_CFI
> +#define CFG_MAX_FLASH_BANKS  1   /* max number of flash
> banks */
> +#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x4)
> +#define CFG_ENV_OFFSET   (CFG_ENV_ADDR)
> +#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes
> (20x faster) */
> +#define PHYS_FLASH_1 0x0200  /* CS2 Base address
> */
> +#define CFG_FLASH_BASE   PHYS_FLASH_1/* Flash Base for U-Boot
> */
> +#define PHYS_FLASH_SIZE  0x200   /* Flash size
> 32MB   */
  ^
Whitespaces please remove it
> +#define CFG_MAX_FLASH_SECT   (PHYS_FLASH_SIZE/CFG_FLASH_SECT_SZ)
> +#define CFG_ENV_SECT_SIZECFG_FLASH_SECT_SZ   /* Env sector
> Size */
> +#define CFG_FLASH_SECT_SZ0x2 /* 128KB sect size INTEL
> Flash */
> +#define CFG_FLASH_PROTECTION 1
> +/*==*/
> +/* U-Boot general configuration */
> +/*==*/
> +#undef   CONFIG_USE_IRQ  /* No IRQ/FIQ in U-Boot
 ^
Whitespaces please remove it
> */
> +#define CONFIG_MISC_INIT_R
> +#define CONFIG_BOOTFILE  "uImage"/* Boot file
> name */
> +#define CFG_PROMPT   "U-Boot > " /* Monitor Command
> Prompt */
> +#define CFG_CBSIZE   1024/* Console I/O Buffer
> Size  */
> +#define CFG_PBSIZE   (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
> /* Print buffer sz */

Check the othe too please before resend it.

Best Regards,
J.

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Re: [U-Boot-Users] [PATCH] ppc4xx: Don't use last 256 bytes of SDRAM, workaround for 440EPx CHIP 11 errata

[Stefan Roese]

On Thursday 20 March 2008, Wolfgang Denk wrote:
> At the cost of an #ifdef, this could be added to the memory
> reservation code in "lib_ppc/board.c", i. e. somewhere after
>
>  ...
>  427  * Reserve memory at end of RAM for (top down in that order):
>  428  *  - kernel log buffer
>  429  *  - protected RAM
>  430  *  - LCD framebuffer
>  431  *  - monitor code
>  432  *  - board info struct
>  433  */
>  434 len = (ulong)&_end - CFG_MONITOR_BASE;
>  435
>  436 addr = CFG_SDRAM_BASE + get_effective_memsize();

OK. I'll add it here with an additional #ifdef here. How about something like 
this:

len = (ulong)&_end - CFG_MONITOR_BASE;

+#ifdef CONFIG_MEM_TOP_HIDE
+   /*
+* Subtract specified amount of memory to hide so that it won't
+* get "touched" at all by U-Boot. By fixing up gd->ram_size
+* the Linux kernel should now get passed the now "corrected"
+* memory size and won't touch it either. This should work
+* for arch/ppc and arch/powerpc. Only Linux board ports in
+* arch/powerpc with bootwrapper support, that recalculate the
+* memory size from the SDRAM controller setup will have to
+* get fixed.
+*/
+   gd->ram_size -= CONFIG_MEM_TOP_HIDE;
+#endif

addr = CFG_SDRAM_BASE + get_effective_memsize();

Or even better this somewhere above:

#ifndef CONFIG_MEM_TOP_HIDE
#define CONFIG_MEM_TOP_HIDE 0
#endif

and we can drop the #ifdef completely.

> Of course you need to make sure that  the  linux  kernel  understands
> this changed behaviour / shifted addresses, too.

Right. By fixing up gd->ram_size in the new patch version above, this should 
get handled for arch/ppc and arch/powerpc kernel versions. So no need 
for 'mem=xxx' in the bootargs anymore. Or did I miss something here?

Thanks.

Best regards,
Stefan

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Re: [U-Boot-Users] very slow netconsole

[Stefano Babic]

Antonello Lombardinilo wrote:
> I just now:
>  - switched to Intel IXDPG425 board (to have a "standard" board reference);
>  - downloaded and compiled u-Boot 1.3.2 with NetConsole support; 
> 
> Even in this scenario the communication is slow ! 

Take a look at your ethernet driver (I think cpu/ixp/npe.c). The
eth_halt and eth_init functions are called before each transfer, even
for single character.

In npe_halt:

debug("%s\n", __FUNCTION__);

/* Delay to give time for recovery of mbufs */
for (i = 0; i < 100; i++) {
npe_poll(p_npe->eth_id);
udelay(100);
}

The delay seems strictly correlated to the slowness you report. Check
the npe_init function, too. If the ethernet is reinitialized after each
transfer, the result is a very slow connection.

Best regards,
Stefano Babic

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Re: [U-Boot-Users] Is it easy to config BR1/OR1 as SDRAM in u-boot?

[solaz]

You are right. I checked the TQM8260 and found several interesting things. 
Thank you very much.

solaz



wd wrote:
> 
> In message <[EMAIL PROTECTED]> you wrote:
>> 
>> How can I modify the u-boot source code for the mpc8260ads family to let
>> u-boot recognize BR1/OR1 as SDRAM? I don't know how many files will be
>> related to this change and how 'deep' I will go.
> 
> It is not at all clear that the mpc8260ads port is  a  good  starting
> point for your own design. Depending how closely your hadrware design
> was  copied from the mpc8260ads this may or may not be a good idea. I
> recommend to check again.
> 
>> or let the hardware engineer change SDRAM to CS2 (BR2/OR2) may be easier?
> 
> Changing  the  software  is  definitely  easier.  But  you  need   to
> understand  that  you  have  a  full port of U-Boot to a new board in
> front of you - this is *not* just mndifying a few of  the  mpc8260ads
> config settings here and there.
> 
> Best regards,
> 
> Wolfgang Denk
> 
> -- 
> DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
> "It ain't so much the things we don't know that get  us  in  trouble.
> It's  the  things  we know that ain't so." - Artemus Ward aka Charles
> Farrar Brown
> 
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> 

-- 
View this message in context: 
http://www.nabble.com/Is-it-easy-to-config-BR1-OR1-as-SDRAM-in-u-boot--tp16145448p16178346.html
Sent from the Uboot - Users mailing list archive at Nabble.com.


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Re: [U-Boot-Users] [PATCH] ppc4xx: Don't use last 256 bytes of SDRAM, workaround for 440EPx CHIP 11 errata

[Kumar Gala]

On Mar 20, 2008, at 6:16 AM, Wolfgang Denk wrote:
> In message <[EMAIL PROTECTED]> you wrote:
>>
>> I don't like this either. But I have not come up with a "generic"  
>> solution
>> till now. It's not so easy since the 440EPx SDRAM setup code is  
>> sometimes
>> common (cpu/ppc4xx/denali_spd_ddr2.c) and sometimes board specific.  
>> And it
>> gets even more complicated when ECC initialization is needed too. So
>> currently I have no "better" solution as to do it in a board  
>> specific way.
>>
>> As always, patches implementing a "better" more generic solution  
>> are welcome.
>
> At the cost of an #ifdef, this could be added to the memory
> reservation code in "lib_ppc/board.c", i. e. somewhere after
>
> ...
> 427  * Reserve memory at end of RAM for (top down in that  
> order):
> 428  *  - kernel log buffer
> 429  *  - protected RAM
> 430  *  - LCD framebuffer
> 431  *  - monitor code
> 432  *  - board info struct
> 433  */
> 434 len = (ulong)&_end - CFG_MONITOR_BASE;
> 435
> 436 addr = CFG_SDRAM_BASE + get_effective_memsize();
>
> Of course you need to make sure that  the  linux  kernel  understands
> this changed behaviour / shifted addresses, too.

I haven't looked at the exact details but with the new-image branch of  
u-boot-testing the introduction of using the lmb to keep track of  
memory regions used might make this a little easier.  It clearly will  
not help in determining when to do a lmb_reserve().

- k

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[U-Boot-Users] DaVinci DM644x timer problem (divided by 16)

[Pieter Voorthuijsen]

Hello,

Some months ago, a patch was submitted ([ARM] fix timer overflow in
DaVinci). The result was that in /cpu/arm926ejs/davinci/timer.c
read_timer was divided by 16. 

http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commit;h=ea686f52e4
5b3df2938866d3f5a98bb2556dfe2b

Right now, when I have my bootdelay variable (on a DVEVM) set to 2, and
countdown takes 32 seconds... Also iprobe got very very  very slow.
Maybe more items are affected by this timer division.

Is anybody else seeing this? Clearly when the timer is used by several
blocks, it cannot be easily divided by 16. I think we need something
else to work with the wrap around of the timer...

Best regards,
Pieter


Pieter Voorthuijsen
Prodrive B.V.
Science Park Eindhoven
P.O. box 28030
5602 JA Eindhoven
The Netherlands

Email [EMAIL PROTECTED]
Tel: +31-40-2676258
Fax: +31-40-2676201

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Re: [U-Boot-Users] [PATCH] lwmon5 dspic POST spezification

[Sascha Laue]

Ups.

Best regards

Sascha Laue

diff -u -r -N u-boot/post/board/lwmon5/sysmon.c 
u-boot-mod/post/board/lwmon5/sysmon.c
--- u-boot/post/board/lwmon5/sysmon.c   2008-03-19 15:33:26.0 +0100
+++ u-boot-mod/post/board/lwmon5/sysmon.c   2008-03-20 08:55:10.0 
+0100
@@ -34,9 +34,10 @@
  * The test passes when all the following voltages and temperatures
  * are within allowed ranges:
  *
- * Temperature-40 .. +85 C
- * +5V  +4.75 .. +5.25 V
- * +5V standby  +4.75 .. +5.25 V
+ * Temperature-40 .. +90 °C
+ * Tempreature_Display   -35 .. +85 °C
+ * +5V  +4.50 .. +5.50 V
+ * +5V standby  +3.50 .. +5.50 V
  *
  * LCD backlight is not enabled if temperature values are not within
  * allowed ranges (-30 .. + 80). The brightness of backlite can be
@@ -62,6 +63,21 @@
 
 #defineRELOC(x) if (x != NULL) x = (void *) ((ulong) (x) + 
gd->reloc_off)
 
+#define REG_TEMPERATURE   0x12BC
+#define REG_VOLTAGE_5V0x12CA
+#define REG_VOLTAGE_5V_STANDBY0x12C6
+
+#define TEMPERATURE_MIN (-40)  /* °C */
+#define TEMPERATURE_MAX (+90)  /* °C */
+#define TEMPERATURE_DISPLAY_MIN (-35)  /* °C */
+#define TEMPERATURE_DISPLAY_MAX (+85)  /* °C */  
+
+#define VOLTAGE_5V_MIN(+4500)  /* mV */
+#define VOLTAGE_5V_MAX(+5500)  /* mV */
+
+#define VOLTAGE_5V_STANDBY_MIN(+3500)  /* mV */
+#define VOLTAGE_5V_STANDBY_MAX(+5500)  /* mV */
+
 typedef struct sysmon_s sysmon_t;
 typedef struct sysmon_table_s sysmon_table_t;
 
@@ -110,16 +126,22 @@
 static sysmon_table_t sysmon_table[] =
 {
 {"Temperature", " C", &sysmon_dspic, NULL, sysmon_backlight_disable,
- 1, 1, -32768, 32767, 0x, 0x8000-40, 0x8000+85, 0,
-  0x8000-30, 0x8000+80, 0, 0x12BC},
+ 1, 1, -0x8000, 0x7FFF, 0x, 
+0x8000 + TEMPERATURE_MIN , 0x8000 + TEMPERATURE_MAX , 0,
+ 0x8000 + TEMPERATURE_DISPLAY_MIN, 0x8000 + TEMPERATURE_DISPLAY_MAX, 0, 
+REG_TEMPERATURE},
 
 {"+ 5 V", "V", &sysmon_dspic, NULL, NULL,
- 100, 1000, -0x8000, 0x7FFF, 0x, 0x8000+4750, 0x8000+5250, 0,
- 0x8000+4750, 0x8000+5250, 0, 0x12CA},
+ 100, 1000, -0x8000, 0x7FFF, 0x, 
+0x8000 + VOLTAGE_5V_MIN , 0x8000 + VOLTAGE_5V_MAX, 0,
+0x8000 + VOLTAGE_5V_MIN , 0x8000 + VOLTAGE_5V_MAX, 0, 
+REG_VOLTAGE_5V},
 
 {"+ 5 V standby", "V", &sysmon_dspic, NULL, NULL,
- 100, 1000, -0x8000, 0x7FFF, 0x, 0x8000+4750, 0x8000+5250, 0,
- 0x8000+4750, 0x8000+5250, 0, 0x12C6},
+ 100, 1000, -0x8000, 0x7FFF, 0x, 
+0x8000 + VOLTAGE_5V_STANDBY_MIN, 0x8000 + VOLTAGE_5V_STANDBY_MAX, 0,
+ 0x8000 + VOLTAGE_5V_STANDBY_MIN, 0x8000 + VOLTAGE_5V_STANDBY_MAX, 0, 
+REG_VOLTAGE_5V_STANDBY},
 };
 static int sysmon_table_size = sizeof(sysmon_table) / sizeof(sysmon_table[0]);
 

 Original-Nachricht 
> Datum: Thu, 20 Mar 2008 13:00:26 +0100
> Von: "Markus Klotzbücher" <[EMAIL PROTECTED]>
> An: "Sascha Laue" <[EMAIL PROTECTED]>
> CC: u-boot-users@lists.sourceforge.net
> Betreff: Re: [U-Boot-Users] [PATCH] lwmon5 dspic POST spezification

> Dear Sascha,
> 
> "Sascha Laue" <[EMAIL PROTECTED]> writes:
> 
> > we modified the specification for the lwmon5 board dspic POST. 
> > Additionally I have add defines for the temperature- and voltagevalues.
> >
> > Signed-of-by: Sascha Laue <[EMAIL PROTECTED]>
> > Signed-of-by: Marcel Brasch <[EMAIL PROTECTED]>
> >
> > @@ -34,9 +34,10 @@
> >   * The test passes when all the following voltages and temperatures
> >   * are within allowed ranges:
> 
> Ups. It seems you forgot to copy the patch header.
> 
> Best regards
> 
> Markus Klotzbuecher
> 
> --
> DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
> 
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Re: [U-Boot-Users] [PATCH] lwmon5 dspic POST spezification

[Markus Klotzbücher]

Dear Sascha,

"Sascha Laue" <[EMAIL PROTECTED]> writes:

> we modified the specification for the lwmon5 board dspic POST. 
> Additionally I have add defines for the temperature- and voltagevalues.
>
> Signed-of-by: Sascha Laue <[EMAIL PROTECTED]>
> Signed-of-by: Marcel Brasch <[EMAIL PROTECTED]>
>
> @@ -34,9 +34,10 @@
>   * The test passes when all the following voltages and temperatures
>   * are within allowed ranges:

Ups. It seems you forgot to copy the patch header.

Best regards

Markus Klotzbuecher

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Re: [U-Boot-Users] [PATCH] ppc4xx: Don't use last 256 bytes of SDRAM, workaround for 440EPx CHIP 11 errata

[Dave Littell]

Stefan Roese wrote:
> Hi Wolfgang,
> 
> On Thursday 20 March 2008, Wolfgang Denk wrote:
>>> This patch adds this workaround for the following 440EPx boards:
>>> sequoia, lwmon5. Others should probably follow this example.
>> OK, the default configs for Sequoia doesn't use shared log buffer, and
>> the lwmon5 uses CONFIG_ALT_LB_ADDR (i. e. it puts the log buffer in
>> OCM), so these boards will work.
>>
>> But any changes to the configuration may easily break this again.
> 
> Understood.
> 
>> I don't like the idea that  each  affected  board  has  to  fix  this
>> (probably  differently)  in  it's board config file. I would prefer a
>> fix (common to all affected boards) in one central location.
> 
> I don't like this either. But I have not come up with a "generic" solution 
> till now. It's not so easy since the 440EPx SDRAM setup code is sometimes 
> common (cpu/ppc4xx/denali_spd_ddr2.c) and sometimes board specific. And it 
> gets even more complicated when ECC initialization is needed too. So 
> currently I have no "better" solution as to do it in a board specific way.
> 
> As always, patches implementing a "better" more generic solution are welcome.
> 

Hi all,

This may not be the "better, more generic solution", but I just added a
CONFIG_CHIP_11_ERRATA option and code in lib_ppc/board.c to trim off
only 256 bytes before the optional log buffer is carved out.

There's a kernel patch for this errata that trims the memory length.  If
that patch is applied, does the kernel still need to be made to
understand the changed logbuffer location?


Thanks,
Dave



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[U-Boot-Users] [PATCH] lwmon5 dspic POST spezification

[Sascha Laue]

Hi all,

we modified the specification for the lwmon5 board dspic POST. 
Additionally I have add defines for the temperature- and voltagevalues.

Signed-of-by: Sascha Laue <[EMAIL PROTECTED]>
Signed-of-by: Marcel Brasch <[EMAIL PROTECTED]>

@@ -34,9 +34,10 @@
  * The test passes when all the following voltages and temperatures
  * are within allowed ranges:
  *
- * Temperature-40 .. +85 C
- * +5V  +4.75 .. +5.25 V
- * +5V standby  +4.75 .. +5.25 V
+ * Temperature-40 .. +90 °C
+ * Tempreature_Display   -35 .. +85 °C
+ * +5V  +4.50 .. +5.50 V
+ * +5V standby  +3.50 .. +5.50 V
  *
  * LCD backlight is not enabled if temperature values are not within
  * allowed ranges (-30 .. + 80). The brightness of backlite can be
@@ -62,6 +63,21 @@
 
 #defineRELOC(x) if (x != NULL) x = (void *) ((ulong) (x) + 
gd->reloc_off)
 
+#define REG_TEMPERATURE   0x12BC
+#define REG_VOLTAGE_5V0x12CA
+#define REG_VOLTAGE_5V_STANDBY0x12C6
+
+#define TEMPERATURE_MIN (-40)  /* °C */
+#define TEMPERATURE_MAX (+90)  /* °C */
+#define TEMPERATURE_DISPLAY_MIN (-35)  /* °C */
+#define TEMPERATURE_DISPLAY_MAX (+85)  /* °C */  
+
+#define VOLTAGE_5V_MIN(+4500)  /* mV */
+#define VOLTAGE_5V_MAX(+5500)  /* mV */
+
+#define VOLTAGE_5V_STANDBY_MIN(+3500)  /* mV */
+#define VOLTAGE_5V_STANDBY_MAX(+5500)  /* mV */
+
 typedef struct sysmon_s sysmon_t;
 typedef struct sysmon_table_s sysmon_table_t;
 
@@ -110,16 +126,22 @@
 static sysmon_table_t sysmon_table[] =
 {
 {"Temperature", " C", &sysmon_dspic, NULL, sysmon_backlight_disable,
- 1, 1, -32768, 32767, 0x, 0x8000-40, 0x8000+85, 0,
-  0x8000-30, 0x8000+80, 0, 0x12BC},
+ 1, 1, -0x8000, 0x7FFF, 0x, 
+0x8000 + TEMPERATURE_MIN , 0x8000 + TEMPERATURE_MAX , 0,
+ 0x8000 + TEMPERATURE_DISPLAY_MIN, 0x8000 + TEMPERATURE_DISPLAY_MAX, 0, 
+REG_TEMPERATURE},
 
 {"+ 5 V", "V", &sysmon_dspic, NULL, NULL,
- 100, 1000, -0x8000, 0x7FFF, 0x, 0x8000+4750, 0x8000+5250, 0,
- 0x8000+4750, 0x8000+5250, 0, 0x12CA},
+ 100, 1000, -0x8000, 0x7FFF, 0x, 
+0x8000 + VOLTAGE_5V_MIN , 0x8000 + VOLTAGE_5V_MAX, 0,
+0x8000 + VOLTAGE_5V_MIN , 0x8000 + VOLTAGE_5V_MAX, 0, 
+REG_VOLTAGE_5V},
 
 {"+ 5 V standby", "V", &sysmon_dspic, NULL, NULL,
- 100, 1000, -0x8000, 0x7FFF, 0x, 0x8000+4750, 0x8000+5250, 0,
- 0x8000+4750, 0x8000+5250, 0, 0x12C6},
+ 100, 1000, -0x8000, 0x7FFF, 0x, 
+0x8000 + VOLTAGE_5V_STANDBY_MIN, 0x8000 + VOLTAGE_5V_STANDBY_MAX, 0,
+ 0x8000 + VOLTAGE_5V_STANDBY_MIN, 0x8000 + VOLTAGE_5V_STANDBY_MAX, 0, 
+REG_VOLTAGE_5V_STANDBY},
 };
 static int sysmon_table_size = sizeof(sysmon_table) / sizeof(sysmon_table[0]);

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Re: [U-Boot-Users] very slow netconsole

[Antonello Lombardinilo]

I just now:
 - switched to Intel IXDPG425 board (to have a "standard" board reference);
 - downloaded and compiled u-Boot 1.3.2 with NetConsole support; 

Even in this scenario the communication is slow ! 

Best Regards,
Antonello Lombardinilo 

Wolfgang Denk writes: 

> In message <[EMAIL PROTECTED]> you wrote:
>> I have u-boot 1.1.6 running on my board based on IXP425
>> processor (266MhZ). 
> ...
>> Any suggestion ?
> 
> Try current code? 1.3.2? 
> 
> Best regards, 
> 
> Wolfgang Denk 
> 
> -- 
> DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
> Tactical? TACTICAL!?!? Hey, buddy, we went from kilotons to  megatons
> several  minutes  ago.  We don't need no stinkin' tactical nukes. (By
> the way, do you have change for 10 million people?)   - lwall


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Re: [U-Boot-Users] [PATCH 2/2] DM644x: This adds support for the Prodrive PMDRA board, based on a DM6441

[Peter Pearse]

Considering for u-boot-arm, unless another ARM custodian wants it?

Regards

Peter

> -Original Message-
> From: Pieter Voorthuijsen [mailto:[EMAIL PROTECTED] 
> Sent: 20 March 2008 11:29
> To: u-boot-users@lists.sourceforge.net
> Cc: Peter Pearse
> Subject: [PATCH 2/2] DM644x: This adds support for the 
> Prodrive PMDRA board, based on a DM6441
> 
> Hello,
> 
> This patch adds support for the new Prodrive PMDR-A board. It 
> is based on the DaVinci DM6441 processor, has 256M DDR2, 8M 
> NOR and 256M of NAND.
> (This requires the previous patch that removes board specific 
> code from
> /cpu/arm926ejs/davinci)
> 
> Best regards,
> Pieter
> 
> 
> Signed-off-by: Pieter Voorthuijsen <[EMAIL PROTECTED]>
> ---
>  Makefile  |3 +
>  board/prodrive/pmdra/Makefile |   52 ++
>  board/prodrive/pmdra/board_init.S |   34 +++
>  board/prodrive/pmdra/config.mk|   39 
>  board/prodrive/pmdra/pmdra.c  |  192
> +
>  board/prodrive/pmdra/u-boot.lds   |   52 ++
>  include/configs/pmdra.h   |  184
> +++
>  7 files changed, 556 insertions(+), 0 deletions(-)  create 
> mode 100644 board/prodrive/pmdra/Makefile  create mode 100644 
> board/prodrive/pmdra/board_init.S  create mode 100644 
> board/prodrive/pmdra/config.mk  create mode 100644 
> board/prodrive/pmdra/pmdra.c  create mode 100644 
> board/prodrive/pmdra/u-boot.lds  create mode 100644 
> include/configs/pmdra.h
> 
> diff --git a/Makefile b/Makefile
> index 4fde699..77f3d24 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -2375,6 +2375,9 @@ davinci_schmoogie_config :  unconfig
>  davinci_sonata_config :  unconfig
>   @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
>  
> +pmdra_config :   unconfig
> + @$(MKCONFIG) $(@:_config=) arm arm926ejs pmdra prodrive davinci
> +
>  omap1610inn_config \
>  omap1610inn_cs0boot_config \
>  omap1610inn_cs3boot_config \
> diff --git a/board/prodrive/pmdra/Makefile 
> b/board/prodrive/pmdra/Makefile new file mode 100644 index 
> 000..918c7b0
> --- /dev/null
> +++ b/board/prodrive/pmdra/Makefile
> @@ -0,0 +1,52 @@
> +#
> +# (C) Copyright 2000, 2001, 2002
> +# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
> +#
> +# Copyright (C) 2007 Sergey Kubushyn <[EMAIL PROTECTED]> # # See file 
> +CREDITS for list of people who contributed to this # project.
> +#
> +# This program is free software; you can redistribute it and/or # 
> +modify it under the terms of the GNU General Public License as # 
> +published by the Free Software Foundation; either version 2 of # the 
> +License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be 
> useful, # but 
> +WITHOUT ANY WARRANTY; without even the implied warranty of # 
> +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the # GNU 
> +General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public 
> License # 
> +along with this program; if not, write to the Free Software # 
> +Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 
> 02111-1307 
> +USA #
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB  = $(obj)lib$(BOARD).a
> +
> +COBJS:= pmdra.o
> +SOBJS:= board_init.o
> +
> +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS))
> +SOBJS:= $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB):  $(obj).depend $(OBJS) $(SOBJS)
> + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
> +
> +clean:
> + rm -f $(SOBJS) $(OBJS)
> +
> +distclean:   clean
> + rm -f $(LIB) core *.bak *~ .depend
> +
> +#
> ##
> ##
> +# This is for $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#
> ##
> ##
> diff --git a/board/prodrive/pmdra/board_init.S
> b/board/prodrive/pmdra/board_init.S
> new file mode 100644
> index 000..6cc2e86
> --- /dev/null
> +++ b/board/prodrive/pmdra/board_init.S
> @@ -0,0 +1,34 @@
> +/*
> + * Copyright (C) 2008 Prodrive B.V.
> + *
> + * Board-specific low level initialization code. Called at 
> the very end
> + * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is
> no
> + * initialization required.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy o

[U-Boot-Users] [PATCH 2/2] DM644x: This adds support for the Prodrive PMDRA board, based on a DM6441

[Pieter Voorthuijsen]

Hello,

This patch adds support for the new Prodrive PMDR-A board. It is based
on the DaVinci DM6441 processor, has 256M DDR2, 8M NOR and 256M of NAND.
(This requires the previous patch that removes board specific code from
/cpu/arm926ejs/davinci)

Best regards,
Pieter


Signed-off-by: Pieter Voorthuijsen <[EMAIL PROTECTED]>
---
 Makefile  |3 +
 board/prodrive/pmdra/Makefile |   52 ++
 board/prodrive/pmdra/board_init.S |   34 +++
 board/prodrive/pmdra/config.mk|   39 
 board/prodrive/pmdra/pmdra.c  |  192
+
 board/prodrive/pmdra/u-boot.lds   |   52 ++
 include/configs/pmdra.h   |  184
+++
 7 files changed, 556 insertions(+), 0 deletions(-)
 create mode 100644 board/prodrive/pmdra/Makefile
 create mode 100644 board/prodrive/pmdra/board_init.S
 create mode 100644 board/prodrive/pmdra/config.mk
 create mode 100644 board/prodrive/pmdra/pmdra.c
 create mode 100644 board/prodrive/pmdra/u-boot.lds
 create mode 100644 include/configs/pmdra.h

diff --git a/Makefile b/Makefile
index 4fde699..77f3d24 100644
--- a/Makefile
+++ b/Makefile
@@ -2375,6 +2375,9 @@ davinci_schmoogie_config :unconfig
 davinci_sonata_config :unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
 
+pmdra_config   :   unconfig
+   @$(MKCONFIG) $(@:_config=) arm arm926ejs pmdra prodrive davinci
+
 omap1610inn_config \
 omap1610inn_cs0boot_config \
 omap1610inn_cs3boot_config \
diff --git a/board/prodrive/pmdra/Makefile
b/board/prodrive/pmdra/Makefile
new file mode 100644
index 000..918c7b0
--- /dev/null
+++ b/board/prodrive/pmdra/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# Copyright (C) 2007 Sergey Kubushyn <[EMAIL PROTECTED]>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS  := pmdra.o
+SOBJS  := board_init.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak *~ .depend
+
+###
##
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+###
##
diff --git a/board/prodrive/pmdra/board_init.S
b/board/prodrive/pmdra/board_init.S
new file mode 100644
index 000..6cc2e86
--- /dev/null
+++ b/board/prodrive/pmdra/board_init.S
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2008 Prodrive B.V.
+ *
+ * Board-specific low level initialization code. Called at the very end
+ * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is
no
+ * initialization required.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* This code sets up the timing params for EMIF CE2 and CE3 which
+ * connect to NOR and NAND flash 
+ */
+ 
+#include 
+
+.globl dv_board_init
+dv_board_init:
+
+   mov pc, lr
+
diff --git a/board/prodrive/pmdra/config.mk
b/board/prodrive/pmdra/config.mk
new file mode 100644
index 000..aa89d0e
--- /dev/null
+++ b/board/prodrive/pmdra/config.mk
@@ -0,0 +1,39 @@
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, <[EMAIL PROTE

[U-Boot-Users] [PATCH] DM644x: This patch removes all board specific code from the arch. part for DM644x (DaVinci) boards

[Pieter Voorthuijsen]

Hello,

In the current implementation of the DM644x (DaVinci) achitecture there
is a lot of code in the /cpu/arm926ejs/davinci folder that is meant to
be board specific. I'm talking about EMIF timing/width configuration for
NAND and NOR but also DRAM timing settings which are of course different
for boards. This patch makes the board config files configure the
architecture files (lowlevel_init.S and nand.c) with defines.

Also there is a small addition to add support for the DVEVM, the only
difference is an Intel NOR instead of an AMD, so blocksizes are
different.

This is tested with the Davinci EVM (Old and new one), the other boards
(Sonata and Schmoogie) are building with these patches.

Best regards,
Pieter Voorthuijsen



Signed-off-by: Pieter Voorthuijsen <[EMAIL PROTECTED]>
---
 cpu/arm926ejs/davinci/lowlevel_init.S   |   79
---
 cpu/arm926ejs/davinci/nand.c|   41 ++--
 include/asm-arm/arch-davinci/hardware.h |2 +
 include/configs/davinci_dvevm.h |   33 -
 include/configs/davinci_schmoogie.h |   19 +++-
 include/configs/davinci_sonata.h|   18 +++
 6 files changed, 124 insertions(+), 68 deletions(-)

diff --git a/cpu/arm926ejs/davinci/lowlevel_init.S
b/cpu/arm926ejs/davinci/lowlevel_init.S
index a87c112..0e94981 100644
--- a/cpu/arm926ejs/davinci/lowlevel_init.S
+++ b/cpu/arm926ejs/davinci/lowlevel_init.S
@@ -3,6 +3,11 @@
  *
  * Copyright (C) 2007 Sergey Kubushyn <[EMAIL PROTECTED]>
  *
+ * Copyright (C) 2008 Prodrive BV <[EMAIL PROTECTED]>
+ * Changed:
+ * Made board specific defines such as DDR timing and PLL 
+ * dividers. These should be set in the board config file.
+ *
  * Partially based on TI sources, original copyrights follow:
  */
 
@@ -156,17 +161,17 @@ WaitPPL2Loop:
 
/* Program the PLL Multiplier */
ldr r6, PLL2_PLLM
-   mov r2, $0x17   /* 162 MHz */
+   mov r2, $CFG_DAVINCI_PLL2_PLLM
str r2, [r6]
 
/* Program the PLL2 Divisor Value */
ldr r6, PLL2_DIV2
-   mov r3, $0x01
+   mov r3, $CFG_DAVINCI_PLL2_DIV2
str r3, [r6]
 
/* Program the PLL2 Divisor Value */
ldr r6, PLL2_DIV1
-   mov r4, $0x0b   /* 54 MHz */
+   mov r4, $CFG_DAVINCI_PLL2_DIV1
str r4, [r6]
 
/* PLL2 DIV2 MMR */
@@ -273,7 +278,7 @@ checkDDRStatClkStop:
bne checkDDRStatClkStop
 
/*--*
-* Program DDR2 MMRs for 162MHz Setting *
+* Program DDR2 MMRs*
 *--*/
 
/* Program PHY Control Register */
@@ -288,12 +293,12 @@ checkDDRStatClkStop:
 
/* Program SDRAM TIM-0 Config Register */
ldr r6, SDTIM0
-   ldr r7, SDTIM0_VAL_162MHz
+   ldr r7, SDTIM0_VAL
str r7, [r6]
 
/* Program SDRAM TIM-1 Config Register */
ldr r6, SDTIM1
-   ldr r7, SDTIM1_VAL_162MHz
+   ldr r7, SDTIM1_VAL
str r7, [r6]
 
/* Program the SDRAM Bank Config Control Register */
@@ -435,7 +440,7 @@ WaitLoop:
 
/* Program the PLL Multiplier */
ldr r6, PLL1_PLLM
-   mov r3, $0x15   /* For 594MHz */
+   mov r3, $CFG_DAVINCI_PLL1_PLLM
str r3, [r6]
 
/* Wait for PLL to Reset Properly */
@@ -467,7 +472,7 @@ PLL1Lock:
nop
 
/*--*
-* AEMIF configuration for NOR Flash (double check) *
+* AEMIF configuration for NAND/NOR Flash   *
 *--*/
ldr r0, _PINMUX0
ldr r1, _DEV_SETTING
@@ -479,6 +484,12 @@ PLL1Lock:
orr r2, r2, r1
str r2, [r0]
 
+   ldr r0, ACFG2
+   ldr r1, ACFG2_VAL
+   ldr r2, [r0]
+   and r1, r2, r1
+   str r1, [r0]
+
ldr r0, ACFG3
ldr r1, ACFG3_VAL
ldr r2, [r0]
@@ -497,6 +508,12 @@ PLL1Lock:
and r1, r2, r1
str r1, [r0]
 
+   ldr r0, NANDFCR
+   ldr r1, NANDFCR_VAL
+   ldr r2, [r0]
+   and r1, r2, r1
+   str r1, [r0]
+
/*--*
 * VTP manual Calibration   *
 *--*/
@@ -560,24 +577,36 @@ _PINMUX1:
.word   0x01c40004  /* Device Configuration
Registers */
 
 _DEV_SETTING:
-   .word   0x0c1f
+   .word   CFG_DAVINCI_PINMUX_0
 
 WAITCFG:
.word   0x01e4
 WAITCFG_VAL:
-   .word   0
+   .word   CFG_DAVINCI_WAITCFG
+ACFG2:
+   .word   0x01e00010
+ACFG2_VAL:
+   .word   CFG_DAVINCI_ACFG2
 ACFG3:
.word   0x01e00014
 ACFG3_VAL:
-   .word   0x3ffd
+ 

Re: [U-Boot-Users] very slow netconsole

[Wolfgang Denk]

In message <[EMAIL PROTECTED]> you wrote:
> I have u-boot 1.1.6 running on my board based on IXP425
> processor (266MhZ). 
...
> Any suggestion ?

Try current code? 1.3.2?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
Tactical? TACTICAL!?!? Hey, buddy, we went from kilotons to  megatons
several  minutes  ago.  We don't need no stinkin' tactical nukes. (By
the way, do you have change for 10 million people?)   - lwall

-
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Re: [U-Boot-Users] [PATCH] ppc4xx: Don't use last 256 bytes of SDRAM, workaround for 440EPx CHIP 11 errata

[Wolfgang Denk]

In message <[EMAIL PROTECTED]> you wrote:
> 
> I don't like this either. But I have not come up with a "generic" solution 
> till now. It's not so easy since the 440EPx SDRAM setup code is sometimes 
> common (cpu/ppc4xx/denali_spd_ddr2.c) and sometimes board specific. And it 
> gets even more complicated when ECC initialization is needed too. So 
> currently I have no "better" solution as to do it in a board specific way.
> 
> As always, patches implementing a "better" more generic solution are welcome.

At the cost of an #ifdef, this could be added to the memory
reservation code in "lib_ppc/board.c", i. e. somewhere after

 ...
 427  * Reserve memory at end of RAM for (top down in that order):
 428  *  - kernel log buffer
 429  *  - protected RAM
 430  *  - LCD framebuffer
 431  *  - monitor code
 432  *  - board info struct
 433  */
 434 len = (ulong)&_end - CFG_MONITOR_BASE;
 435
 436 addr = CFG_SDRAM_BASE + get_effective_memsize();

Of course you need to make sure that  the  linux  kernel  understands
this changed behaviour / shifted addresses, too.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
Minds are like parachutes - they only function when open.

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[U-Boot-Users] [PATCH v2 9/9] mpc83xx: enable the SATA interface on mpc837xemds board

[Dave Liu]

Enable the first two SATA interfaces on MPC837xEMDS board,
The two SATA ports are on LYNX1. (SATA0/1 on J4/5)

Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 include/configs/MPC837XEMDS.h |   23 +++
 1 files changed, 23 insertions(+), 0 deletions(-)

diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 2ac3d37..f17a2d8 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -338,6 +338,29 @@
 #define CONFIG_FSL_SERDES1_VDD_1V  1
 
 /*
+ * SATA
+ */
+#define CONFIG_LIBATA
+#define CONFIG_FSL_SATA
+
+#define CFG_SATA_MAX_DEVICE2
+#define CONFIG_SATA1
+#define CFG_SATA1_OFFSET   0x18000
+#define CFG_SATA1  (CFG_IMMR + CFG_SATA1_OFFSET)
+#define CFG_SATA1_FLAGSFLAGS_DMA
+#define CONFIG_SATA2
+#define CFG_SATA2_OFFSET   0x19000
+#define CFG_SATA2  (CFG_IMMR + CFG_SATA2_OFFSET)
+#define CFG_SATA2_FLAGSFLAGS_DMA
+
+#ifdef CONFIG_FSL_SATA
+#define CONFIG_LBA48
+#define CONFIG_CMD_SATA
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_EXT2
+#endif
+
+/*
  * General PCI
  * Addresses are mapped 1-1.
  */
-- 
1.5.4.rc4




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[U-Boot-Users] [PATCH v2 8/9] drivers: Add the support for Freescale SATA controller

[Dave Liu]

Add the Freescale on-chip SATA controller driver to u-boot,
The SATA controller is used on the 837x and 8315 targets,
The driver can be used to load kernel, fs and dtb.

The features list:
- 1.5/3 Gbps link speed
- LBA48, LBA28 support
- DMA and FPDMA support
- Two ports support

Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 drivers/block/Makefile   |1 +
 drivers/block/fsl_sata.c |  921 ++
 drivers/block/fsl_sata.h |  374 +++
 3 files changed, 1296 insertions(+), 0 deletions(-)
 create mode 100644 drivers/block/fsl_sata.c
 create mode 100644 drivers/block/fsl_sata.h

diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index d63ca2d..dca3547 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -27,6 +27,7 @@ LIB   := $(obj)libblock.a
 
 COBJS-y += ahci.o
 COBJS-y += ata_piix.o
+COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o
 COBJS-$(CONFIG_LIBATA) += libata.o
 COBJS-y += sil680.o
 COBJS-y += sym53c8xx.o
diff --git a/drivers/block/fsl_sata.c b/drivers/block/fsl_sata.c
new file mode 100644
index 000..df00446
--- /dev/null
+++ b/drivers/block/fsl_sata.c
@@ -0,0 +1,921 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc.
+ * Dave Liu <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "fsl_sata.h"
+
+extern block_dev_desc_t sata_dev_desc[CFG_SATA_MAX_DEVICE];
+
+#ifndef CFG_SATA1_FLAGS
+   #define CFG_SATA1_FLAGS FLAGS_DMA
+#endif
+#ifndef CFG_SATA2_FLAGS
+   #define CFG_SATA2_FLAGS FLAGS_DMA
+#endif
+
+static struct fsl_sata_info fsl_sata_info[] = {
+#ifdef CONFIG_SATA1
+   {CFG_SATA1, CFG_SATA1_FLAGS},
+#else
+   {0, 0},
+#endif
+#ifdef CONFIG_SATA2
+   {CFG_SATA2, CFG_SATA2_FLAGS},
+#else
+   {0, 0},
+#endif
+};
+
+static inline void mdelay(unsigned long msec)
+{
+   unsigned long i;
+   for (i = 0; i < msec; i++)
+   udelay(1000);
+}
+
+static inline void sdelay(unsigned long sec)
+{
+   unsigned long i;
+   for (i = 0; i < sec; i++)
+   mdelay(1000);
+}
+
+void dprint_buffer(unsigned char *buf, int len)
+{
+   int i, j;
+
+   i = 0;
+   j = 0;
+   printf("\n\r");
+
+   for (i = 0; i < len; i++) {
+   printf("%02x ", *buf++);
+   j++;
+   if (j == 16) {
+   printf("\n\r");
+   j = 0;
+   }
+   }
+   printf("\n\r");
+}
+
+static void fsl_sata_dump_sfis(struct sfis *s)
+{
+   printf("Status FIS dump:\n\r");
+   printf("fis_type:   %02x\n\r", s->fis_type);
+   printf("pm_port_i:  %02x\n\r", s->pm_port_i);
+   printf("status: %02x\n\r", s->status);
+   printf("error:  %02x\n\r", s->error);
+   printf("lba_low:%02x\n\r", s->lba_low);
+   printf("lba_mid:%02x\n\r", s->lba_mid);
+   printf("lba_high:   %02x\n\r", s->lba_high);
+   printf("device: %02x\n\r", s->device);
+   printf("lba_low_exp:%02x\n\r", s->lba_low_exp);
+   printf("lba_mid_exp:%02x\n\r", s->lba_mid_exp);
+   printf("lba_high_exp:   %02x\n\r", s->lba_high_exp);
+   printf("res1:   %02x\n\r", s->res1);
+   printf("sector_count:   %02x\n\r", s->sector_count);
+   printf("sector_count_exp:   %02x\n\r", s->sector_count_exp);
+}
+
+static int ata_wait_register(volatile unsigned *addr, u32 mask,
+u32 val, u32 timeout_msec)
+{
+   int i;
+   u32 temp;
+
+   for (i = 0; (((temp = in_le32(addr)) & mask) != val)
+&& i < timeout_msec; i++)
+   mdelay(1);
+   return (i < timeout_msec) ? 0 : -1;
+}
+
+static int fsl_sata_init(int dev)
+{
+   u32 length, align;
+   cmd_hdr_tbl_t *cmd_hdr;
+   u32 cda;
+   u32 val32;
+   fsl_sata_reg_t *reg;
+   u32 sig;
+   int i;
+   fsl_sata_t *sata;
+
+   if (dev < 0 || dev > (CFG_SATA_MAX_DEVICE - 1)) {
+   printf("the sata index %d is out of ranges\n\r", dev);
+   return -1;
+   }
+
+   /* Allocate SATA 

[U-Boot-Users] very slow netconsole

[Antonello Lombardinilo]

I have u-boot 1.1.6 running on my board based on IXP425
processor (266MhZ). 

I trying to use netconsole.
I readed doc/README.NetConsole and make connection with u-boot.
On u-boot I do:
   setenv nc 'setenv stdout nc;setenv stdin nc'
   setenv ncip 192.168.1.5:1234
   saveenv
   run nc
On host PC (192.168.1.5) I run following script:
   nc -u -l 1234 < /dev/null &
   nc -u 192.168.1.88 1234 

Note that in first host command I omitted "-p" flag before port definition.
The problem is the communication in vary slow: one character per second! 

Any suggestion ?

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Re: [U-Boot-Users] [PATCH] ppc4xx: Don't use last 256 bytes of SDRAM, workaround for 440EPx CHIP 11 errata

[Stefan Roese]

Hi Wolfgang,

On Thursday 20 March 2008, Wolfgang Denk wrote:
> > This patch adds this workaround for the following 440EPx boards:
> > sequoia, lwmon5. Others should probably follow this example.
>
> OK, the default configs for Sequoia doesn't use shared log buffer, and
> the lwmon5 uses CONFIG_ALT_LB_ADDR (i. e. it puts the log buffer in
> OCM), so these boards will work.
>
> But any changes to the configuration may easily break this again.

Understood.

> I don't like the idea that  each  affected  board  has  to  fix  this
> (probably  differently)  in  it's board config file. I would prefer a
> fix (common to all affected boards) in one central location.

I don't like this either. But I have not come up with a "generic" solution 
till now. It's not so easy since the 440EPx SDRAM setup code is sometimes 
common (cpu/ppc4xx/denali_spd_ddr2.c) and sometimes board specific. And it 
gets even more complicated when ECC initialization is needed too. So 
currently I have no "better" solution as to do it in a board specific way.

As always, patches implementing a "better" more generic solution are welcome.

Thanks.

Best regards,
Stefan

=
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
=

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[U-Boot-Users] [PATCH v2 7/9] mpc83xx: enable serdes1 for 837x SATA

[Dave Liu]

enable serdes1(LYNX1) for 837x SATA interface

Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 board/freescale/mpc837xemds/mpc837xemds.c |3 +++
 include/configs/MPC837XEMDS.h |9 +
 2 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mpc837xemds/mpc837xemds.c 
b/board/freescale/mpc837xemds/mpc837xemds.c
index e57a53f..3d32c9c 100644
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #if defined(CONFIG_OF_LIBFDT)
 #include 
 #endif
@@ -29,6 +30,8 @@ int board_early_init_f(void)
/* Clear all of the interrupt of BCSR */
bcsr[0xe] = 0xff;
 
+   fsl_setup_serdes();
+
return 0;
 }
 
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 5586533..2ac3d37 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -329,6 +329,15 @@
 #define CFG_I2C_RTC_ADDR   0x68 /* at address 0x68 */
 
 /*
+ * SERDES
+ */
+#define CONFIG_FSL_SERDES
+#define CONFIG_FSL_SERDES1 (CFG_IMMR + 0xE3000)
+#define CONFIG_FSL_SERDES1_PROTO   FSL_SERDES_PROTO_SATA
+#define CONFIG_FSL_SERDES1_CLK FSL_SERDES_CLK_100
+#define CONFIG_FSL_SERDES1_VDD_1V  1
+
+/*
  * General PCI
  * Addresses are mapped 1-1.
  */
-- 
1.5.4.rc4




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[U-Boot-Users] [PATCH v2 6/9] mpc83xx: serdes setup routines

[Dave Liu]

From: Anton Vorontsov <[EMAIL PROTECTED]>

This patch adds few routines to configure serdes on 837x targets.

Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
---
 cpu/mpc83xx/Makefile |2 +-
 cpu/mpc83xx/serdes.c |  156 ++
 include/asm-ppc/fsl_serdes.h |   25 +++
 3 files changed, 182 insertions(+), 1 deletions(-)
 create mode 100644 cpu/mpc83xx/serdes.c
 create mode 100644 include/asm-ppc/fsl_serdes.h

diff --git a/cpu/mpc83xx/Makefile b/cpu/mpc83xx/Makefile
index 94a3cb8..5df30db 100644
--- a/cpu/mpc83xx/Makefile
+++ b/cpu/mpc83xx/Makefile
@@ -29,7 +29,7 @@ LIB   = $(obj)lib$(CPU).a
 
 START  = start.o
 COBJS  = traps.o cpu.o cpu_init.o speed.o interrupts.o \
- spd_sdram.o ecc.o qe_io.o pci.o fdt.o
+ spd_sdram.o ecc.o qe_io.o pci.o serdes.o fdt.o
 
 SRCS   := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/mpc83xx/serdes.c b/cpu/mpc83xx/serdes.c
new file mode 100644
index 000..01b3abe
--- /dev/null
+++ b/cpu/mpc83xx/serdes.c
@@ -0,0 +1,156 @@
+/*
+ * Freescale SerDes initialization routine
+ *
+ * Copyright (C) 2007 Freescale Semicondutor, Inc. All rights reserved.
+ * Copyright (C) 2008 MontaVista Software, Inc. All rights reserved.
+ *
+ * Author: Li Yang <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/* SerDes registers */
+#define FSL_SRDSCR0_OFFS   0x0
+#define FSL_SRDSCR0_DPP_1V20x8800
+#define FSL_SRDSCR1_OFFS   0x4
+#define FSL_SRDSCR1_PLLBW  0x0040
+#define FSL_SRDSCR2_OFFS   0x8
+#define FSL_SRDSCR2_VDD_1V20x0080
+#define FSL_SRDSCR2_SEIC_MASK  0x1c1c
+#define FSL_SRDSCR2_SEIC_SATA  0x1414
+#define FSL_SRDSCR2_SEIC_PEX   0x1010
+#define FSL_SRDSCR2_SEIC_SGMII 0x0101
+#define FSL_SRDSCR3_OFFS   0xc
+#define FSL_SRDSCR3_KFR_SATA   0x1010
+#define FSL_SRDSCR3_KPH_SATA   0x0404
+#define FSL_SRDSCR3_SDFM_SATA_PEX  0x0101
+#define FSL_SRDSCR3_SDTXL_SATA 0x0505
+#define FSL_SRDSCR4_OFFS   0x10
+#define FSL_SRDSCR4_PROT_SATA  0x0808
+#define FSL_SRDSCR4_PROT_PEX   0x0101
+#define FSL_SRDSCR4_PROT_SGMII 0x0505
+#define FSL_SRDSCR4_PLANE_X2   0x0100
+#define FSL_SRDSRSTCTL_OFFS0x20
+#define FSL_SRDSRSTCTL_RST 0x8000
+#define FSL_SRDSRSTCTL_SATA_RESET  0xf
+
+static void setup_serdes(void *regs, char proto, char rfcks, char vdd)
+{
+   u32 tmp;
+
+   /* 1.0V corevdd */
+   if (vdd) {
+   /* DPPE/DPPA = 0 */
+   tmp = in_be32(regs + FSL_SRDSCR0_OFFS);
+   tmp &= ~FSL_SRDSCR0_DPP_1V2;
+   out_be32(regs + FSL_SRDSCR0_OFFS, tmp);
+
+   /* VDD = 0 */
+   tmp = in_be32(regs + FSL_SRDSCR2_OFFS);
+   tmp &= ~FSL_SRDSCR2_VDD_1V2;
+   out_be32(regs + FSL_SRDSCR2_OFFS, tmp);
+   }
+
+   /* protocol specific configuration */
+   switch (proto) {
+   case FSL_SERDES_PROTO_SATA:
+   /* Set and clear reset bits */
+   tmp = in_be32(regs + FSL_SRDSRSTCTL_OFFS);
+   tmp |= FSL_SRDSRSTCTL_SATA_RESET;
+   out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp);
+   udelay(1000);
+   tmp &= ~FSL_SRDSRSTCTL_SATA_RESET;
+   out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp);
+
+   /* Configure SRDSCR1 */
+   tmp = in_be32(regs + FSL_SRDSCR1_OFFS);
+   tmp &= ~FSL_SRDSCR1_PLLBW;
+   out_be32(regs + FSL_SRDSCR1_OFFS, tmp);
+
+   /* Configure SRDSCR2 */
+   tmp = in_be32(regs + FSL_SRDSCR2_OFFS);
+   tmp &= ~FSL_SRDSCR2_SEIC_MASK;
+   tmp |= FSL_SRDSCR2_SEIC_SATA;
+   out_be32(regs + FSL_SRDSCR2_OFFS, tmp);
+
+   /* Configure SRDSCR3 */
+   tmp = FSL_SRDSCR3_KFR_SATA | FSL_SRDSCR3_KPH_SATA |
+   FSL_SRDSCR3_SDFM_SATA_PEX |
+   FSL_SRDSCR3_SDTXL_SATA;
+   out_be32(regs + FSL_SRDSCR3_OFFS, tmp);
+
+   /* Configure SRDSCR4 */
+   tmp = rfcks | FSL_SRDSCR4_PROT_SATA;
+   out_be32(regs + FSL_SRDSCR4_OFFS, tmp);
+   break;
+   case FSL_SERDES_PROTO_PEX:
+   case FSL_SERDES_PROTO_PEX_X2:
+   /* Configure SRDSCR1 */
+   tmp = in_be32(regs + FSL_SRDSCR1_OFFS);
+   tmp |= FSL_SRDSCR1_PLLBW;
+   out_be32(regs + FSL_SRDSCR1_OFFS, tmp);
+
+   /* Configure SRD

[U-Boot-Users] [PATCH v2 5/9] ATA: Add the readme for SATA command line

[Dave Liu]

Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 doc/README.sata |   69 +++
 1 files changed, 69 insertions(+), 0 deletions(-)
 create mode 100644 doc/README.sata

diff --git a/doc/README.sata b/doc/README.sata
new file mode 100644
index 000..5cc69db
--- /dev/null
+++ b/doc/README.sata
@@ -0,0 +1,69 @@
+1. SATA usage in U-boot
+
+   Two ways to operate the hard disk
+
+   * Raw read/write block from/to SATA hard disk;
+   * ext2load read file from ext2 filesytem in hard disk
+
+1.0 How to know the information of SATA hard disk?
+
+   => sata info
+
+SATA device 0: Model: ST3320620AS Firm: 3.AAD Ser#: 4QF01ZTN
+Type: Hard Disk
+Supports 48-bit addressing
+Capacity: 305245.3 MB = 298.0 GB (625142448 x 512)
+
+1.1 How to save the kernel, filesystem, dtb to SATA hard disk with raw?
+
+   Notes: 0x1000 sectors = 2 MBytes
+
+   wirte kernel
+   => tftp 4 /tftpboot/uImage.837x
+   => sata write 4 0 2000
+
+   write ramdisk
+   => tftp 4 /tftpboot/ramdisk.837x
+   => sata write 4 2000 8000
+
+   write dtb
+   => tftp 4 /tftpboot/mpc837xemds.dtb
+   => sata write 4 a000 1000
+
+1.2 How to read the kernel, filesystem, dtb from SATA hard disk with raw?
+
+   load kernel
+   => sata read 20 0 2000
+
+   load ramdisk
+   => sata read 100 2000 8000
+
+   load dtb
+   => sata read 200 a000 1000
+
+   boot
+   => bootm 20 100 200
+
+1.3 How to load image from ext2 filesystem in U-boot?
+
+   U-boot doesn't support ext2 write to hard disk, so
+   you have to write the image to hard disk under Linux env,
+before you load image from ext2 filesystem.
+
+   => ext2ls sata 0:1 /
+  4096 .
+  4096 ..
+ 16384 lost+found
+1352023 uImage.837x
+3646377 ramdisk.837x
+  12288 mpc837xemds.dtb
+ 12 hello.txt
+
+   => ext2load sata 0:1 20 /uImage.837x
+
+   => ext2load sata 0:1 100 /ramdisk.837x
+
+   => ext2load sata 0:1 200 /mpc837xemds.dtb
+
+   => bootm 20 100 200
+
-- 
1.5.4.rc4




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[U-Boot-Users] [PATCH v2 4/9] ATA: enable the sata init on bootup

[Dave Liu]

Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 lib_ppc/board.c |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/lib_ppc/board.c b/lib_ppc/board.c
index ee0213e..5e466fa 100644
--- a/lib_ppc/board.c
+++ b/lib_ppc/board.c
@@ -38,6 +38,9 @@
 #if defined(CONFIG_CMD_IDE)
 #include 
 #endif
+#if defined(CONFIG_CMD_SATA)
+#include 
+#endif
 #if defined(CONFIG_CMD_SCSI)
 #include 
 #endif
@@ -1093,6 +1096,11 @@ void board_init_r (gd_t *id, ulong dest_addr)
 #endif
 #endif
 
+#if defined(CONFIG_CMD_SATA)
+   puts ("SATA:  ");
+   sata_init ();
+#endif
+
 #ifdef CONFIG_LAST_STAGE_INIT
WATCHDOG_RESET ();
/*
-- 
1.5.4.rc4




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[U-Boot-Users] [PATCH v2 3/9] ATA: Add the fis struct for SATA

[Dave Liu]

Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 include/fis.h |  156 +
 1 files changed, 156 insertions(+), 0 deletions(-)
 create mode 100644 include/fis.h

diff --git a/include/fis.h b/include/fis.h
new file mode 100644
index 000..2040b50
--- /dev/null
+++ b/include/fis.h
@@ -0,0 +1,156 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc.
+ * Dave Liu <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __FIS_H__
+#define __FIS_H__
+/*
+* Register - Host to Device FIS
+*/
+typedef struct sata_fis_h2d {
+   u8 fis_type;
+   u8 pm_port_c;
+   u8 command;
+   u8 features;
+   u8 lba_low;
+   u8 lba_mid;
+   u8 lba_high;
+   u8 device;
+   u8 lba_low_exp;
+   u8 lba_mid_exp;
+   u8 lba_high_exp;
+   u8 features_exp;
+   u8 sector_count;
+   u8 sector_count_exp;
+   u8 res1;
+   u8 control;
+   u8 res2[4];
+} __attribute__ ((packed)) sata_fis_h2d_t;
+
+/*
+* Register - Host to Device FIS for read/write FPDMA queued
+*/
+typedef struct sata_fis_h2d_ncq {
+   u8 fis_type;
+   u8 pm_port_c;
+   u8 command;
+   u8 sector_count_low;
+   u8 lba_low;
+   u8 lba_mid;
+   u8 lba_high;
+   u8 device;
+   u8 lba_low_exp;
+   u8 lba_mid_exp;
+   u8 lba_high_exp;
+   u8 sector_count_high;
+   u8 tag;
+   u8 res1;
+   u8 res2;
+   u8 control;
+   u8 res3[4];
+} __attribute__ ((packed)) sata_fis_h2d_ncq_t;
+
+/*
+* Register - Device to Host FIS
+*/
+typedef struct sata_fis_d2h {
+   u8 fis_type;
+   u8 pm_port_i;
+   u8 status;
+   u8 error;
+   u8 lba_low;
+   u8 lba_mid;
+   u8 lba_high;
+   u8 device;
+   u8 lba_low_exp;
+   u8 lba_mid_exp;
+   u8 lba_high_exp;
+   u8 res1;
+   u8 sector_count;
+   u8 sector_count_exp;
+   u8 res2[2];
+   u8 res3[4];
+} __attribute__ ((packed)) sata_fis_d2h_t;
+
+/*
+* DMA Setup - Device to Host or Host to Device FIS
+*/
+typedef struct sata_fis_dma_setup {
+   u8 fis_type;
+   u8 pm_port_dir_int_act;
+   u8 res1;
+   u8 res2;
+   u32 dma_buffer_id_low;
+   u32 dma_buffer_id_high;
+   u32 res3;
+   u32 dma_buffer_offset;
+   u32 dma_transfer_count;
+   u32 res4;
+} __attribute__ ((packed)) sata_fis_dma_setup_t;
+
+/*
+* PIO Setup - Device to Host FIS
+*/
+typedef struct sata_fis_pio_setup {
+   u8 fis_type;
+   u8 pm_port_dir_int;
+   u8 status;
+   u8 error;
+   u8 lba_low;
+   u8 lba_mid;
+   u8 lba_high;
+   u8 res1;
+   u8 lba_low_exp;
+   u8 lba_mid_exp;
+   u8 lba_high_exp;
+   u8 res2;
+   u8 sector_count;
+   u8 sector_count_exp;
+   u8 res3;
+   u8 e_status;
+   u16 transfer_count;
+   u16 res4;
+} __attribute__ ((packed)) sata_fis_pio_setup_t;
+
+/*
+* Data - Host to Device or Device to Host FIS
+*/
+typedef struct sata_fis_data {
+   u8 fis_type;
+   u8 pm_port;
+   u8 res1;
+   u8 res2;
+   u32 data[2048];
+} __attribute__ ((packed)) sata_fis_data_t;
+
+/* fis_type - SATA FIS type
+ */
+enum sata_fis_type {
+   SATA_FIS_TYPE_REGISTER_H2D  = 0x27,
+   SATA_FIS_TYPE_REGISTER_D2H  = 0x34,
+   SATA_FIS_TYPE_DMA_ACT_D2H   = 0x39,
+   SATA_FIS_TYPE_DMA_SETUP_BI  = 0x41,
+   SATA_FIS_TYPE_DATA_BI   = 0x46,
+   SATA_FIS_TYPE_BIST_ACT_BI   = 0x58,
+   SATA_FIS_TYPE_PIO_SETUP_D2H = 0x5F,
+   SATA_FIS_TYPE_SET_DEVICE_BITS_D2H   = 0xA1,
+};
+
+#endif /* __FIS_H__ */
-- 
1.5.4.rc4




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[U-Boot-Users] [PATCH v2 2/9] ATA: Add the libata support

[Dave Liu]

add simple libata support in u-boot

Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 drivers/block/Makefile |1 +
 drivers/block/libata.c |  158 
 include/libata.h   |  207 
 3 files changed, 366 insertions(+), 0 deletions(-)
 create mode 100644 drivers/block/libata.c
 create mode 100644 include/libata.h

diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index e069969..d63ca2d 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -27,6 +27,7 @@ LIB   := $(obj)libblock.a
 
 COBJS-y += ahci.o
 COBJS-y += ata_piix.o
+COBJS-$(CONFIG_LIBATA) += libata.o
 COBJS-y += sil680.o
 COBJS-y += sym53c8xx.o
 COBJS-y += systemace.o
diff --git a/drivers/block/libata.c b/drivers/block/libata.c
new file mode 100644
index 000..aed5be3
--- /dev/null
+++ b/drivers/block/libata.c
@@ -0,0 +1,158 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc.
+ * Dave Liu <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * with the reference to libata of kernel
+ */
+
+#include 
+
+u64 ata_id_n_sectors(u16 *id)
+{
+   if (ata_id_has_lba(id)) {
+   if (ata_id_has_lba48(id))
+   return ata_id_u64(id, ATA_ID_LBA48_SECTORS);
+   else
+   return ata_id_u32(id, ATA_ID_LBA_SECTORS);
+   } else {
+   return 0;
+   }
+}
+
+u32 ata_dev_classify(u32 sig)
+{
+   u8 lbam, lbah;
+
+   lbam = (sig >> 16) & 0xff;
+   lbah = (sig >> 24) & 0xff;
+
+   if (((lbam == 0) && (lbah == 0)) ||
+   ((lbam == 0x3c) && (lbah == 0xc3)))
+   return ATA_DEV_ATA;
+
+   if ((lbam == 0x14) && (lbah == 0xeb))
+   return ATA_DEV_ATAPI;
+
+   if ((lbam == 0x69) && (lbah == 0x96))
+   return ATA_DEV_PMP;
+
+   return ATA_DEV_UNKNOWN;
+}
+
+static void ata_id_string(const u16 *id, unsigned char *s,
+unsigned int ofs, unsigned int len)
+{
+   unsigned int c;
+
+   while (len > 0) {
+   c = id[ofs] >> 8;
+   *s = c;
+   s++;
+
+   c = id[ofs] & 0xff;
+   *s = c;
+   s++;
+
+   ofs++;
+   len -= 2;
+   }
+}
+
+void ata_id_c_string(const u16 *id, unsigned char *s,
+unsigned int ofs, unsigned int len)
+{
+   unsigned char *p;
+
+   ata_id_string(id, s, ofs, len - 1);
+
+   p = s + strnlen((char *)s, len - 1);
+   while (p > s && p[-1] == ' ')
+   p--;
+   *p = '\0';
+}
+
+void ata_dump_id(u16 *id)
+{
+   unsigned char serial[ATA_ID_SERNO_LEN + 1];
+   unsigned char firmware[ATA_ID_FW_REV_LEN + 1];
+   unsigned char product[ATA_ID_PROD_LEN + 1];
+   u64 n_sectors;
+
+   /* Serial number */
+   ata_id_c_string(id, serial, ATA_ID_SERNO, sizeof(serial));
+   printf("S/N: %s\n\r", serial);
+
+   /* Firmware version */
+   ata_id_c_string(id, firmware, ATA_ID_FW_REV, sizeof(firmware));
+   printf("Firmware version: %s\n\r", firmware);
+
+   /* Product model */
+   ata_id_c_string(id, product, ATA_ID_PROD, sizeof(product));
+   printf("Product model number: %s\n\r", product);
+
+   /* Total sectors of device  */
+   n_sectors = ata_id_n_sectors(id);
+   printf("Capablity: %d sectors\n\r", n_sectors);
+
+   printf("id[49]: capabilities ==0x%04x\n"
+   "id[53]: field valid ==0x%04x\n"
+   "id[63]: mwdma ==0x%04x\n"
+   "id[64]: pio ==0x%04x\n"
+   "id[75]: queue depth ==0x%04x\n",
+   id[49],
+   id[53],
+   id[63],
+   id[64],
+   id[75]);
+
+   printf("id[76]: sata capablity ==0x%04x\n"
+   "id[78]: sata features supported ==0x%04x\n"
+   "id[79]: sata features enable ==0x%04x\n",
+   id[76],
+   id[78],
+   id[79]);
+
+   printf("id[80]: major version ==0x%04x\n"
+   "id[81]: minor version ==0x%04x\n"
+   "id[82]: command set supported 1 ==0x%04x\n"
+   "id[83]: command set supported 2 ==0x%04x\n"
+   "id[84]: command set extens

[U-Boot-Users] [PATCH v2 1/9] ATA: Add the support for SATA framework

[Dave Liu]

1. Add the SATA framework
2. Add the SATA command line

Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 common/Makefile|1 +
 common/cmd_sata2.c |  206 
 disk/part.c|   14 
 disk/part_dos.c|2 +
 disk/part_iso.c|1 +
 include/part.h |3 +
 6 files changed, 227 insertions(+), 0 deletions(-)
 create mode 100644 common/cmd_sata2.c

diff --git a/common/Makefile b/common/Makefile
index 56d0581..fb47539 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -87,6 +87,7 @@ COBJS-$(CONFIG_CMD_PORTIO) += cmd_portio.o
 COBJS-$(CONFIG_CMD_REGINFO) += cmd_reginfo.o
 COBJS-$(CONFIG_CMD_REISER) += cmd_reiser.o
 COBJS-y += cmd_sata.o
+COBJS-$(CONFIG_CMD_SATA) += cmd_sata2.o
 COBJS-$(CONFIG_CMD_SCSI) += cmd_scsi.o
 COBJS-$(CONFIG_CMD_SPI) += cmd_spi.o
 COBJS-$(CONFIG_CMD_STRINGS) += cmd_strings.o
diff --git a/common/cmd_sata2.c b/common/cmd_sata2.c
new file mode 100644
index 000..f89448d
--- /dev/null
+++ b/common/cmd_sata2.c
@@ -0,0 +1,206 @@
+/*
+ * Copyright (C) 2000-2005, DENX Software Engineering
+ * Wolfgang Denk <[EMAIL PROTECTED]>
+ * Copyright (C) 2008 Freescale Semiconductor, Inc.
+ * Dave Liu <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+extern int sata_low_level_read(int dev, u32 blknr, u32 blkcnt, void *buffer);
+extern int sata_low_level_write(int dev, u32 blknr, u32 blkcnt, void *buffer);
+extern int sata_low_level_init(int dev);
+extern int sata_low_level_scan(int dev);
+
+static int curr_device = -1;
+block_dev_desc_t sata_dev_desc[CFG_SATA_MAX_DEVICE];
+
+static ulong sata_read(int dev, ulong blknr, ulong blkcnt, void *buffer)
+{
+   return sata_low_level_read(dev, blknr, blkcnt, buffer);
+}
+
+static ulong sata_write(int dev, ulong blknr, ulong blkcnt, const void *buffer)
+{
+   return sata_low_level_write(dev, blknr, blkcnt, (void *)buffer);
+}
+
+int sata_init(void)
+{
+   int rc;
+   int i;
+
+   for (i = 0; i < CFG_SATA_MAX_DEVICE; i++) {
+   memset(&sata_dev_desc[i], 0, sizeof(struct block_dev_desc));
+   sata_dev_desc[i].if_type = IF_TYPE_SATA;
+   sata_dev_desc[i].dev = i;
+   sata_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
+   sata_dev_desc[i].type = DEV_TYPE_HARDDISK;
+   sata_dev_desc[i].lba = 0;
+   sata_dev_desc[i].blksz = ATA_SECT_SIZE;
+   sata_dev_desc[i].block_read = sata_read;
+   sata_dev_desc[i].block_write = sata_write;
+
+   rc = sata_low_level_init(i);
+   rc = sata_low_level_scan(i);
+   if ((sata_dev_desc[i].lba > 0) && (sata_dev_desc[i].blksz > 0))
+   init_part(&sata_dev_desc[i]);
+   }
+   curr_device = 0;
+   return rc;
+}
+
+block_dev_desc_t *sata_get_dev(int dev)
+{
+   return (dev < CFG_SATA_MAX_DEVICE) ? &sata_dev_desc[dev] : NULL;
+}
+
+int do_sata(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+   int rc = 0;
+
+   switch (argc) {
+   case 0:
+   case 1:
+   printf("Usage:\n%s\n", cmdtp->usage);
+   return 1;
+   case 2:
+   if (strncmp(argv[1],"inf", 3) == 0) {
+   int i;
+   putc('\n');
+   for (i = 0; i < CFG_SATA_MAX_DEVICE; ++i) {
+   if (sata_dev_desc[i].type == DEV_TYPE_UNKNOWN)
+   continue;
+   printf ("SATA device %d: ", i);
+   dev_print(&sata_dev_desc[i]);
+   }
+   return 0;
+   } else if (strncmp(argv[1],"dev", 3) == 0) {
+   if ((curr_device < 0) || (curr_device >= 
CFG_SATA_MAX_DEVICE)) {
+   puts("\nno SATA devices available\n");
+   return 1;
+   }
+   printf("\nSATA device %d: ", curr_device);
+   dev_print(&sata_dev_desc[curr_device]);
+   return 0;
+   } else if (strncmp(argv[1],"part",4) == 0) {
+   int dev, ok;
+
+

[U-Boot-Users] [PATCH V2 0/9] SATA framework and FSL SATA support patch set

[Dave Liu]

Hello all,

The patch set include two parts:
1. SATA framework support
2. The Freescale SATA controller support

I hope these patches to go v1.3.3.

Thanks,
Dave

The following changes since commit
23e20aa6488e6c0622496549861bfdc74108debe:
  Yuri Tikhonov (1):
lwmon5: Fix register test logic to match the specific GDC h/w.

are available in the git repository at:

  git://git.ap.freescale.net/git/u-boot.git develop

Anton Vorontsov (1):
  mpc83xx: serdes setup routines

Dave Liu (8):
  ATA: Add the support for SATA framework
  ATA: Add the libata support
  ATA: Add the fis struct for SATA
  ATA: enable the sata init on bootup
  ATA: Add the readme for SATA command line
  mpc83xx: enable serdes1 for 837x SATA
  drivers: Add the support for Freescale SATA controller
  mpc83xx: enable the SATA interface on mpc837xemds board

 board/freescale/mpc837xemds/mpc837xemds.c |3 +
 common/Makefile   |1 +
 common/cmd_sata2.c|  206 +++
 cpu/mpc83xx/Makefile  |2 +-
 cpu/mpc83xx/serdes.c  |  156 +
 disk/part.c   |   14 +
 disk/part_dos.c   |2 +
 disk/part_iso.c   |1 +
 doc/README.sata   |   69 +++
 drivers/block/Makefile|2 +
 drivers/block/fsl_sata.c  |  921 ++
+++
 drivers/block/fsl_sata.h  |  374 
 drivers/block/libata.c|  158 +
 include/asm-ppc/fsl_serdes.h  |   25 +
 include/configs/MPC837XEMDS.h |   32 +
 include/fis.h |  156 +
 include/libata.h  |  207 +++
 include/part.h|3 +
 lib_ppc/board.c   |8 +
 19 files changed, 2339 insertions(+), 1 deletions(-)
 create mode 100644 common/cmd_sata2.c
 create mode 100644 cpu/mpc83xx/serdes.c
 create mode 100644 doc/README.sata
 create mode 100644 drivers/block/fsl_sata.c
 create mode 100644 drivers/block/fsl_sata.h
 create mode 100644 drivers/block/libata.c
 create mode 100644 include/asm-ppc/fsl_serdes.h
 create mode 100644 include/fis.h
 create mode 100644 include/libata.h



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Re: [U-Boot-Users] [PATCH] ppc4xx: Don't use last 256 bytes of SDRAM, workaround for 440EPx CHIP 11 errata

[Wolfgang Denk]

Hello Stefan,

in message <[EMAIL PROTECTED]> you wrote:
> Since 440EPx/GRx has problems with accessing the last 256 bytes of SDRAM via
> the Denali DDR/DDR2 controller, we set CONFIG_PRAM to 1 and reserve 1kByte
> of protected RAM. This way this memory will not get "touched" by U-Boot. And
> by passing "mem=${mem}" to the Linux kernel, Linux will not use this area
> either.

Note that this workaround is incomplete.

If you enable shared (between U-Boot and Linux) log buffer, then  the
log  buffer  will  go at the end of memory, and the pRAM area will be
allocated below. In this case the problems is not only still present,
but also very likely to hit pretty soon.

> This patch adds this workaround for the following 440EPx boards:
> sequoia, lwmon5. Others should probably follow this example.

OK, the default configs for Sequoia doesn't use shared log buffer, and
the lwmon5 uses CONFIG_ALT_LB_ADDR (i. e. it puts the log buffer in
OCM), so these boards will work.

But any changes to the configuration may easily break this again.


I don't like the idea that  each  affected  board  has  to  fix  this
(probably  differently)  in  it's board config file. I would prefer a
fix (common to all affected boards) in one central location.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
"Unix is simple, but it takes a genius to understand the simplicity."
 - Dennis Ritchie

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[U-Boot-Users] [PATCH] ppc4xx: Don't use last 256 bytes of SDRAM, workaround for 440EPx CHIP 11 errata

[Stefan Roese]

Since 440EPx/GRx has problems with accessing the last 256 bytes of SDRAM via
the Denali DDR/DDR2 controller, we set CONFIG_PRAM to 1 and reserve 1kByte
of protected RAM. This way this memory will not get "touched" by U-Boot. And
by passing "mem=${mem}" to the Linux kernel, Linux will not use this area
either.

This patch adds this workaround for the following 440EPx boards:
sequoia, lwmon5. Others should probably follow this example.

Here the description from the AMCC documentation:

CHIP_11: End of memory range area restricted access.
Category: 3

Overview:
The 440EPx DDR controller does not acknowledge any
transaction which is determined to be crossing over the
end-of-memory-range boundary, even if the starting address is
within valid memory space. Any such transaction from any PLB4
master will result in a PLB time-out on PLB4 bus.

Impact:
In case of such misaligned bursts, PLB4 masters will not
retrieve any data at all, just the available data up to the
end of memory, especially the 440 CPU. For example, if a CPU
instruction required an operand located in memory within the
last 7 words of memory, the DCU master would burst read 8
words to update the data cache and cross over the
end-of-memory-range boundary. Such a DCU read would not be
answered by the DDR controller, resulting in a PLB4 time-out
and ultimately in a Machine Check interrupt. The data would
be inaccessible to the CPU.

Workaround:
Forbid any application to access the last 256 bytes of DDR
memory. For example, make your operating system believe that
the last 256 bytes of DDR memory are absent. AMCC has a patch
that does this, available for Linux.

Signed-off-by: Stefan Roese <[EMAIL PROTECTED]>
---
 include/configs/lwmon5.h  |7 +--
 include/configs/sequoia.h |2 ++
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index c3f10c7..62c0e58 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2007
+ * (C) Copyright 2007-2008
  * Stefan Roese, DENX Software Engineering, [EMAIL PROTECTED]
  *
  * This program is free software; you can redistribute it and/or
@@ -145,6 +145,8 @@
 #else
 #define CFG_POST_ECC_ON0
 #endif
+#define CONFIG_PRAM1   /* don't use last 256 bytes */
+   /* 440EPx errata CHIP 11*/
 
 /* POST support */
 #define CONFIG_POST(CFG_POST_CACHE| \
@@ -205,7 +207,8 @@
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"  \
":${hostname}:${netdev}:off panic=1\0"  \
"addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0"\
-   "addmisc=setenv bootargs ${bootargs} rtc-pcf8563.probe=0,0x51\0"\
+   "addmisc=setenv bootargs ${bootargs} rtc-pcf8563.probe=0,0x51"  \
+   " mem=${mem}\0" \
"flash_nfs=run nfsargs addip addtty addmisc;"   \
"bootm ${kernel_addr}\0"\
"flash_self=run ramargs addip addtty addmisc;"  \
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index dfa8779..541f8bc 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -221,6 +221,8 @@
 #if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
 #define CONFIG_DDR_DATA_EYE/* use DDR2 optimization*/
 #endif
+#define CONFIG_PRAM1   /* don't use last 256 bytes */
+   /* 440EPx errata CHIP 11*/
 
 /*
  * I2C
-- 
1.5.4.4


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Re: [U-Boot-Users] [PATCH] [ARM] [RESUBMIT] Move ARM supplied dev boards to new board/arm directory

[Peter Pearse]

 

> -Original Message-
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] 
> Sent: 19 March 2008 20:16
> To: Jean-Christophe PLAGNIOL-VILLARD
> Cc: Peter Pearse; U-Boot-Users
> Subject: Re: [U-Boot-Users] [PATCH] [ARM] [RESUBMIT] Move ARM 
> supplied dev boards to new board/arm directory
> 
> In message <[EMAIL PROTECTED]> you wrote:
> >
> > >  /*
> > > - *  armboot - Startup Code for ARM926EJS CPU-core
> > > + *  asm.S - Assembler code common to development boards 
> supplied by 
> > > + ARM
> > > Ltd.
> > >   *
> > > - *  Copyright (c) 2003  Texas Instruments
> > > - *
> > > - *  - Adapted for OMAP1610 OMAP730 from ARM925t code --
> > > - *
> > > - *  Copyright (c) 2001   Marius Gr=F6ger <[EMAIL PROTECTED]>
> > > - *  Copyright (c) 2002   Alex Z=FCpke <[EMAIL PROTECTED]>
> > > - *  Copyright (c) 2002   Gary Jennejohn <[EMAIL PROTECTED]>
> > > - *  Copyright (c) 2003   Richard Woodruff <[EMAIL PROTECTED]>
> > > - *  Copyright (c) 2003   Kshitij <[EMAIL PROTECTED]>
> > > + *  Copyright (c) 2008 ARM Ltd.
> > Personaly I'll prefer you do not remove the copyright
> 
> This is not a matter of preferences.
> 
> Removing copyright entries is a strict TABU.
> 
> Never, never ever do that!
> 
> 
> Best regards,
> 
> Wolfgang Denk

I wouldn't remove copyright intentionally.

Here git -M has decided that a new file 

board/arm/arm.S 

is actually a modified old file

cpu/arm926ejs/versatile/reset.S

Since the new file contained different code, 
I removed the old copyright lines and added a new one.

Perhaps a git guru can suggest how I avoid this in future,
other than inspecting every patch and modifying by hand.

(Although I'll do that if necessary)

reset.S code:

.align  5
.globl reset_cpu
reset_cpu:
ldr r1, rstctl1 /* get clkm1 reset ctl */
mov r3, #0x0
strhr3, [r1]/* clear it */
mov r3, #0x8
strhr3, [r1]/* force dsp+arm reset */
_loop_forever:
b   _loop_forever

rstctl1:
.word   0xfffece10

board/arm/asm.S

.align  5
.globl reset_cpu
reset_cpu:
b   0


Regards

Peter





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[U-Boot-Users] [PATCH] PPC405EP Set EMAC noise filter bits

[Markus Brunner]

This bug was introduced with commit aee747f19b460a0e9da20ff21e90fdaac1cec359 
which enabled CFG_4xx_GPIO_TABLE for PPC405 and unintentionally 
disabled the setting of the emac noise filter bits for PPC405EP when 
CFG_4xx_GPIO_TABLE is set.

Signed-off-by: Markus Brunner <[EMAIL PROTECTED]>
---

diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c
index 5d15e2f..5ed439d 100644
--- a/cpu/ppc4xx/cpu_init.c
+++ b/cpu/ppc4xx/cpu_init.c
@@ -135,6 +135,7 @@ cpu_init_f (void)
 #if defined (CFG_GPIO0_TCR)
out32(GPIO0_TCR, CFG_GPIO0_TCR);/* enable output driver for 
outputs */
 #endif
+#endif /* CONFIG_405E? !CFG_4xx_GPIO_TABLE */

 #if defined (CONFIG_405EP)
/*
@@ -147,7 +148,6 @@ cpu_init_f (void)
 */
mtdcr(cpc0_pci, mfdcr(cpc0_pci) | CPC0_PCI_HOST_CFG_EN | 
CPC0_PCI_ARBIT_EN);
 #endif /* CONFIG_405EP */
-#endif /* CONFIG_405EP */

 #if defined(CFG_4xx_GPIO_TABLE)
gpio_set_chip_configuration();

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