Re: [PATCH v5 00/13] HDMI FRL and DSC Support for amdgpu
On Tue, 2026-05-12 at 11:52 -0400, Harry Wentland wrote: > This patch series adds HDMI FRL and FRL DSC support to the amdgpu > display driver. > > This work passed a representative subset of HDMI compliance and a full > compliance run on this branch is in the works. We don't expect the full > run to show any failures since it passes in other environments. > > Thanks to Siqueira who prepared this work a couple years back and > unfortunately didn't manage to send them while he was still working > at AMD. > > Thanks to Jerry who has been making this code solid on Linux and > running the compliance tests. > > The first patch in the series isn't related to HDMI 2.1 but included > here because it moved the code around some key bits of the HDMI 2.1 > stuff around too much. It will land with the next DC Patch series. > > v5: > - One more missing FP compilation fix > > v4: > - Disable FRL over DP MST due to lack of testing > - FP compilation fix > - squash fixup commit > > v3: > - Add missing DML2 bits > - Merged register headers to asdn and removed from patchset > > v2: > - Add missing function pointers on DCN 3.x > - Add DSC > > Cc: Rodrigo Siqueira > Cc: Zuo, Jerry > Cc: Tomasz Pakuła > > Fangzhi Zuo (1): > drm/amd/display: add HDMI 2.1 Compliance Support > > Harry Wentland (12): > drm/amd/display: Add HDMI FRL definitions to includes > drm/amd/display: Add DML changes to support HDMI FRL > drm/amd/display: add HDMI 2.1 FRL base support to DML 2.0 > drm/amd/display: Add DCCG DIO, HPO, OPP, and OPTC support for FRL > drm/amd/display: Add FRL support to clk_mgr, dsc, hdcp > drm/amd/display: Tie FRL programming together in HWSS > drm/amd/display: Add DC resource support for FRL > drm/amd/display Add DC link support for FRL > drm/amd/display: Add support for FRL to DC core > drm/amd/display: Update HDCP and info_packet modules for FRL > drm/amd/display: Tie FRL support into amdgpu_dm > drm/amd/display: add HDMI 2.1 DSC over FRL support > > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 160 ++- > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 11 + > .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 28 + > .../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c|2 + > .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 68 +- > .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 79 ++ > .../drm/amd/display/dc/bios/bios_parser2.c| 21 + > .../drm/amd/display/dc/bios/command_table2.c |6 + > .../dce112/command_table_helper2_dce112.c |3 + > .../bios/dce112/command_table_helper_dce112.c |3 + > .../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c |3 + > .../dc/clk_mgr/dcn314/dcn314_clk_mgr.c|3 + > .../dc/clk_mgr/dcn315/dcn315_clk_mgr.c|3 + > .../dc/clk_mgr/dcn316/dcn316_clk_mgr.c|3 + > .../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 12 + > .../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 14 + > .../dc/clk_mgr/dcn401/dcn401_clk_mgr.c| 18 + > drivers/gpu/drm/amd/display/dc/core/dc.c | 32 +- > .../gpu/drm/amd/display/dc/core/dc_debug.c|4 + > .../drm/amd/display/dc/core/dc_hw_sequencer.c | 49 + > .../drm/amd/display/dc/core/dc_link_enc_cfg.c |3 + > .../drm/amd/display/dc/core/dc_link_exports.c | 45 + > .../gpu/drm/amd/display/dc/core/dc_resource.c | 289 > .../gpu/drm/amd/display/dc/core/dc_stream.c | 35 + > drivers/gpu/drm/amd/display/dc/dc.h | 128 ++ > drivers/gpu/drm/amd/display/dc/dc_dsc.h |8 + > .../gpu/drm/amd/display/dc/dc_hdmi_types.h| 164 ++- > drivers/gpu/drm/amd/display/dc/dc_hw_types.h |8 + > drivers/gpu/drm/amd/display/dc/dc_types.h | 24 + > .../amd/display/dc/dccg/dcn30/dcn30_dccg.c| 40 + > .../amd/display/dc/dccg/dcn30/dcn30_dccg.h|8 + > .../amd/display/dc/dccg/dcn31/dcn31_dccg.c| 88 ++ > .../amd/display/dc/dccg/dcn31/dcn31_dccg.h| 13 + > .../amd/display/dc/dccg/dcn314/dcn314_dccg.c | 25 + > .../amd/display/dc/dccg/dcn32/dcn32_dccg.c| 68 + > .../amd/display/dc/dccg/dcn35/dcn35_dccg.c| 321 + > .../amd/display/dc/dccg/dcn401/dcn401_dccg.c | 73 + > .../amd/display/dc/dccg/dcn401/dcn401_dccg.h |4 + > .../amd/display/dc/dccg/dcn42/dcn42_dccg.c| 33 + > .../gpu/drm/amd/display/dc/dce/dce_audio.c|8 + > .../drm/amd/display/dc/dce/dce_clock_source.c | 30 +- > .../display/dc/dio/dcn10/dcn10_link_encoder.c |3 +- > .../display/dc/dio/dcn20/dcn20_link_encoder.h |1 + > .../dc/dio/dcn30/dcn30_dio_link_encoder.c | 250 > .../dc/dio/dcn30/dcn30_dio_link_encoder.h | 17 + > .../dc/dio/dcn301/dcn301_dio_link_encoder.c | 18 + > .../dc/dio/dcn31/dcn31_dio_link_encoder.c | 114 ++ > .../dc/dio/dcn31/dcn31_dio_link_encoder.h |8 + > .../dc/dio/dcn32/dcn32_dio_link_encoder.c | 214 +++ > .../dc/dio/dcn32/dcn32_dio_link_encoder.h | 16 + > .../dc/dio/dcn321/dcn321_dio_link_encoder.c | 20 + > .../dc/dio/
[PATCH v5 00/13] HDMI FRL and DSC Support for amdgpu
This patch series adds HDMI FRL and FRL DSC support to the amdgpu display driver. This work passed a representative subset of HDMI compliance and a full compliance run on this branch is in the works. We don't expect the full run to show any failures since it passes in other environments. Thanks to Siqueira who prepared this work a couple years back and unfortunately didn't manage to send them while he was still working at AMD. Thanks to Jerry who has been making this code solid on Linux and running the compliance tests. The first patch in the series isn't related to HDMI 2.1 but included here because it moved the code around some key bits of the HDMI 2.1 stuff around too much. It will land with the next DC Patch series. v5: - One more missing FP compilation fix v4: - Disable FRL over DP MST due to lack of testing - FP compilation fix - squash fixup commit v3: - Add missing DML2 bits - Merged register headers to asdn and removed from patchset v2: - Add missing function pointers on DCN 3.x - Add DSC Cc: Rodrigo Siqueira Cc: Zuo, Jerry Cc: Tomasz Pakuła Fangzhi Zuo (1): drm/amd/display: add HDMI 2.1 Compliance Support Harry Wentland (12): drm/amd/display: Add HDMI FRL definitions to includes drm/amd/display: Add DML changes to support HDMI FRL drm/amd/display: add HDMI 2.1 FRL base support to DML 2.0 drm/amd/display: Add DCCG DIO, HPO, OPP, and OPTC support for FRL drm/amd/display: Add FRL support to clk_mgr, dsc, hdcp drm/amd/display: Tie FRL programming together in HWSS drm/amd/display: Add DC resource support for FRL drm/amd/display Add DC link support for FRL drm/amd/display: Add support for FRL to DC core drm/amd/display: Update HDCP and info_packet modules for FRL drm/amd/display: Tie FRL support into amdgpu_dm drm/amd/display: add HDMI 2.1 DSC over FRL support .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 160 ++- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 11 + .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 28 + .../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c|2 + .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 68 +- .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 79 ++ .../drm/amd/display/dc/bios/bios_parser2.c| 21 + .../drm/amd/display/dc/bios/command_table2.c |6 + .../dce112/command_table_helper2_dce112.c |3 + .../bios/dce112/command_table_helper_dce112.c |3 + .../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c |3 + .../dc/clk_mgr/dcn314/dcn314_clk_mgr.c|3 + .../dc/clk_mgr/dcn315/dcn315_clk_mgr.c|3 + .../dc/clk_mgr/dcn316/dcn316_clk_mgr.c|3 + .../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 12 + .../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 14 + .../dc/clk_mgr/dcn401/dcn401_clk_mgr.c| 18 + drivers/gpu/drm/amd/display/dc/core/dc.c | 32 +- .../gpu/drm/amd/display/dc/core/dc_debug.c|4 + .../drm/amd/display/dc/core/dc_hw_sequencer.c | 49 + .../drm/amd/display/dc/core/dc_link_enc_cfg.c |3 + .../drm/amd/display/dc/core/dc_link_exports.c | 45 + .../gpu/drm/amd/display/dc/core/dc_resource.c | 289 .../gpu/drm/amd/display/dc/core/dc_stream.c | 35 + drivers/gpu/drm/amd/display/dc/dc.h | 128 ++ drivers/gpu/drm/amd/display/dc/dc_dsc.h |8 + .../gpu/drm/amd/display/dc/dc_hdmi_types.h| 164 ++- drivers/gpu/drm/amd/display/dc/dc_hw_types.h |8 + drivers/gpu/drm/amd/display/dc/dc_types.h | 24 + .../amd/display/dc/dccg/dcn30/dcn30_dccg.c| 40 + .../amd/display/dc/dccg/dcn30/dcn30_dccg.h|8 + .../amd/display/dc/dccg/dcn31/dcn31_dccg.c| 88 ++ .../amd/display/dc/dccg/dcn31/dcn31_dccg.h| 13 + .../amd/display/dc/dccg/dcn314/dcn314_dccg.c | 25 + .../amd/display/dc/dccg/dcn32/dcn32_dccg.c| 68 + .../amd/display/dc/dccg/dcn35/dcn35_dccg.c| 321 + .../amd/display/dc/dccg/dcn401/dcn401_dccg.c | 73 + .../amd/display/dc/dccg/dcn401/dcn401_dccg.h |4 + .../amd/display/dc/dccg/dcn42/dcn42_dccg.c| 33 + .../gpu/drm/amd/display/dc/dce/dce_audio.c|8 + .../drm/amd/display/dc/dce/dce_clock_source.c | 30 +- .../display/dc/dio/dcn10/dcn10_link_encoder.c |3 +- .../display/dc/dio/dcn20/dcn20_link_encoder.h |1 + .../dc/dio/dcn30/dcn30_dio_link_encoder.c | 250 .../dc/dio/dcn30/dcn30_dio_link_encoder.h | 17 + .../dc/dio/dcn301/dcn301_dio_link_encoder.c | 18 + .../dc/dio/dcn31/dcn31_dio_link_encoder.c | 114 ++ .../dc/dio/dcn31/dcn31_dio_link_encoder.h |8 + .../dc/dio/dcn32/dcn32_dio_link_encoder.c | 214 +++ .../dc/dio/dcn32/dcn32_dio_link_encoder.h | 16 + .../dc/dio/dcn321/dcn321_dio_link_encoder.c | 20 + .../dc/dio/dcn35/dcn35_dio_link_encoder.c | 21 + .../dc/dio/dcn401/dcn401_dio_link_encoder.c | 220 +++ .../dc/dio/dcn401/dcn401_dio_link_encoder.h | 16 + .../dc/dio/dcn42/dcn42_dio_link_encoder.c | 21 + drivers/gpu/drm/amd/display/dc/dm_cp_psp.h|1 +
