On Mon, 2010-06-21 at 13:37 -0700, Luis R. Rodriguez wrote:
> On Mon, Jun 21, 2010 at 1:16 PM, Maxim Levitsky
> wrote:
> > Luis, let me explain again, exactly the situation:
> >
> > First of all AR5001 and AR5001X devices (former was usualy listed as
> > AR2425, and I have it, later I don't know
On Mon, Jun 21, 2010 at 1:33 PM, Jussi Kivilinna
wrote:
> Quoting "Maxim Levitsky" :
>
>> Card (at least mine) advertises its as a 'pre pci 1.1 device'.
>> Therefore if I enable CONFIG_PCIEASPM, the pci core will automaticly
>> disable ASPM (both L0s and L1) on this card.
>> I won't be surprised t
On Mon, Jun 21, 2010 at 1:16 PM, Maxim Levitsky wrote:
> Luis, let me explain again, exactly the situation:
>
> First of all AR5001 and AR5001X devices (former was usualy listed as
> AR2425, and I have it, later I don't know about much), don't work well
> with ASPM L0s enabled.
Thanks for the cla
Quoting "Maxim Levitsky" :
> Card (at least mine) advertises its as a 'pre pci 1.1 device'.
> Therefore if I enable CONFIG_PCIEASPM, the pci core will automaticly
> disable ASPM (both L0s and L1) on this card.
> I won't be surprised that windows does the same.
>
Even if CONFIG_PCIEASPM compiled i
Luis, let me explain again, exactly the situation:
First of all AR5001 and AR5001X devices (former was usualy listed as
AR2425, and I have it, later I don't know about much), don't work well
with ASPM L0s enabled.
I told that many times, but I tell again.
As soon as card it put on medium to high
Quoting "Luis R. Rodriguez" :
>> Also Jussi Kivilinna said that he found that in windows .inf file there
>> are some instructions to enable L1 but not L0s.
>
> For which chipsets?
I uploaded windows driver I have to:
http://www.student.oulu.fi/~jukivili/ath5k/XP32_XP64_WHQL_Dri-7-6-1-149_ACU-
[please don't top post]
On Mon, Jun 21, 2010 at 11:57:39PM +0800, Lrj wrote:
> So after reading the link field of the descriptor, the hardware will update
> the RXDP register automaticly. And then the hardware set the "done" field of
> the current descriptor, am I right?
Yes, except that there's
On Mon, Jun 21, 2010 at 4:48 AM, Daniel Golle wrote:
> I'm developing on OpenWrt to work with EEPROM-less ath5k mini-pci devices.
> This is needed to support the ar71xx-based Senao EAP7660D board which got
> two AR5413 modules soldered into its mini-pci slots. In the original
> Firmware, MAC addre
So after reading the link field of the descriptor, the hardware will update
the RXDP register automaticly. And then the hardware set the "done" field of
the current descriptor, am I right?
Thank you.
On Mon, Jun 21, 2010 at 8:24 PM, Bob Copeland wrote:
> On Mon, Jun 21, 2010 at 5:04 AM, Lrj wr
On Sun, Jun 20, 2010 at 06:36:35PM -0400, Bob Copeland wrote:
> The packet data is still captured in the trace, so one
> can use plugins with trace-cmd to extract the raw data.
Here's how one would go about doing that, incidentally:
1. Install trace-cmd.
2. Add the attached python script to ~/.tr
Bruno,
I have been on vacation, but I'll try your changes as soon as possible.
--
Regards
Joerg
--- Bruno Randolf schrieb am Fr, 11.6.2010:
> Von: Bruno Randolf
> Betreff: Re: [ath5k-devel] ath5k phy0: failed to warm reset the MAC Chip
> An: ath5k-devel@lists.ath5k.org, "Joerg Pommnitz
On Mon, Jun 21, 2010 at 5:29 AM, Jin YunYe wrote:
> Alternatively, does anyone know how to "fill up" a skb structure
> "manually" in the ath5k level and send it out using ath5k_tx()
> directly?
You might want to use packet injection and monitor mode
for these kinds of things, then it will work w
On Mon, Jun 21, 2010 at 5:04 AM, Lrj wrote:
> If not, how the hardware knows the address of next rx descriptor while the
> RXDP register's value remains the first rx descriptor's address?
The hardware reads the link field of the current descriptor.
--
Bob Copeland %% www.bobcopeland.com
___
I'm developing on OpenWrt to work with EEPROM-less ath5k mini-pci
devices. This is needed to support the ar71xx-based Senao EAP7660D board
which got two AR5413 modules soldered into its mini-pci slots. In the
original Firmware, MAC addresses as well as calibration-data seems to be
part of the f
Dear all,
For research purpose, I want to make the Atheros wifi card to send out
a response packet immediately after ath5k_intr() is triggered by a
packet-receive interrupt.
I want to send the packet in either ath5k_intr() (although I know it
is not good practice...) or ath5k_tasklet_rx(). Howeve
Hi,
I got a question while reading the aht5k_tasklet_rx():
> /* bail if HW is still using self-linked descriptor */
>
> if (ath5k_hw_get_rxdp(sc->ah) == bf->daddr)
> break;
>
> I searched all the ath5k codes, and found that the RXDP register was
set only by th
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