Re: [ath5k-devel] Discrepancy in ISR2 bits

2009-07-20 Thread Pavel Roskin
On Mon, 2009-07-20 at 09:43 +1000, Brett Wright wrote: > The values being programmed into the interrupt mask register are wrong > also. Thanks for catching it! Resending the patch. -- Regards, Pavel Roskin ___ ath5k-devel mailing list ath5k-devel@lis

Re: [ath5k-devel] Discrepancy in ISR2 bits

2009-07-19 Thread Brett Wright
> -Original Message- > From: ath5k-devel-boun...@lists.ath5k.org [mailto:ath5k-devel- > boun...@lists.ath5k.org] On Behalf Of Pavel Roskin > Sent: Sunday, 19 July 2009 8:17 AM > To: Bob Copeland > Cc: ath5k-devel@lists.ath5k.org > Subject: Re: [ath5k-devel] Dis

Re: [ath5k-devel] Discrepancy in ISR2 bits

2009-07-18 Thread Pavel Roskin
On Sat, 2009-07-18 at 17:08 -0400, Bob Copeland wrote: > On Thu, Jul 16, 2009 at 11:15 PM, Pavel Roskin wrote: > > >From MadWifi, file ath_hal/ar5212/ar5212reg.h: > > > > #define AR_ISR_S2_MCABT 0x0001 /* Master cycle abort interrupt > > */ > > #define AR_ISR_S2_SSERR 0x0002000

Re: [ath5k-devel] Discrepancy in ISR2 bits

2009-07-18 Thread Bob Copeland
On Thu, Jul 16, 2009 at 11:15 PM, Pavel Roskin wrote: > >From MadWifi, file ath_hal/ar5212/ar5212reg.h: > > #define AR_ISR_S2_MCABT         0x0001 /* Master cycle abort interrupt */ > #define AR_ISR_S2_SSERR         0x0002 /* SERR interrupt */ > #define AR_ISR_S2_DPERR         0x0004 /*

[ath5k-devel] Discrepancy in ISR2 bits

2009-07-16 Thread Pavel Roskin
Hello! There is a discrepancy between MadWifi (specifically the open sourced HAL) and ath5k regarding the meaning some bits in the interrupt status register 2. >From MadWifi, file ath_hal/ar5212/ar5212reg.h: #define AR_ISR_S2_MCABT 0x0001 /* Master cycle abort interrupt */ #define AR