[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-25 Thread via cfe-commits

github-actions[bot] wrote:



@gerekon Congratulations on having your first Pull Request (PR) merged into the 
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https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-25 Thread via cfe-commits

https://github.com/sstefan1 closed 
https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-24 Thread Alexey Gerenkov via cfe-commits

https://github.com/gerekon updated 
https://github.com/llvm/llvm-project/pull/118008

>From 55b08ec540d18d50011ef9fb0e301e1f7650ca9e Mon Sep 17 00:00:00 2001
From: Andrei Safronov 
Date: Thu, 1 Jun 2023 00:42:37 +0300
Subject: [PATCH] [Clang][Xtensa] Add Xtensa target.

---
 clang/include/clang/Basic/TargetInfo.h |   9 +-
 clang/lib/AST/ASTContext.cpp   |  39 
 clang/lib/Basic/CMakeLists.txt |   1 +
 clang/lib/Basic/Targets.cpp|   4 +
 clang/lib/Basic/Targets/Xtensa.cpp |  35 +++
 clang/lib/Basic/Targets/Xtensa.h   | 111 +
 clang/lib/Driver/ToolChains/CommonArgs.cpp |   5 +
 clang/test/Preprocessor/init.c | 249 +
 clang/test/Preprocessor/stdint.c   | 107 +
 9 files changed, 559 insertions(+), 1 deletion(-)
 create mode 100644 clang/lib/Basic/Targets/Xtensa.cpp
 create mode 100644 clang/lib/Basic/Targets/Xtensa.h

diff --git a/clang/include/clang/Basic/TargetInfo.h 
b/clang/include/clang/Basic/TargetInfo.h
index 82bd537b242c1c..f2905f30a7c34b 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -358,7 +358,14 @@ class TargetInfo : public TransferrableTargetInfo,
 //void *__saved_reg_area_end_pointer;
 //void *__overflow_area_pointer;
 //} va_list;
-HexagonBuiltinVaList
+HexagonBuiltinVaList,
+
+// typedef struct __va_list_tag {
+//int* __va_stk;
+//int* __va_reg;
+//int __va_ndx;
+//} va_list;
+XtensaABIBuiltinVaList
   };
 
 protected:
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 6ec927e13a7552..8b4ae58e8427a9 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -9751,6 +9751,43 @@ static TypedefDecl *CreateHexagonBuiltinVaListDecl(const 
ASTContext *Context) {
   return Context->buildImplicitTypedef(VaListTagArrayType, 
"__builtin_va_list");
 }
 
+static TypedefDecl *
+CreateXtensaABIBuiltinVaListDecl(const ASTContext *Context) {
+  // typedef struct __va_list_tag {
+  RecordDecl *VaListTagDecl = Context->buildImplicitRecord("__va_list_tag");
+
+  VaListTagDecl->startDefinition();
+
+  // int* __va_stk;
+  // int* __va_reg;
+  // int __va_ndx;
+  constexpr size_t NumFields = 3;
+  QualType FieldTypes[NumFields] = {Context->getPointerType(Context->IntTy),
+Context->getPointerType(Context->IntTy),
+Context->IntTy};
+  const char *FieldNames[NumFields] = {"__va_stk", "__va_reg", "__va_ndx"};
+
+  // Create fields
+  for (unsigned i = 0; i < NumFields; ++i) {
+FieldDecl *Field = FieldDecl::Create(
+*Context, VaListTagDecl, SourceLocation(), SourceLocation(),
+&Context->Idents.get(FieldNames[i]), FieldTypes[i], /*TInfo=*/nullptr,
+/*BitWidth=*/nullptr,
+/*Mutable=*/false, ICIS_NoInit);
+Field->setAccess(AS_public);
+VaListTagDecl->addDecl(Field);
+  }
+  VaListTagDecl->completeDefinition();
+  Context->VaListTagDecl = VaListTagDecl;
+  QualType VaListTagType = Context->getRecordType(VaListTagDecl);
+
+  // } __va_list_tag;
+  TypedefDecl *VaListTagTypedefDecl =
+  Context->buildImplicitTypedef(VaListTagType, "__builtin_va_list");
+
+  return VaListTagTypedefDecl;
+}
+
 static TypedefDecl *CreateVaListDecl(const ASTContext *Context,
  TargetInfo::BuiltinVaListKind Kind) {
   switch (Kind) {
@@ -9772,6 +9809,8 @@ static TypedefDecl *CreateVaListDecl(const ASTContext 
*Context,
 return CreateSystemZBuiltinVaListDecl(Context);
   case TargetInfo::HexagonBuiltinVaList:
 return CreateHexagonBuiltinVaListDecl(Context);
+  case TargetInfo::XtensaABIBuiltinVaList:
+return CreateXtensaABIBuiltinVaListDecl(Context);
   }
 
   llvm_unreachable("Unhandled __builtin_va_list type kind");
diff --git a/clang/lib/Basic/CMakeLists.txt b/clang/lib/Basic/CMakeLists.txt
index e11e1ac4a6fa63..331dfbb3f4b67e 100644
--- a/clang/lib/Basic/CMakeLists.txt
+++ b/clang/lib/Basic/CMakeLists.txt
@@ -120,6 +120,7 @@ add_clang_library(clangBasic
   Targets/WebAssembly.cpp
   Targets/X86.cpp
   Targets/XCore.cpp
+  Targets/Xtensa.cpp
   TokenKinds.cpp
   TypeTraits.cpp
   Version.cpp
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index 706a391023b3a3..f44559cb68cdd2 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -40,6 +40,7 @@
 #include "Targets/WebAssembly.h"
 #include "Targets/X86.h"
 #include "Targets/XCore.h"
+#include "Targets/Xtensa.h"
 #include "clang/Basic/Diagnostic.h"
 #include "clang/Basic/DiagnosticFrontend.h"
 #include "llvm/ADT/StringExtras.h"
@@ -743,6 +744,9 @@ std::unique_ptr AllocateTarget(const 
llvm::Triple &Triple,
 default:
 return std::make_unique(Triple, Opts);
 }
+
+  case llvm::Triple::xtensa:
+return std::make_unique(Triple, Opts);
   }
 }
 } // namespace targets
diff --git a/clang/lib/Basic/

[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-17 Thread Alexey Gerenkov via cfe-commits


@@ -0,0 +1,112 @@
+//===--- Xtensa.h - Declare Xtensa target feature support ---*- C++ 
-*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file declares Xtensa TargetInfo objects.
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_XTENSA_H
+#define LLVM_CLANG_LIB_BASIC_TARGETS_XTENSA_H
+
+#include "clang/Basic/TargetInfo.h"
+#include "clang/Basic/TargetOptions.h"
+#include "llvm/ADT/StringSwitch.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/TargetParser/Triple.h"
+
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+namespace clang {
+namespace targets {
+
+class LLVM_LIBRARY_VISIBILITY XtensaTargetInfo : public TargetInfo {
+  static const Builtin::Info BuiltinInfo[];
+
+protected:
+  std::string CPU;
+
+public:
+  XtensaTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
+  : TargetInfo(Triple) {
+// no big-endianess support yet
+BigEndian = false;
+NoAsmVariants = true;
+LongLongAlign = 64;
+SuitableAlign = 32;
+DoubleAlign = LongDoubleAlign = 64;
+SizeType = UnsignedInt;
+PtrDiffType = SignedInt;
+IntPtrType = SignedInt;
+WCharType = SignedInt;
+WIntType = UnsignedInt;
+UseZeroLengthBitfieldAlignment = true;
+MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
+resetDataLayout("e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32");
+  }
+
+  void getTargetDefines(const LangOptions &Opts,
+MacroBuilder &Builder) const override;
+
+  ArrayRef getTargetBuiltins() const override {
+return std::nullopt;
+  }
+
+  BuiltinVaListKind getBuiltinVaListKind() const override {
+

gerekon wrote:

Fixed

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-17 Thread Alexey Gerenkov via cfe-commits

https://github.com/gerekon updated 
https://github.com/llvm/llvm-project/pull/118008

>From bf0488585f41d3342c5c6d289d4621e3f50195cc Mon Sep 17 00:00:00 2001
From: Andrei Safronov 
Date: Thu, 1 Jun 2023 00:42:37 +0300
Subject: [PATCH 1/3] [Clang][Xtensa] Add Xtensa target.

---
 clang/include/clang/Basic/TargetInfo.h |   5 +-
 clang/lib/AST/ASTContext.cpp   |  47 
 clang/lib/Basic/CMakeLists.txt |   1 +
 clang/lib/Basic/Targets.cpp|   4 +
 clang/lib/Basic/Targets/Xtensa.cpp |  62 +
 clang/lib/Basic/Targets/Xtensa.h   | 141 +++
 clang/lib/Driver/ToolChains/CommonArgs.cpp |   5 +
 clang/test/Preprocessor/init.c | 272 +
 clang/test/Preprocessor/stdint.c   | 107 
 9 files changed, 643 insertions(+), 1 deletion(-)
 create mode 100644 clang/lib/Basic/Targets/Xtensa.cpp
 create mode 100644 clang/lib/Basic/Targets/Xtensa.h

diff --git a/clang/include/clang/Basic/TargetInfo.h 
b/clang/include/clang/Basic/TargetInfo.h
index 9cd23d123f2bac..97444ef28a66d8 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -358,7 +358,10 @@ class TargetInfo : public TransferrableTargetInfo,
 //void *__saved_reg_area_end_pointer;
 //void *__overflow_area_pointer;
 //} va_list;
-HexagonBuiltinVaList
+HexagonBuiltinVaList,
+
+// Tensilica Xtensa
+XtensaABIBuiltinVaList
   };
 
 protected:
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 80e8c5b9df58e7..0f2df53d07e086 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -9727,6 +9727,51 @@ static TypedefDecl *CreateHexagonBuiltinVaListDecl(const 
ASTContext *Context) {
   return Context->buildImplicitTypedef(VaListTagArrayType, 
"__builtin_va_list");
 }
 
+static TypedefDecl *
+CreateXtensaABIBuiltinVaListDecl(const ASTContext *Context) {
+  // typedef struct __va_list_tag {
+  RecordDecl *VaListTagDecl;
+
+  VaListTagDecl = Context->buildImplicitRecord("__va_list_tag");
+  VaListTagDecl->startDefinition();
+
+  const size_t NumFields = 3;
+  QualType FieldTypes[NumFields];
+  const char *FieldNames[NumFields];
+
+  // int* __va_stk;
+  FieldTypes[0] = Context->getPointerType(Context->IntTy);
+  FieldNames[0] = "__va_stk";
+
+  // int* __va_reg;
+  FieldTypes[1] = Context->getPointerType(Context->IntTy);
+  FieldNames[1] = "__va_reg";
+
+  // int __va_ndx;
+  FieldTypes[2] = Context->IntTy;
+  FieldNames[2] = "__va_ndx";
+
+  // Create fields
+  for (unsigned i = 0; i < NumFields; ++i) {
+FieldDecl *Field = FieldDecl::Create(
+*Context, VaListTagDecl, SourceLocation(), SourceLocation(),
+&Context->Idents.get(FieldNames[i]), FieldTypes[i], /*TInfo=*/nullptr,
+/*BitWidth=*/nullptr,
+/*Mutable=*/false, ICIS_NoInit);
+Field->setAccess(AS_public);
+VaListTagDecl->addDecl(Field);
+  }
+  VaListTagDecl->completeDefinition();
+  Context->VaListTagDecl = VaListTagDecl;
+  QualType VaListTagType = Context->getRecordType(VaListTagDecl);
+
+  // } __va_list_tag;
+  TypedefDecl *VaListTagTypedefDecl =
+  Context->buildImplicitTypedef(VaListTagType, "__builtin_va_list");
+
+  return VaListTagTypedefDecl;
+}
+
 static TypedefDecl *CreateVaListDecl(const ASTContext *Context,
  TargetInfo::BuiltinVaListKind Kind) {
   switch (Kind) {
@@ -9748,6 +9793,8 @@ static TypedefDecl *CreateVaListDecl(const ASTContext 
*Context,
 return CreateSystemZBuiltinVaListDecl(Context);
   case TargetInfo::HexagonBuiltinVaList:
 return CreateHexagonBuiltinVaListDecl(Context);
+  case TargetInfo::XtensaABIBuiltinVaList:
+return CreateXtensaABIBuiltinVaListDecl(Context);
   }
 
   llvm_unreachable("Unhandled __builtin_va_list type kind");
diff --git a/clang/lib/Basic/CMakeLists.txt b/clang/lib/Basic/CMakeLists.txt
index e11e1ac4a6fa63..331dfbb3f4b67e 100644
--- a/clang/lib/Basic/CMakeLists.txt
+++ b/clang/lib/Basic/CMakeLists.txt
@@ -120,6 +120,7 @@ add_clang_library(clangBasic
   Targets/WebAssembly.cpp
   Targets/X86.cpp
   Targets/XCore.cpp
+  Targets/Xtensa.cpp
   TokenKinds.cpp
   TypeTraits.cpp
   Version.cpp
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index 0021d33c45d7c9..3ef99acdc2e323 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -40,6 +40,7 @@
 #include "Targets/WebAssembly.h"
 #include "Targets/X86.h"
 #include "Targets/XCore.h"
+#include "Targets/Xtensa.h"
 #include "clang/Basic/Diagnostic.h"
 #include "clang/Basic/DiagnosticFrontend.h"
 #include "llvm/ADT/StringExtras.h"
@@ -737,6 +738,9 @@ std::unique_ptr AllocateTarget(const 
llvm::Triple &Triple,
 default:
 return std::make_unique(Triple, Opts);
 }
+
+  case llvm::Triple::xtensa:
+return std::make_unique(Triple, Opts);
   }
 }
 } // namespace targets
diff --git a/clang/lib/Basic/Targets/Xtensa.cpp 
b/clang/lib/Basic/Targets/Xt

[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-13 Thread Eli Friedman via cfe-commits

https://github.com/efriedma-quic edited 
https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-13 Thread Eli Friedman via cfe-commits


@@ -0,0 +1,112 @@
+//===--- Xtensa.h - Declare Xtensa target feature support ---*- C++ 
-*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file declares Xtensa TargetInfo objects.
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_XTENSA_H
+#define LLVM_CLANG_LIB_BASIC_TARGETS_XTENSA_H
+
+#include "clang/Basic/TargetInfo.h"
+#include "clang/Basic/TargetOptions.h"
+#include "llvm/ADT/StringSwitch.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/TargetParser/Triple.h"
+
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+namespace clang {
+namespace targets {
+
+class LLVM_LIBRARY_VISIBILITY XtensaTargetInfo : public TargetInfo {
+  static const Builtin::Info BuiltinInfo[];
+
+protected:
+  std::string CPU;
+
+public:
+  XtensaTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
+  : TargetInfo(Triple) {
+// no big-endianess support yet
+BigEndian = false;
+NoAsmVariants = true;
+LongLongAlign = 64;
+SuitableAlign = 32;
+DoubleAlign = LongDoubleAlign = 64;
+SizeType = UnsignedInt;
+PtrDiffType = SignedInt;
+IntPtrType = SignedInt;
+WCharType = SignedInt;
+WIntType = UnsignedInt;
+UseZeroLengthBitfieldAlignment = true;
+MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
+resetDataLayout("e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32");
+  }
+
+  void getTargetDefines(const LangOptions &Opts,
+MacroBuilder &Builder) const override;
+
+  ArrayRef getTargetBuiltins() const override {
+return std::nullopt;
+  }
+
+  BuiltinVaListKind getBuiltinVaListKind() const override {
+

efriedma-quic wrote:

Extra newline

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-13 Thread Eli Friedman via cfe-commits

https://github.com/efriedma-quic approved this pull request.

LGTM with one very minor comment

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-12 Thread Alexey Gerenkov via cfe-commits


@@ -2742,3 +2742,275 @@
 // RISCV64-LINUX: #define __unix__ 1
 // RISCV64-LINUX: #define linux 1
 // RISCV64-LINUX: #define unix 1
+
+// RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 -triple=xtensa  
< /dev/null \
+// RUN:   | FileCheck -match-full-lines -check-prefix=XTENSA %s
+// XTENSA: #define _ILP32 1
+// XTENSA: #define __ATOMIC_ACQUIRE 2
+// XTENSA: #define __ATOMIC_ACQ_REL 4
+// XTENSA: #define __ATOMIC_CONSUME 1
+// XTENSA: #define __ATOMIC_RELAXED 0
+// XTENSA: #define __ATOMIC_RELEASE 3
+// XTENSA: #define __ATOMIC_SEQ_CST 5
+// XTENSA: #define __BIGGEST_ALIGNMENT__ 4
+// XTENSA: #define __BITINT_MAXWIDTH__ 128
+// XTENSA: #define __BOOL_WIDTH__ 1
+// XTENSA: #define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__
+// XTENSA: #define __CHAR16_TYPE__ unsigned short
+// XTENSA: #define __CHAR32_TYPE__ unsigned int
+// XTENSA: #define __CHAR_BIT__ 8
+// XTENSA: #define __CLANG_ATOMIC_BOOL_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_CHAR16_T_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_CHAR32_T_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_CHAR_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_INT_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_LLONG_LOCK_FREE 1
+// XTENSA: #define __CLANG_ATOMIC_LONG_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_POINTER_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_SHORT_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_WCHAR_T_LOCK_FREE 2
+// XTENSA: #define __CONSTANT_CFSTRINGS__ 1
+// XTENSA: #define __DBL_DECIMAL_DIG__ 17
+// XTENSA: #define __DBL_DENORM_MIN__ 4.9406564584124654e-324
+// XTENSA: #define __DBL_DIG__ 15
+// XTENSA: #define __DBL_EPSILON__ 2.2204460492503131e-16
+// XTENSA: #define __DBL_HAS_DENORM__ 1
+// XTENSA: #define __DBL_HAS_INFINITY__ 1
+// XTENSA: #define __DBL_HAS_QUIET_NAN__ 1
+// XTENSA: #define __DBL_MANT_DIG__ 53
+// XTENSA: #define __DBL_MAX_10_EXP__ 308
+// XTENSA: #define __DBL_MAX_EXP__ 1024
+// XTENSA: #define __DBL_MAX__ 1.7976931348623157e+308
+// XTENSA: #define __DBL_MIN_10_EXP__ (-307)
+// XTENSA: #define __DBL_MIN_EXP__ (-1021)
+// XTENSA: #define __DBL_MIN__ 2.2250738585072014e-308
+// XTENSA: #define __DBL_NORM_MAX__ 1.7976931348623157e+308
+// XTENSA: #define __DECIMAL_DIG__ __LDBL_DECIMAL_DIG__
+// XTENSA: #define __ELF__ 1
+// XTENSA: #define __FINITE_MATH_ONLY__ 0
+// XTENSA: #define __FLT_DECIMAL_DIG__ 9
+// XTENSA: #define __FLT_DENORM_MIN__ 1.40129846e-45F
+// XTENSA: #define __FLT_DIG__ 6
+// XTENSA: #define __FLT_EPSILON__ 1.19209290e-7F
+// XTENSA: #define __FLT_HAS_DENORM__ 1
+// XTENSA: #define __FLT_HAS_INFINITY__ 1
+// XTENSA: #define __FLT_HAS_QUIET_NAN__ 1
+// XTENSA: #define __FLT_MANT_DIG__ 24
+// XTENSA: #define __FLT_MAX_10_EXP__ 38
+// XTENSA: #define __FLT_MAX_EXP__ 128
+// XTENSA: #define __FLT_MAX__ 3.40282347e+38F
+// XTENSA: #define __FLT_MIN_10_EXP__ (-37)
+// XTENSA: #define __FLT_MIN_EXP__ (-125)
+// XTENSA: #define __FLT_MIN__ 1.17549435e-38F
+// XTENSA: #define __FLT_NORM_MAX__ 3.40282347e+38F
+// XTENSA: #define __FLT_RADIX__ 2
+// XTENSA: #define __FPCLASS_NEGINF 0x0004
+// XTENSA: #define __FPCLASS_NEGNORMAL 0x0008
+// XTENSA: #define __FPCLASS_NEGSUBNORMAL 0x0010
+// XTENSA: #define __FPCLASS_NEGZERO 0x0020
+// XTENSA: #define __FPCLASS_POSINF 0x0200
+// XTENSA: #define __FPCLASS_POSNORMAL 0x0100
+// XTENSA: #define __FPCLASS_POSSUBNORMAL 0x0080
+// XTENSA: #define __FPCLASS_POSZERO 0x0040
+// XTENSA: #define __FPCLASS_QNAN 0x0002
+// XTENSA: #define __FPCLASS_SNAN 0x0001
+// XTENSA: #define __GCC_ATOMIC_BOOL_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_CHAR16_T_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_CHAR32_T_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_CHAR_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_INT_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_LLONG_LOCK_FREE 1
+// XTENSA: #define __GCC_ATOMIC_LONG_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_POINTER_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_SHORT_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1
+// XTENSA: #define __GCC_ATOMIC_WCHAR_T_LOCK_FREE 2
+// XTENSA: #define __GCC_CONSTRUCTIVE_SIZE 64
+// XTENSA: #define __GCC_DESTRUCTIVE_SIZE 64
+// XTENSA: #define __GNUC_MINOR__ {{.*}}
+// XTENSA: #define __GNUC_PATCHLEVEL__ {{.*}}
+// XTENSA: #define __GNUC_STDC_INLINE__ 1
+// XTENSA: #define __GNUC__ {{.*}}
+// XTENSA: #define __GXX_ABI_VERSION {{.*}}
+// XTENSA: #define __ILP32__ 1
+// XTENSA: #define __INT16_C_SUFFIX__ 
+// XTENSA: #define __INT16_MAX__ 32767
+// XTENSA: #define __INT16_TYPE__ short
+// XTENSA: #define __INT32_C_SUFFIX__ 
+// XTENSA: #define __INT32_MAX__ 2147483647
+// XTENSA: #define __INT32_TYPE__ int
+// XTENSA: #define __INT64_C_SUFFIX__ LL
+// XTENSA: #define __INT64_MAX__ 9223372036854775807LL
+// XTENSA: #define __INT64_TYPE__ long long int
+// XTENSA: #define __INT8_C_SUFFIX__ 
+// XTENSA: #define __INT8_MAX__ 127
+// XTENSA: #define __INT8_TYPE__ signed char
+// XTENSA: #define __INTMAX_C_SUFFIX__ LL
+// XTENSA: #define __INTMAX_MAX__ 9223372036854775807L

[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-12 Thread Alexey Gerenkov via cfe-commits


@@ -0,0 +1,141 @@
+//===--- Xtensa.h - Declare Xtensa target feature support ---*- C++ 
-*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file declares Xtensa TargetInfo objects.
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_XTENSA_H
+#define LLVM_CLANG_LIB_BASIC_TARGETS_XTENSA_H
+
+#include "clang/Basic/TargetInfo.h"
+#include "clang/Basic/TargetOptions.h"
+#include "llvm/ADT/StringSwitch.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/TargetParser/Triple.h"
+
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+namespace clang {
+namespace targets {
+
+class LLVM_LIBRARY_VISIBILITY XtensaTargetInfo : public TargetInfo {
+  static const Builtin::Info BuiltinInfo[];
+
+protected:
+  std::string CPU;
+  bool HasFP = false;

gerekon wrote:

fixed

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-12 Thread Alexey Gerenkov via cfe-commits


@@ -9727,6 +9727,51 @@ static TypedefDecl *CreateHexagonBuiltinVaListDecl(const 
ASTContext *Context) {
   return Context->buildImplicitTypedef(VaListTagArrayType, 
"__builtin_va_list");
 }
 
+static TypedefDecl *
+CreateXtensaABIBuiltinVaListDecl(const ASTContext *Context) {
+  // typedef struct __va_list_tag {
+  RecordDecl *VaListTagDecl;
+
+  VaListTagDecl = Context->buildImplicitRecord("__va_list_tag");
+  VaListTagDecl->startDefinition();
+
+  const size_t NumFields = 3;

gerekon wrote:

fixed

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-12 Thread Alexey Gerenkov via cfe-commits


@@ -0,0 +1,62 @@
+//===--- Xtensa.cpp - Implement Xtensa target feature support 
-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file implements Xtensa TargetInfo objects.
+//
+//===--===//
+
+#include "Xtensa.h"
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+using namespace clang;
+using namespace clang::targets;
+
+void XtensaTargetInfo::getTargetDefines(const LangOptions &Opts,
+MacroBuilder &Builder) const {
+  Builder.defineMacro("__xtensa__");
+  Builder.defineMacro("__XTENSA__");
+  if (BigEndian)

gerekon wrote:

fixed

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-12 Thread Alexey Gerenkov via cfe-commits


@@ -9727,6 +9727,51 @@ static TypedefDecl *CreateHexagonBuiltinVaListDecl(const 
ASTContext *Context) {
   return Context->buildImplicitTypedef(VaListTagArrayType, 
"__builtin_va_list");
 }
 
+static TypedefDecl *
+CreateXtensaABIBuiltinVaListDecl(const ASTContext *Context) {
+  // typedef struct __va_list_tag {
+  RecordDecl *VaListTagDecl;

gerekon wrote:

fixed

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-12 Thread Alexey Gerenkov via cfe-commits


@@ -358,7 +358,10 @@ class TargetInfo : public TransferrableTargetInfo,
 //void *__saved_reg_area_end_pointer;
 //void *__overflow_area_pointer;
 //} va_list;
-HexagonBuiltinVaList
+HexagonBuiltinVaList,
+
+// Tensilica Xtensa
+XtensaABIBuiltinVaList

gerekon wrote:

fixed

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-12 Thread Alexey Gerenkov via cfe-commits


@@ -9727,6 +9727,51 @@ static TypedefDecl *CreateHexagonBuiltinVaListDecl(const 
ASTContext *Context) {
   return Context->buildImplicitTypedef(VaListTagArrayType, 
"__builtin_va_list");
 }
 
+static TypedefDecl *
+CreateXtensaABIBuiltinVaListDecl(const ASTContext *Context) {
+  // typedef struct __va_list_tag {
+  RecordDecl *VaListTagDecl;
+
+  VaListTagDecl = Context->buildImplicitRecord("__va_list_tag");
+  VaListTagDecl->startDefinition();
+
+  const size_t NumFields = 3;
+  QualType FieldTypes[NumFields];

gerekon wrote:

fixed

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-12 Thread Alexey Gerenkov via cfe-commits

https://github.com/gerekon updated 
https://github.com/llvm/llvm-project/pull/118008

>From bf0488585f41d3342c5c6d289d4621e3f50195cc Mon Sep 17 00:00:00 2001
From: Andrei Safronov 
Date: Thu, 1 Jun 2023 00:42:37 +0300
Subject: [PATCH 1/2] [Clang][Xtensa] Add Xtensa target.

---
 clang/include/clang/Basic/TargetInfo.h |   5 +-
 clang/lib/AST/ASTContext.cpp   |  47 
 clang/lib/Basic/CMakeLists.txt |   1 +
 clang/lib/Basic/Targets.cpp|   4 +
 clang/lib/Basic/Targets/Xtensa.cpp |  62 +
 clang/lib/Basic/Targets/Xtensa.h   | 141 +++
 clang/lib/Driver/ToolChains/CommonArgs.cpp |   5 +
 clang/test/Preprocessor/init.c | 272 +
 clang/test/Preprocessor/stdint.c   | 107 
 9 files changed, 643 insertions(+), 1 deletion(-)
 create mode 100644 clang/lib/Basic/Targets/Xtensa.cpp
 create mode 100644 clang/lib/Basic/Targets/Xtensa.h

diff --git a/clang/include/clang/Basic/TargetInfo.h 
b/clang/include/clang/Basic/TargetInfo.h
index 9cd23d123f2bac..97444ef28a66d8 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -358,7 +358,10 @@ class TargetInfo : public TransferrableTargetInfo,
 //void *__saved_reg_area_end_pointer;
 //void *__overflow_area_pointer;
 //} va_list;
-HexagonBuiltinVaList
+HexagonBuiltinVaList,
+
+// Tensilica Xtensa
+XtensaABIBuiltinVaList
   };
 
 protected:
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 80e8c5b9df58e7..0f2df53d07e086 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -9727,6 +9727,51 @@ static TypedefDecl *CreateHexagonBuiltinVaListDecl(const 
ASTContext *Context) {
   return Context->buildImplicitTypedef(VaListTagArrayType, 
"__builtin_va_list");
 }
 
+static TypedefDecl *
+CreateXtensaABIBuiltinVaListDecl(const ASTContext *Context) {
+  // typedef struct __va_list_tag {
+  RecordDecl *VaListTagDecl;
+
+  VaListTagDecl = Context->buildImplicitRecord("__va_list_tag");
+  VaListTagDecl->startDefinition();
+
+  const size_t NumFields = 3;
+  QualType FieldTypes[NumFields];
+  const char *FieldNames[NumFields];
+
+  // int* __va_stk;
+  FieldTypes[0] = Context->getPointerType(Context->IntTy);
+  FieldNames[0] = "__va_stk";
+
+  // int* __va_reg;
+  FieldTypes[1] = Context->getPointerType(Context->IntTy);
+  FieldNames[1] = "__va_reg";
+
+  // int __va_ndx;
+  FieldTypes[2] = Context->IntTy;
+  FieldNames[2] = "__va_ndx";
+
+  // Create fields
+  for (unsigned i = 0; i < NumFields; ++i) {
+FieldDecl *Field = FieldDecl::Create(
+*Context, VaListTagDecl, SourceLocation(), SourceLocation(),
+&Context->Idents.get(FieldNames[i]), FieldTypes[i], /*TInfo=*/nullptr,
+/*BitWidth=*/nullptr,
+/*Mutable=*/false, ICIS_NoInit);
+Field->setAccess(AS_public);
+VaListTagDecl->addDecl(Field);
+  }
+  VaListTagDecl->completeDefinition();
+  Context->VaListTagDecl = VaListTagDecl;
+  QualType VaListTagType = Context->getRecordType(VaListTagDecl);
+
+  // } __va_list_tag;
+  TypedefDecl *VaListTagTypedefDecl =
+  Context->buildImplicitTypedef(VaListTagType, "__builtin_va_list");
+
+  return VaListTagTypedefDecl;
+}
+
 static TypedefDecl *CreateVaListDecl(const ASTContext *Context,
  TargetInfo::BuiltinVaListKind Kind) {
   switch (Kind) {
@@ -9748,6 +9793,8 @@ static TypedefDecl *CreateVaListDecl(const ASTContext 
*Context,
 return CreateSystemZBuiltinVaListDecl(Context);
   case TargetInfo::HexagonBuiltinVaList:
 return CreateHexagonBuiltinVaListDecl(Context);
+  case TargetInfo::XtensaABIBuiltinVaList:
+return CreateXtensaABIBuiltinVaListDecl(Context);
   }
 
   llvm_unreachable("Unhandled __builtin_va_list type kind");
diff --git a/clang/lib/Basic/CMakeLists.txt b/clang/lib/Basic/CMakeLists.txt
index e11e1ac4a6fa63..331dfbb3f4b67e 100644
--- a/clang/lib/Basic/CMakeLists.txt
+++ b/clang/lib/Basic/CMakeLists.txt
@@ -120,6 +120,7 @@ add_clang_library(clangBasic
   Targets/WebAssembly.cpp
   Targets/X86.cpp
   Targets/XCore.cpp
+  Targets/Xtensa.cpp
   TokenKinds.cpp
   TypeTraits.cpp
   Version.cpp
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index 0021d33c45d7c9..3ef99acdc2e323 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -40,6 +40,7 @@
 #include "Targets/WebAssembly.h"
 #include "Targets/X86.h"
 #include "Targets/XCore.h"
+#include "Targets/Xtensa.h"
 #include "clang/Basic/Diagnostic.h"
 #include "clang/Basic/DiagnosticFrontend.h"
 #include "llvm/ADT/StringExtras.h"
@@ -737,6 +738,9 @@ std::unique_ptr AllocateTarget(const 
llvm::Triple &Triple,
 default:
 return std::make_unique(Triple, Opts);
 }
+
+  case llvm::Triple::xtensa:
+return std::make_unique(Triple, Opts);
   }
 }
 } // namespace targets
diff --git a/clang/lib/Basic/Targets/Xtensa.cpp 
b/clang/lib/Basic/Targets/Xt

[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-11 Thread Eli Friedman via cfe-commits


@@ -0,0 +1,62 @@
+//===--- Xtensa.cpp - Implement Xtensa target feature support 
-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file implements Xtensa TargetInfo objects.
+//
+//===--===//
+
+#include "Xtensa.h"
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+using namespace clang;
+using namespace clang::targets;
+
+void XtensaTargetInfo::getTargetDefines(const LangOptions &Opts,
+MacroBuilder &Builder) const {
+  Builder.defineMacro("__xtensa__");
+  Builder.defineMacro("__XTENSA__");
+  if (BigEndian)

efriedma-quic wrote:

I think it makes sense to just hardcode `BigEndian = false` for now, and 
revisit in a followup patch.

Something like xtensaeb is what I was thinking, yes.

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-11 Thread Alexey Gerenkov via cfe-commits


@@ -0,0 +1,62 @@
+//===--- Xtensa.cpp - Implement Xtensa target feature support 
-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file implements Xtensa TargetInfo objects.
+//
+//===--===//
+
+#include "Xtensa.h"
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+using namespace clang;
+using namespace clang::targets;
+
+void XtensaTargetInfo::getTargetDefines(const LangOptions &Opts,
+MacroBuilder &Builder) const {
+  Builder.defineMacro("__xtensa__");
+  Builder.defineMacro("__XTENSA__");
+  if (BigEndian)

gerekon wrote:

I can do like it is done in ARM: `xtensa` - little-endian and `xtensaeb` - 
big-endian. But for big endian support I will have to update LLVM Triple code 
also. If that will be acceptable to be a part of this Clang related patch I 
will do it.

Another option is to support `xtensa` only and hard-code `BigEndian = false` 
until the patch with big endianess support if any.

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-11 Thread Alexey Gerenkov via cfe-commits

https://github.com/gerekon edited 
https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-11 Thread Alexey Gerenkov via cfe-commits


@@ -0,0 +1,62 @@
+//===--- Xtensa.cpp - Implement Xtensa target feature support 
-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file implements Xtensa TargetInfo objects.
+//
+//===--===//
+
+#include "Xtensa.h"
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+using namespace clang;
+using namespace clang::targets;
+
+void XtensaTargetInfo::getTargetDefines(const LangOptions &Opts,
+MacroBuilder &Builder) const {
+  Builder.defineMacro("__xtensa__");
+  Builder.defineMacro("__XTENSA__");
+  if (BigEndian)

gerekon wrote:

Sorry. Do you mean to support for `-triple=xtensale` and `-triple=xtensaeb` and 
have corresponding checks in `clang/test/Preprocessor/init.c`?

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-10 Thread Eli Friedman via cfe-commits


@@ -0,0 +1,141 @@
+//===--- Xtensa.h - Declare Xtensa target feature support ---*- C++ 
-*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file declares Xtensa TargetInfo objects.
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_XTENSA_H
+#define LLVM_CLANG_LIB_BASIC_TARGETS_XTENSA_H
+
+#include "clang/Basic/TargetInfo.h"
+#include "clang/Basic/TargetOptions.h"
+#include "llvm/ADT/StringSwitch.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/TargetParser/Triple.h"
+
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+namespace clang {
+namespace targets {
+
+class LLVM_LIBRARY_VISIBILITY XtensaTargetInfo : public TargetInfo {
+  static const Builtin::Info BuiltinInfo[];
+
+protected:
+  std::string CPU;
+  bool HasFP = false;

efriedma-quic wrote:

Sure, that makes sense.

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-10 Thread Alexey Gerenkov via cfe-commits


@@ -0,0 +1,141 @@
+//===--- Xtensa.h - Declare Xtensa target feature support ---*- C++ 
-*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file declares Xtensa TargetInfo objects.
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_XTENSA_H
+#define LLVM_CLANG_LIB_BASIC_TARGETS_XTENSA_H
+
+#include "clang/Basic/TargetInfo.h"
+#include "clang/Basic/TargetOptions.h"
+#include "llvm/ADT/StringSwitch.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/TargetParser/Triple.h"
+
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+namespace clang {
+namespace targets {
+
+class LLVM_LIBRARY_VISIBILITY XtensaTargetInfo : public TargetInfo {
+  static const Builtin::Info BuiltinInfo[];
+
+protected:
+  std::string CPU;
+  bool HasFP = false;

gerekon wrote:

Yes, but taking into account your suggestion 
(https://github.com/llvm/llvm-project/pull/118008#discussion_r1873880746) maybe 
it makes sense to remove feature flags at all among with compiler defines and 
add them when respective features are implemented.

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-10 Thread Alexey Gerenkov via cfe-commits

gerekon wrote:

Hi guys,

Thanks for you comments.

> I am a little concerned that progress on the upstreaming is moving 
> excessively slowly. what exactly has been happening?

> That said, if there are signs that the target is only sporadically 
> maintained, reaffirming that's not the case would be a good thing, so I think 
> Eli's question is still a good one to get an answer for.

We are maintaining our own [fork of LLVM with Xtensa 
support](https://github.com/espressif/llvm-project) for several years and 
release Clang-based toolchain at least for every major LLVM release.
I agree that our past upstreaming activity looks like sporadic. There are 
several reasons for this:
1) At the very first step it was difficult to find people who could review 
Xtensa arch related part without architecture specification in public. We had 
to prepare our [own version of Xtensa 
specification](https://github.com/espressif/xtensa-isa-doc) basing on the GCC 
and binutils source code available in public. And finally we have planted the 
first base patch set.
2) Lack of enough resources to cover our own internal development needs and 
keep upstreaming process at a good pace.

Now after extending our LLVM team and some sort of "pushing" from our Rust team 
and Swift community we have special assignment in the team for upstreaming 
process. This year we have submitted 13 patches (not including this one):
- [x]  https://github.com/llvm/llvm-project/pull/78548
- [x]  https://github.com/llvm/llvm-project/pull/83280
- [x]  https://github.com/llvm/llvm-project/pull/92960
- [x]  https://github.com/llvm/llvm-project/pull/95256
- [x]  https://github.com/llvm/llvm-project/pull/97017
- [x]  https://github.com/llvm/llvm-project/pull/99981
- [x]  https://github.com/llvm/llvm-project/pull/106053
- [x] https://github.com/llvm/llvm-project/pull/107363
- [x] https://github.com/llvm/llvm-project/pull/108986
- [x] https://github.com/llvm/llvm-project/pull/110292
- [x] https://github.com/llvm/llvm-project/pull/110959
- [x] https://github.com/llvm/llvm-project/pull/113450
- [ ] https://github.com/llvm/llvm-project/pull/117126

We have a 
[plan](https://github.com/espressif/llvm-project/issues/4#issuecomment-2343204459)
 for our upstreaming activity and from this point we can do some patch work in 
parallel. The main upstreaming activity is done by @andreisfr. I created this 
PR and plan to create others especially ones related to Xtensa baremetal 
toolchain support.

So keeping in mind our Rust team (https://github.com/esp-rs/rust/issues/89) and 
Swift community 
(https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458) 
demands and HIFI3 related contribution from @maciej-czekaj it looks like there 
people exist who are interested in having Xtensa support in LLVM. And we are 
going to maintain it.

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-09 Thread Aaron Ballman via cfe-commits

https://github.com/AaronBallman edited 
https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-09 Thread Aaron Ballman via cfe-commits

https://github.com/AaronBallman commented:

I don't know that we need reaffirmation; the target is already in the backend, 
so unless there's a call to remove the target, I think Clang's fine to expose 
it.

That said, if there are signs that the target is only sporadically maintained, 
reaffirming that's not the case would be a good thing, so I think Eli's 
question is still a good one to get an answer for.

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-09 Thread Aaron Ballman via cfe-commits


@@ -2742,3 +2742,275 @@
 // RISCV64-LINUX: #define __unix__ 1
 // RISCV64-LINUX: #define linux 1
 // RISCV64-LINUX: #define unix 1
+
+// RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 -triple=xtensa  
< /dev/null \
+// RUN:   | FileCheck -match-full-lines -check-prefix=XTENSA %s
+// XTENSA: #define _ILP32 1
+// XTENSA: #define __ATOMIC_ACQUIRE 2
+// XTENSA: #define __ATOMIC_ACQ_REL 4
+// XTENSA: #define __ATOMIC_CONSUME 1
+// XTENSA: #define __ATOMIC_RELAXED 0
+// XTENSA: #define __ATOMIC_RELEASE 3
+// XTENSA: #define __ATOMIC_SEQ_CST 5
+// XTENSA: #define __BIGGEST_ALIGNMENT__ 4
+// XTENSA: #define __BITINT_MAXWIDTH__ 128
+// XTENSA: #define __BOOL_WIDTH__ 1
+// XTENSA: #define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__
+// XTENSA: #define __CHAR16_TYPE__ unsigned short
+// XTENSA: #define __CHAR32_TYPE__ unsigned int
+// XTENSA: #define __CHAR_BIT__ 8
+// XTENSA: #define __CLANG_ATOMIC_BOOL_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_CHAR16_T_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_CHAR32_T_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_CHAR_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_INT_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_LLONG_LOCK_FREE 1
+// XTENSA: #define __CLANG_ATOMIC_LONG_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_POINTER_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_SHORT_LOCK_FREE 2
+// XTENSA: #define __CLANG_ATOMIC_WCHAR_T_LOCK_FREE 2
+// XTENSA: #define __CONSTANT_CFSTRINGS__ 1
+// XTENSA: #define __DBL_DECIMAL_DIG__ 17
+// XTENSA: #define __DBL_DENORM_MIN__ 4.9406564584124654e-324
+// XTENSA: #define __DBL_DIG__ 15
+// XTENSA: #define __DBL_EPSILON__ 2.2204460492503131e-16
+// XTENSA: #define __DBL_HAS_DENORM__ 1
+// XTENSA: #define __DBL_HAS_INFINITY__ 1
+// XTENSA: #define __DBL_HAS_QUIET_NAN__ 1
+// XTENSA: #define __DBL_MANT_DIG__ 53
+// XTENSA: #define __DBL_MAX_10_EXP__ 308
+// XTENSA: #define __DBL_MAX_EXP__ 1024
+// XTENSA: #define __DBL_MAX__ 1.7976931348623157e+308
+// XTENSA: #define __DBL_MIN_10_EXP__ (-307)
+// XTENSA: #define __DBL_MIN_EXP__ (-1021)
+// XTENSA: #define __DBL_MIN__ 2.2250738585072014e-308
+// XTENSA: #define __DBL_NORM_MAX__ 1.7976931348623157e+308
+// XTENSA: #define __DECIMAL_DIG__ __LDBL_DECIMAL_DIG__
+// XTENSA: #define __ELF__ 1
+// XTENSA: #define __FINITE_MATH_ONLY__ 0
+// XTENSA: #define __FLT_DECIMAL_DIG__ 9
+// XTENSA: #define __FLT_DENORM_MIN__ 1.40129846e-45F
+// XTENSA: #define __FLT_DIG__ 6
+// XTENSA: #define __FLT_EPSILON__ 1.19209290e-7F
+// XTENSA: #define __FLT_HAS_DENORM__ 1
+// XTENSA: #define __FLT_HAS_INFINITY__ 1
+// XTENSA: #define __FLT_HAS_QUIET_NAN__ 1
+// XTENSA: #define __FLT_MANT_DIG__ 24
+// XTENSA: #define __FLT_MAX_10_EXP__ 38
+// XTENSA: #define __FLT_MAX_EXP__ 128
+// XTENSA: #define __FLT_MAX__ 3.40282347e+38F
+// XTENSA: #define __FLT_MIN_10_EXP__ (-37)
+// XTENSA: #define __FLT_MIN_EXP__ (-125)
+// XTENSA: #define __FLT_MIN__ 1.17549435e-38F
+// XTENSA: #define __FLT_NORM_MAX__ 3.40282347e+38F
+// XTENSA: #define __FLT_RADIX__ 2
+// XTENSA: #define __FPCLASS_NEGINF 0x0004
+// XTENSA: #define __FPCLASS_NEGNORMAL 0x0008
+// XTENSA: #define __FPCLASS_NEGSUBNORMAL 0x0010
+// XTENSA: #define __FPCLASS_NEGZERO 0x0020
+// XTENSA: #define __FPCLASS_POSINF 0x0200
+// XTENSA: #define __FPCLASS_POSNORMAL 0x0100
+// XTENSA: #define __FPCLASS_POSSUBNORMAL 0x0080
+// XTENSA: #define __FPCLASS_POSZERO 0x0040
+// XTENSA: #define __FPCLASS_QNAN 0x0002
+// XTENSA: #define __FPCLASS_SNAN 0x0001
+// XTENSA: #define __GCC_ATOMIC_BOOL_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_CHAR16_T_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_CHAR32_T_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_CHAR_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_INT_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_LLONG_LOCK_FREE 1
+// XTENSA: #define __GCC_ATOMIC_LONG_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_POINTER_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_SHORT_LOCK_FREE 2
+// XTENSA: #define __GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1
+// XTENSA: #define __GCC_ATOMIC_WCHAR_T_LOCK_FREE 2
+// XTENSA: #define __GCC_CONSTRUCTIVE_SIZE 64
+// XTENSA: #define __GCC_DESTRUCTIVE_SIZE 64
+// XTENSA: #define __GNUC_MINOR__ {{.*}}
+// XTENSA: #define __GNUC_PATCHLEVEL__ {{.*}}
+// XTENSA: #define __GNUC_STDC_INLINE__ 1
+// XTENSA: #define __GNUC__ {{.*}}
+// XTENSA: #define __GXX_ABI_VERSION {{.*}}
+// XTENSA: #define __ILP32__ 1
+// XTENSA: #define __INT16_C_SUFFIX__ 
+// XTENSA: #define __INT16_MAX__ 32767
+// XTENSA: #define __INT16_TYPE__ short
+// XTENSA: #define __INT32_C_SUFFIX__ 
+// XTENSA: #define __INT32_MAX__ 2147483647
+// XTENSA: #define __INT32_TYPE__ int
+// XTENSA: #define __INT64_C_SUFFIX__ LL
+// XTENSA: #define __INT64_MAX__ 9223372036854775807LL
+// XTENSA: #define __INT64_TYPE__ long long int
+// XTENSA: #define __INT8_C_SUFFIX__ 
+// XTENSA: #define __INT8_MAX__ 127
+// XTENSA: #define __INT8_TYPE__ signed char
+// XTENSA: #define __INTMAX_C_SUFFIX__ LL
+// XTENSA: #define __INTMAX_MAX__ 9223372036854775807L

[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-09 Thread Aaron Ballman via cfe-commits


@@ -9727,6 +9727,51 @@ static TypedefDecl *CreateHexagonBuiltinVaListDecl(const 
ASTContext *Context) {
   return Context->buildImplicitTypedef(VaListTagArrayType, 
"__builtin_va_list");
 }
 
+static TypedefDecl *
+CreateXtensaABIBuiltinVaListDecl(const ASTContext *Context) {
+  // typedef struct __va_list_tag {
+  RecordDecl *VaListTagDecl;
+
+  VaListTagDecl = Context->buildImplicitRecord("__va_list_tag");
+  VaListTagDecl->startDefinition();
+
+  const size_t NumFields = 3;

AaronBallman wrote:

```suggestion
  constexpr size_t NumFields = 3;
```

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-06 Thread Eli Friedman via cfe-commits


@@ -0,0 +1,141 @@
+//===--- Xtensa.h - Declare Xtensa target feature support ---*- C++ 
-*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file declares Xtensa TargetInfo objects.
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_XTENSA_H
+#define LLVM_CLANG_LIB_BASIC_TARGETS_XTENSA_H
+
+#include "clang/Basic/TargetInfo.h"
+#include "clang/Basic/TargetOptions.h"
+#include "llvm/ADT/StringSwitch.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/TargetParser/Triple.h"
+
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+namespace clang {
+namespace targets {
+
+class LLVM_LIBRARY_VISIBILITY XtensaTargetInfo : public TargetInfo {
+  static const Builtin::Info BuiltinInfo[];
+
+protected:
+  std::string CPU;
+  bool HasFP = false;

efriedma-quic wrote:

I assume you're planning a followup patch at some point to set all these 
feature flags?

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-06 Thread Eli Friedman via cfe-commits


@@ -9727,6 +9727,51 @@ static TypedefDecl *CreateHexagonBuiltinVaListDecl(const 
ASTContext *Context) {
   return Context->buildImplicitTypedef(VaListTagArrayType, 
"__builtin_va_list");
 }
 
+static TypedefDecl *
+CreateXtensaABIBuiltinVaListDecl(const ASTContext *Context) {
+  // typedef struct __va_list_tag {
+  RecordDecl *VaListTagDecl;

efriedma-quic wrote:

```suggestion
  RecordDecl *VaListTagDecl = Context->buildImplicitRecord("__va_list_tag");
```

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-06 Thread Eli Friedman via cfe-commits


@@ -358,7 +358,10 @@ class TargetInfo : public TransferrableTargetInfo,
 //void *__saved_reg_area_end_pointer;
 //void *__overflow_area_pointer;
 //} va_list;
-HexagonBuiltinVaList
+HexagonBuiltinVaList,
+
+// Tensilica Xtensa
+XtensaABIBuiltinVaList

efriedma-quic wrote:

It would be helpful to stick a brief definition of the structure in a comment 
here, for comparison,

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-06 Thread Eli Friedman via cfe-commits


@@ -9727,6 +9727,51 @@ static TypedefDecl *CreateHexagonBuiltinVaListDecl(const 
ASTContext *Context) {
   return Context->buildImplicitTypedef(VaListTagArrayType, 
"__builtin_va_list");
 }
 
+static TypedefDecl *
+CreateXtensaABIBuiltinVaListDecl(const ASTContext *Context) {
+  // typedef struct __va_list_tag {
+  RecordDecl *VaListTagDecl;
+
+  VaListTagDecl = Context->buildImplicitRecord("__va_list_tag");
+  VaListTagDecl->startDefinition();
+
+  const size_t NumFields = 3;
+  QualType FieldTypes[NumFields];

efriedma-quic wrote:

```suggestion
  QualType FieldTypes[] = {Context->getPointerType(Context->IntTy), 
Context->getPointerType(Context->IntTy), Context->IntTy};
```

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-06 Thread Eli Friedman via cfe-commits


@@ -0,0 +1,62 @@
+//===--- Xtensa.cpp - Implement Xtensa target feature support 
-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file implements Xtensa TargetInfo objects.
+//
+//===--===//
+
+#include "Xtensa.h"
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+using namespace clang;
+using namespace clang::targets;
+
+void XtensaTargetInfo::getTargetDefines(const LangOptions &Opts,
+MacroBuilder &Builder) const {
+  Builder.defineMacro("__xtensa__");
+  Builder.defineMacro("__XTENSA__");
+  if (BigEndian)
+Builder.defineMacro("__XTENSA_EB__");
+  else
+Builder.defineMacro("__XTENSA_EL__");
+  if (HasWindowed)
+Builder.defineMacro("__XTENSA_WINDOWED_ABI__");
+  else
+Builder.defineMacro("__XTENSA_CALL0_ABI__");
+  if (!HasFP)
+Builder.defineMacro("__XTENSA_SOFT_FLOAT__");
+  Builder.defineMacro("__XCHAL_HAVE_BE", BigEndian ? "1" : "0");
+  Builder.defineMacro("__XCHAL_HAVE_DENSITY", HasDensity ? "1" : "0");

efriedma-quic wrote:

On most targets, if a feature isn't available, the feature macro isn't defined 
at all.  Defining it to 0 is unusual.

If you need to do it this way for compatibility with existing code, I guess 
that's okay?

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-06 Thread Eli Friedman via cfe-commits


@@ -0,0 +1,62 @@
+//===--- Xtensa.cpp - Implement Xtensa target feature support 
-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file implements Xtensa TargetInfo objects.
+//
+//===--===//
+
+#include "Xtensa.h"
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+using namespace clang;
+using namespace clang::targets;
+
+void XtensaTargetInfo::getTargetDefines(const LangOptions &Opts,
+MacroBuilder &Builder) const {
+  Builder.defineMacro("__xtensa__");
+  Builder.defineMacro("__XTENSA__");
+  if (BigEndian)

efriedma-quic wrote:

On targets which have two endian variants; the endianness is usually part of 
the triple, because there isn't any ABI-compatible subset.

I won't insist on it for an embedded target like this, but you might want to 
consider it.

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-06 Thread Erich Keane via cfe-commits

erichkeane wrote:

> For reference, the RFC for the LLVM backend was 
> https://discourse.llvm.org/t/rfc-request-for-upstream-tensilica-xtensa-esp32-backend/65355
>  . Given there's an LLVM backend, I don't think we need a separate clang RFC? 
> Assuming the target doesn't require any exotic frontend features, we'd 
> inevitably reach the same conclusion as the LLVM backend RFC.
> 
> That said, I am a little concerned that progress on the upstreaming is moving 
> excessively slowly; it's been over two years since the original RFC. New 
> backends don't normally take that long... what exactly has been happening?

I wasn't asking for a separate clang RFC, just I wasn't aware of the previous 
one!  As you mentioned, it was significantly in the past, so I'd not heard of 
it/remembered it, and my quick grepping didn't show the backend.

Given the time/progress so far, I wouldn't mind some sort of re-assertion from 
the community at large that we are a: still interested in this, b: have a 
dedicated someone willing/able to do the work, which is a criteria for our RFCs

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-06 Thread Eli Friedman via cfe-commits

efriedma-quic wrote:

For reference, the RFC for the LLVM backend was 
https://discourse.llvm.org/t/rfc-request-for-upstream-tensilica-xtensa-esp32-backend/65355
 .  Given there's an LLVM backend, I don't think we need a separate clang RFC?  
Assuming the target doesn't require any exotic frontend features, we'd 
inevitably reach the same conclusion as the LLVM backend RFC.

That said, I am a little concerned that progress on the upstreaming is moving 
excessively slowly; it's been over two years since the original RFC.  New 
backends don't normally take that long... what exactly has been happening?

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-06 Thread Alexey Gerenkov via cfe-commits

gerekon wrote:

> I don't know what this target IS, did we have an RFC to approve this in Clang 
> as a target? Do we have sufficient interest in the project to maintain 
> it/keep it?

This is a part of our work for upstreaming Xtensa target support. 
https://github.com/espressif/llvm-project/issues/4
We finished with base functionality in the backend. And now we are preparing 
PRs with Xtensa architecture features.
This patch adds support for Xtensa target in Clang. It'd be strange to have 
backend support in LLVM and do noit have it in Clang.

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-06 Thread Erich Keane via cfe-commits

https://github.com/erichkeane commented:

I don't know what this target IS, did we have an RFC to approve this in Clang 
as a target?  Do we have sufficient interest in the project to maintain it/keep 
it?

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-06 Thread Andrzej Warzyński via cfe-commits

banach-space wrote:

I'm not active in this area, so removed myself from the list of reviewers.

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-12-05 Thread Alexey Gerenkov via cfe-commits

gerekon wrote:

ping

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-11-28 Thread Alexey Gerenkov via cfe-commits

gerekon wrote:

@sstefan1 @andreisfr PTAL

https://github.com/llvm/llvm-project/pull/118008
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[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-11-28 Thread Alexey Gerenkov via cfe-commits

https://github.com/gerekon created 
https://github.com/llvm/llvm-project/pull/118008

This PR implements support for generic Xtensa target in CLang.

>From bf0488585f41d3342c5c6d289d4621e3f50195cc Mon Sep 17 00:00:00 2001
From: Andrei Safronov 
Date: Thu, 1 Jun 2023 00:42:37 +0300
Subject: [PATCH] [Clang][Xtensa] Add Xtensa target.

---
 clang/include/clang/Basic/TargetInfo.h |   5 +-
 clang/lib/AST/ASTContext.cpp   |  47 
 clang/lib/Basic/CMakeLists.txt |   1 +
 clang/lib/Basic/Targets.cpp|   4 +
 clang/lib/Basic/Targets/Xtensa.cpp |  62 +
 clang/lib/Basic/Targets/Xtensa.h   | 141 +++
 clang/lib/Driver/ToolChains/CommonArgs.cpp |   5 +
 clang/test/Preprocessor/init.c | 272 +
 clang/test/Preprocessor/stdint.c   | 107 
 9 files changed, 643 insertions(+), 1 deletion(-)
 create mode 100644 clang/lib/Basic/Targets/Xtensa.cpp
 create mode 100644 clang/lib/Basic/Targets/Xtensa.h

diff --git a/clang/include/clang/Basic/TargetInfo.h 
b/clang/include/clang/Basic/TargetInfo.h
index 9cd23d123f2bac..97444ef28a66d8 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -358,7 +358,10 @@ class TargetInfo : public TransferrableTargetInfo,
 //void *__saved_reg_area_end_pointer;
 //void *__overflow_area_pointer;
 //} va_list;
-HexagonBuiltinVaList
+HexagonBuiltinVaList,
+
+// Tensilica Xtensa
+XtensaABIBuiltinVaList
   };
 
 protected:
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 80e8c5b9df58e7..0f2df53d07e086 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -9727,6 +9727,51 @@ static TypedefDecl *CreateHexagonBuiltinVaListDecl(const 
ASTContext *Context) {
   return Context->buildImplicitTypedef(VaListTagArrayType, 
"__builtin_va_list");
 }
 
+static TypedefDecl *
+CreateXtensaABIBuiltinVaListDecl(const ASTContext *Context) {
+  // typedef struct __va_list_tag {
+  RecordDecl *VaListTagDecl;
+
+  VaListTagDecl = Context->buildImplicitRecord("__va_list_tag");
+  VaListTagDecl->startDefinition();
+
+  const size_t NumFields = 3;
+  QualType FieldTypes[NumFields];
+  const char *FieldNames[NumFields];
+
+  // int* __va_stk;
+  FieldTypes[0] = Context->getPointerType(Context->IntTy);
+  FieldNames[0] = "__va_stk";
+
+  // int* __va_reg;
+  FieldTypes[1] = Context->getPointerType(Context->IntTy);
+  FieldNames[1] = "__va_reg";
+
+  // int __va_ndx;
+  FieldTypes[2] = Context->IntTy;
+  FieldNames[2] = "__va_ndx";
+
+  // Create fields
+  for (unsigned i = 0; i < NumFields; ++i) {
+FieldDecl *Field = FieldDecl::Create(
+*Context, VaListTagDecl, SourceLocation(), SourceLocation(),
+&Context->Idents.get(FieldNames[i]), FieldTypes[i], /*TInfo=*/nullptr,
+/*BitWidth=*/nullptr,
+/*Mutable=*/false, ICIS_NoInit);
+Field->setAccess(AS_public);
+VaListTagDecl->addDecl(Field);
+  }
+  VaListTagDecl->completeDefinition();
+  Context->VaListTagDecl = VaListTagDecl;
+  QualType VaListTagType = Context->getRecordType(VaListTagDecl);
+
+  // } __va_list_tag;
+  TypedefDecl *VaListTagTypedefDecl =
+  Context->buildImplicitTypedef(VaListTagType, "__builtin_va_list");
+
+  return VaListTagTypedefDecl;
+}
+
 static TypedefDecl *CreateVaListDecl(const ASTContext *Context,
  TargetInfo::BuiltinVaListKind Kind) {
   switch (Kind) {
@@ -9748,6 +9793,8 @@ static TypedefDecl *CreateVaListDecl(const ASTContext 
*Context,
 return CreateSystemZBuiltinVaListDecl(Context);
   case TargetInfo::HexagonBuiltinVaList:
 return CreateHexagonBuiltinVaListDecl(Context);
+  case TargetInfo::XtensaABIBuiltinVaList:
+return CreateXtensaABIBuiltinVaListDecl(Context);
   }
 
   llvm_unreachable("Unhandled __builtin_va_list type kind");
diff --git a/clang/lib/Basic/CMakeLists.txt b/clang/lib/Basic/CMakeLists.txt
index e11e1ac4a6fa63..331dfbb3f4b67e 100644
--- a/clang/lib/Basic/CMakeLists.txt
+++ b/clang/lib/Basic/CMakeLists.txt
@@ -120,6 +120,7 @@ add_clang_library(clangBasic
   Targets/WebAssembly.cpp
   Targets/X86.cpp
   Targets/XCore.cpp
+  Targets/Xtensa.cpp
   TokenKinds.cpp
   TypeTraits.cpp
   Version.cpp
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index 0021d33c45d7c9..3ef99acdc2e323 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -40,6 +40,7 @@
 #include "Targets/WebAssembly.h"
 #include "Targets/X86.h"
 #include "Targets/XCore.h"
+#include "Targets/Xtensa.h"
 #include "clang/Basic/Diagnostic.h"
 #include "clang/Basic/DiagnosticFrontend.h"
 #include "llvm/ADT/StringExtras.h"
@@ -737,6 +738,9 @@ std::unique_ptr AllocateTarget(const 
llvm::Triple &Triple,
 default:
 return std::make_unique(Triple, Opts);
 }
+
+  case llvm::Triple::xtensa:
+return std::make_unique(Triple, Opts);
   }
 }
 } // namespace targets
diff --git a/clan

[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-11-28 Thread via cfe-commits

llvmbot wrote:




@llvm/pr-subscribers-clang-driver

Author: Alexey Gerenkov (gerekon)


Changes

This PR implements support for generic Xtensa target in CLang.

---

Patch is 28.35 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/118008.diff


9 Files Affected:

- (modified) clang/include/clang/Basic/TargetInfo.h (+4-1) 
- (modified) clang/lib/AST/ASTContext.cpp (+47) 
- (modified) clang/lib/Basic/CMakeLists.txt (+1) 
- (modified) clang/lib/Basic/Targets.cpp (+4) 
- (added) clang/lib/Basic/Targets/Xtensa.cpp (+62) 
- (added) clang/lib/Basic/Targets/Xtensa.h (+141) 
- (modified) clang/lib/Driver/ToolChains/CommonArgs.cpp (+5) 
- (modified) clang/test/Preprocessor/init.c (+272) 
- (modified) clang/test/Preprocessor/stdint.c (+107) 


``diff
diff --git a/clang/include/clang/Basic/TargetInfo.h 
b/clang/include/clang/Basic/TargetInfo.h
index 9cd23d123f2bac..97444ef28a66d8 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -358,7 +358,10 @@ class TargetInfo : public TransferrableTargetInfo,
 //void *__saved_reg_area_end_pointer;
 //void *__overflow_area_pointer;
 //} va_list;
-HexagonBuiltinVaList
+HexagonBuiltinVaList,
+
+// Tensilica Xtensa
+XtensaABIBuiltinVaList
   };
 
 protected:
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 80e8c5b9df58e7..0f2df53d07e086 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -9727,6 +9727,51 @@ static TypedefDecl *CreateHexagonBuiltinVaListDecl(const 
ASTContext *Context) {
   return Context->buildImplicitTypedef(VaListTagArrayType, 
"__builtin_va_list");
 }
 
+static TypedefDecl *
+CreateXtensaABIBuiltinVaListDecl(const ASTContext *Context) {
+  // typedef struct __va_list_tag {
+  RecordDecl *VaListTagDecl;
+
+  VaListTagDecl = Context->buildImplicitRecord("__va_list_tag");
+  VaListTagDecl->startDefinition();
+
+  const size_t NumFields = 3;
+  QualType FieldTypes[NumFields];
+  const char *FieldNames[NumFields];
+
+  // int* __va_stk;
+  FieldTypes[0] = Context->getPointerType(Context->IntTy);
+  FieldNames[0] = "__va_stk";
+
+  // int* __va_reg;
+  FieldTypes[1] = Context->getPointerType(Context->IntTy);
+  FieldNames[1] = "__va_reg";
+
+  // int __va_ndx;
+  FieldTypes[2] = Context->IntTy;
+  FieldNames[2] = "__va_ndx";
+
+  // Create fields
+  for (unsigned i = 0; i < NumFields; ++i) {
+FieldDecl *Field = FieldDecl::Create(
+*Context, VaListTagDecl, SourceLocation(), SourceLocation(),
+&Context->Idents.get(FieldNames[i]), FieldTypes[i], /*TInfo=*/nullptr,
+/*BitWidth=*/nullptr,
+/*Mutable=*/false, ICIS_NoInit);
+Field->setAccess(AS_public);
+VaListTagDecl->addDecl(Field);
+  }
+  VaListTagDecl->completeDefinition();
+  Context->VaListTagDecl = VaListTagDecl;
+  QualType VaListTagType = Context->getRecordType(VaListTagDecl);
+
+  // } __va_list_tag;
+  TypedefDecl *VaListTagTypedefDecl =
+  Context->buildImplicitTypedef(VaListTagType, "__builtin_va_list");
+
+  return VaListTagTypedefDecl;
+}
+
 static TypedefDecl *CreateVaListDecl(const ASTContext *Context,
  TargetInfo::BuiltinVaListKind Kind) {
   switch (Kind) {
@@ -9748,6 +9793,8 @@ static TypedefDecl *CreateVaListDecl(const ASTContext 
*Context,
 return CreateSystemZBuiltinVaListDecl(Context);
   case TargetInfo::HexagonBuiltinVaList:
 return CreateHexagonBuiltinVaListDecl(Context);
+  case TargetInfo::XtensaABIBuiltinVaList:
+return CreateXtensaABIBuiltinVaListDecl(Context);
   }
 
   llvm_unreachable("Unhandled __builtin_va_list type kind");
diff --git a/clang/lib/Basic/CMakeLists.txt b/clang/lib/Basic/CMakeLists.txt
index e11e1ac4a6fa63..331dfbb3f4b67e 100644
--- a/clang/lib/Basic/CMakeLists.txt
+++ b/clang/lib/Basic/CMakeLists.txt
@@ -120,6 +120,7 @@ add_clang_library(clangBasic
   Targets/WebAssembly.cpp
   Targets/X86.cpp
   Targets/XCore.cpp
+  Targets/Xtensa.cpp
   TokenKinds.cpp
   TypeTraits.cpp
   Version.cpp
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index 0021d33c45d7c9..3ef99acdc2e323 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -40,6 +40,7 @@
 #include "Targets/WebAssembly.h"
 #include "Targets/X86.h"
 #include "Targets/XCore.h"
+#include "Targets/Xtensa.h"
 #include "clang/Basic/Diagnostic.h"
 #include "clang/Basic/DiagnosticFrontend.h"
 #include "llvm/ADT/StringExtras.h"
@@ -737,6 +738,9 @@ std::unique_ptr AllocateTarget(const 
llvm::Triple &Triple,
 default:
 return std::make_unique(Triple, Opts);
 }
+
+  case llvm::Triple::xtensa:
+return std::make_unique(Triple, Opts);
   }
 }
 } // namespace targets
diff --git a/clang/lib/Basic/Targets/Xtensa.cpp 
b/clang/lib/Basic/Targets/Xtensa.cpp
new file mode 100644
index 00..b46db6bfbd67ac
--- /dev/null
+++ b/clang/lib/Basic/Targets/Xtensa.cpp
@@ -0,0 +1,62 @@
+//===--- X

[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-11-28 Thread via cfe-commits

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Alexey Gerenkov (gerekon)


Changes

This PR implements support for generic Xtensa target in CLang.

---

Patch is 28.35 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/118008.diff


9 Files Affected:

- (modified) clang/include/clang/Basic/TargetInfo.h (+4-1) 
- (modified) clang/lib/AST/ASTContext.cpp (+47) 
- (modified) clang/lib/Basic/CMakeLists.txt (+1) 
- (modified) clang/lib/Basic/Targets.cpp (+4) 
- (added) clang/lib/Basic/Targets/Xtensa.cpp (+62) 
- (added) clang/lib/Basic/Targets/Xtensa.h (+141) 
- (modified) clang/lib/Driver/ToolChains/CommonArgs.cpp (+5) 
- (modified) clang/test/Preprocessor/init.c (+272) 
- (modified) clang/test/Preprocessor/stdint.c (+107) 


``diff
diff --git a/clang/include/clang/Basic/TargetInfo.h 
b/clang/include/clang/Basic/TargetInfo.h
index 9cd23d123f2bac..97444ef28a66d8 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -358,7 +358,10 @@ class TargetInfo : public TransferrableTargetInfo,
 //void *__saved_reg_area_end_pointer;
 //void *__overflow_area_pointer;
 //} va_list;
-HexagonBuiltinVaList
+HexagonBuiltinVaList,
+
+// Tensilica Xtensa
+XtensaABIBuiltinVaList
   };
 
 protected:
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 80e8c5b9df58e7..0f2df53d07e086 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -9727,6 +9727,51 @@ static TypedefDecl *CreateHexagonBuiltinVaListDecl(const 
ASTContext *Context) {
   return Context->buildImplicitTypedef(VaListTagArrayType, 
"__builtin_va_list");
 }
 
+static TypedefDecl *
+CreateXtensaABIBuiltinVaListDecl(const ASTContext *Context) {
+  // typedef struct __va_list_tag {
+  RecordDecl *VaListTagDecl;
+
+  VaListTagDecl = Context->buildImplicitRecord("__va_list_tag");
+  VaListTagDecl->startDefinition();
+
+  const size_t NumFields = 3;
+  QualType FieldTypes[NumFields];
+  const char *FieldNames[NumFields];
+
+  // int* __va_stk;
+  FieldTypes[0] = Context->getPointerType(Context->IntTy);
+  FieldNames[0] = "__va_stk";
+
+  // int* __va_reg;
+  FieldTypes[1] = Context->getPointerType(Context->IntTy);
+  FieldNames[1] = "__va_reg";
+
+  // int __va_ndx;
+  FieldTypes[2] = Context->IntTy;
+  FieldNames[2] = "__va_ndx";
+
+  // Create fields
+  for (unsigned i = 0; i < NumFields; ++i) {
+FieldDecl *Field = FieldDecl::Create(
+*Context, VaListTagDecl, SourceLocation(), SourceLocation(),
+&Context->Idents.get(FieldNames[i]), FieldTypes[i], /*TInfo=*/nullptr,
+/*BitWidth=*/nullptr,
+/*Mutable=*/false, ICIS_NoInit);
+Field->setAccess(AS_public);
+VaListTagDecl->addDecl(Field);
+  }
+  VaListTagDecl->completeDefinition();
+  Context->VaListTagDecl = VaListTagDecl;
+  QualType VaListTagType = Context->getRecordType(VaListTagDecl);
+
+  // } __va_list_tag;
+  TypedefDecl *VaListTagTypedefDecl =
+  Context->buildImplicitTypedef(VaListTagType, "__builtin_va_list");
+
+  return VaListTagTypedefDecl;
+}
+
 static TypedefDecl *CreateVaListDecl(const ASTContext *Context,
  TargetInfo::BuiltinVaListKind Kind) {
   switch (Kind) {
@@ -9748,6 +9793,8 @@ static TypedefDecl *CreateVaListDecl(const ASTContext 
*Context,
 return CreateSystemZBuiltinVaListDecl(Context);
   case TargetInfo::HexagonBuiltinVaList:
 return CreateHexagonBuiltinVaListDecl(Context);
+  case TargetInfo::XtensaABIBuiltinVaList:
+return CreateXtensaABIBuiltinVaListDecl(Context);
   }
 
   llvm_unreachable("Unhandled __builtin_va_list type kind");
diff --git a/clang/lib/Basic/CMakeLists.txt b/clang/lib/Basic/CMakeLists.txt
index e11e1ac4a6fa63..331dfbb3f4b67e 100644
--- a/clang/lib/Basic/CMakeLists.txt
+++ b/clang/lib/Basic/CMakeLists.txt
@@ -120,6 +120,7 @@ add_clang_library(clangBasic
   Targets/WebAssembly.cpp
   Targets/X86.cpp
   Targets/XCore.cpp
+  Targets/Xtensa.cpp
   TokenKinds.cpp
   TypeTraits.cpp
   Version.cpp
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index 0021d33c45d7c9..3ef99acdc2e323 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -40,6 +40,7 @@
 #include "Targets/WebAssembly.h"
 #include "Targets/X86.h"
 #include "Targets/XCore.h"
+#include "Targets/Xtensa.h"
 #include "clang/Basic/Diagnostic.h"
 #include "clang/Basic/DiagnosticFrontend.h"
 #include "llvm/ADT/StringExtras.h"
@@ -737,6 +738,9 @@ std::unique_ptr AllocateTarget(const 
llvm::Triple &Triple,
 default:
 return std::make_unique(Triple, Opts);
 }
+
+  case llvm::Triple::xtensa:
+return std::make_unique(Triple, Opts);
   }
 }
 } // namespace targets
diff --git a/clang/lib/Basic/Targets/Xtensa.cpp 
b/clang/lib/Basic/Targets/Xtensa.cpp
new file mode 100644
index 00..b46db6bfbd67ac
--- /dev/null
+++ b/clang/lib/Basic/Targets/Xtensa.cpp
@@ -0,0 +1,62 @@
+//===--- Xtensa.c

[clang] [Clang][Xtensa] Add Xtensa target. (PR #118008)

2024-11-28 Thread via cfe-commits

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https://github.com/llvm/llvm-project/pull/118008
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