[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
krzysz00 wrote: Wanted to see what the state of the world is here https://github.com/llvm/llvm-project/pull/145278 ___ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
https://github.com/Shoreshen updated https://github.com/llvm/llvm-project/pull/145278 >From 888df5412b37bd3f232bdb38c9f89786d042fe75 Mon Sep 17 00:00:00 2001 From: shore <[email protected]> Date: Mon, 23 Jun 2025 14:12:15 +0800 Subject: [PATCH 1/6] Add alignment attr & propagate alignment through make.buffer.rsrc inst --- llvm/include/llvm/Transforms/IPO/Attributor.h | 22 ++ llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp | 37 - .../Transforms/IPO/AttributorAttributes.cpp | 14 ++- llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll | 40 +++ 4 files changed, 110 insertions(+), 3 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll diff --git a/llvm/include/llvm/Transforms/IPO/Attributor.h b/llvm/include/llvm/Transforms/IPO/Attributor.h index e6eb756df987d3..64285c21149768 100644 --- a/llvm/include/llvm/Transforms/IPO/Attributor.h +++ b/llvm/include/llvm/Transforms/IPO/Attributor.h @@ -1355,6 +1355,12 @@ struct InformationCache { /// Return the flat address space if the associated target has. LLVM_ABI std::optional getFlatAddressSpace() const; + virtual bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const { +return false; + } + private: struct FunctionInfo { LLVM_ABI ~FunctionInfo(); @@ -2042,6 +2048,19 @@ struct Attributor { SimplificationCallbacks[IRP].emplace_back(CB); } + using AlignmentCallbackTy = + std::function &)>; + void registerAlignmentCallback(const IRPosition &IRP, + const AlignmentCallbackTy &CB) { +AlignmentCallBacks[IRP].emplace_back(CB); + } + + SmallVector + getAlignmentCallback(const IRPosition &IRP) { +return AlignmentCallBacks.lookup(IRP); + } + /// Return true if there is a simplification callback for \p IRP. bool hasSimplificationCallback(const IRPosition &IRP) { return SimplificationCallbacks.count(IRP); @@ -2093,6 +2112,9 @@ struct Attributor { DenseMap> SimplificationCallbacks; + /// The vector with AAAlign callbacks registered by outside AAs. + DenseMap> AlignmentCallBacks; + /// The vector with all simplification callbacks for global variables /// registered by outside AAs. DenseMap(AA)) { +if (const auto *II = dyn_cast(I)) { + if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) +return true; +} + } + + return false; +} + namespace { class AMDGPUInformationCache : public InformationCache { public: @@ -235,6 +247,12 @@ class AMDGPUInformationCache : public InformationCache { return ST.getMaxWavesPerEU(); } + bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const override { +return isAlignAndMakeBuffer(QueryingAA, I); + } + private: /// Check if the ConstantExpr \p CE uses an addrspacecast from private or /// local to flat. These casts may require the queue pointer. @@ -1381,7 +1399,7 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, &AAAMDMaxNumWorkgroups::ID, &AAAMDWavesPerEU::ID, &AAAMDGPUNoAGPR::ID, &AACallEdges::ID, &AAPointerInfo::ID, &AAPotentialConstantValues::ID, &AAUnderlyingObjects::ID, &AAAddressSpace::ID, &AAIndirectCallInfo::ID, - &AAInstanceInfo::ID}); + &AAInstanceInfo::ID, &AAAlign::ID}); AttributorConfig AC(CGUpdater); AC.IsClosedWorldModule = Options.IsClosedWorld; @@ -1432,6 +1450,23 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, } else if (auto *CmpX = dyn_cast(&I)) { A.getOrCreateAAFor( IRPosition::value(*CmpX->getPointerOperand())); + } else if (auto *II = dyn_cast(&I)) { +if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) { + IRPosition IRP = IRPosition::inst(*II); + + Attributor::AlignmentCallbackTy ACB = + [](const IRPosition &IRP, const AbstractAttribute *AA, + SmallVectorImpl &Values) { +if (auto *I = dyn_cast(&IRP.getAssociatedValue())) + if (isAlignAndMakeBuffer(AA, I)) { +Values.push_back( +AA::ValueAndContext{*I->getOperand(0), nullptr}); + } + }; + A.registerAlignmentCallback(IRP, ACB); + + A.getOrCreateAAFor(IRP); +} } } } diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp index 3799a696f67aff..cca03b30e75c7d 100644 --- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp +++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp @@ -5202,6 +5202,10 @@ static unsigned getKnownAlignForUse(Attributor &A, AAAlign &QueryingAA, TrackUse = true; return 0;
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff HEAD~1 HEAD --extensions cl,h,cpp --
clang/test/CodeGenOpenCL/builtins-amdgcn-make-buffer-rsrc.cl
llvm/include/llvm/Transforms/IPO/Attributor.h
llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
llvm/lib/Transforms/IPO/AttributorAttributes.cpp
``
View the diff from clang-format here.
``diff
diff --git a/llvm/include/llvm/Transforms/IPO/Attributor.h
b/llvm/include/llvm/Transforms/IPO/Attributor.h
index 297dd296a..107ab0d1c 100644
--- a/llvm/include/llvm/Transforms/IPO/Attributor.h
+++ b/llvm/include/llvm/Transforms/IPO/Attributor.h
@@ -1364,7 +1364,6 @@ struct InformationCache {
virtual unsigned getMaxAddrSpace() const { return ~0U; }
-
private:
struct FunctionInfo {
LLVM_ABI ~FunctionInfo();
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
index c7d43c80c..c4b7406ef 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
@@ -235,7 +235,6 @@ public:
return ST.getMaxWavesPerEU();
}
-
bool shouldTrackUse(const AbstractAttribute *QueryingAA,
Value &AssociatedValue, const Use *U,
const Instruction *I) const override {
@@ -245,90 +244,90 @@ public:
}
return false;
- unsigned getMaxAddrSpace() const override {
-return AMDGPUAS::MAX_AMDGPU_ADDRESS;
- }
-
-private:
- /// Check if the ConstantExpr \p CE uses an addrspacecast from private or
- /// local to flat. These casts may require the queue pointer.
- static uint8_t visitConstExpr(const ConstantExpr *CE) {
-uint8_t Status = NONE;
-
-if (CE->getOpcode() == Instruction::AddrSpaceCast) {
- unsigned SrcAS = CE->getOperand(0)->getType()->getPointerAddressSpace();
- if (SrcAS == AMDGPUAS::PRIVATE_ADDRESS)
-Status |= ADDR_SPACE_CAST_PRIVATE_TO_FLAT;
- else if (SrcAS == AMDGPUAS::LOCAL_ADDRESS)
-Status |= ADDR_SPACE_CAST_LOCAL_TO_FLAT;
+unsigned getMaxAddrSpace() const override {
+ return AMDGPUAS::MAX_AMDGPU_ADDRESS;
}
-return Status;
- }
+ private:
+/// Check if the ConstantExpr \p CE uses an addrspacecast from private or
+/// local to flat. These casts may require the queue pointer.
+static uint8_t visitConstExpr(const ConstantExpr *CE) {
+ uint8_t Status = NONE;
+
+ if (CE->getOpcode() == Instruction::AddrSpaceCast) {
+unsigned SrcAS =
CE->getOperand(0)->getType()->getPointerAddressSpace();
+if (SrcAS == AMDGPUAS::PRIVATE_ADDRESS)
+ Status |= ADDR_SPACE_CAST_PRIVATE_TO_FLAT;
+else if (SrcAS == AMDGPUAS::LOCAL_ADDRESS)
+ Status |= ADDR_SPACE_CAST_LOCAL_TO_FLAT;
+ }
- /// Returns the minimum amount of LDS space used by a workgroup running
- /// function \p F.
- static unsigned getLDSSize(const Function &F) {
-return AMDGPU::getIntegerPairAttribute(F, "amdgpu-lds-size",
- {0, UINT32_MAX}, true)
-.first;
- }
+ return Status;
+}
+
+/// Returns the minimum amount of LDS space used by a workgroup running
+/// function \p F.
+static unsigned getLDSSize(const Function &F) {
+ return AMDGPU::getIntegerPairAttribute(F, "amdgpu-lds-size",
+ {0, UINT32_MAX}, true)
+ .first;
+}
- /// Get the constant access bitmap for \p C.
- uint8_t getConstantAccess(const Constant *C,
-SmallPtrSetImpl &Visited) {
-auto It = ConstantStatus.find(C);
-if (It != ConstantStatus.end())
- return It->second;
+/// Get the constant access bitmap for \p C.
+uint8_t getConstantAccess(const Constant *C,
+ SmallPtrSetImpl &Visited) {
+ auto It = ConstantStatus.find(C);
+ if (It != ConstantStatus.end())
+return It->second;
-uint8_t Result = 0;
-if (isDSAddress(C))
- Result = DS_GLOBAL;
+ uint8_t Result = 0;
+ if (isDSAddress(C))
+Result = DS_GLOBAL;
-if (const auto *CE = dyn_cast(C))
- Result |= visitConstExpr(CE);
+ if (const auto *CE = dyn_cast(C))
+Result |= visitConstExpr(CE);
-for (const Use &U : C->operands()) {
- const auto *OpC = dyn_cast(U);
- if (!OpC || !Visited.insert(OpC).second)
-continue;
+ for (const Use &U : C->operands()) {
+const auto *OpC = dyn_cast(U);
+if (!OpC || !Visited.insert(OpC).second)
+ continue;
- Result |= getConstantAccess(OpC, Visited);
+Result |= getConstantAccess(OpC, Visited);
+ }
+ return Result;
}
-return Result;
- }
-public:
- /// Returns true if \p Fn needs the queue pointer because of \p C.
- bool needsQueuePtr(const Constant
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
https://github.com/Shoreshen updated https://github.com/llvm/llvm-project/pull/145278 >From 888df5412b37bd3f232bdb38c9f89786d042fe75 Mon Sep 17 00:00:00 2001 From: shore <[email protected]> Date: Mon, 23 Jun 2025 14:12:15 +0800 Subject: [PATCH 1/6] Add alignment attr & propagate alignment through make.buffer.rsrc inst --- llvm/include/llvm/Transforms/IPO/Attributor.h | 22 ++ llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp | 37 - .../Transforms/IPO/AttributorAttributes.cpp | 14 ++- llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll | 40 +++ 4 files changed, 110 insertions(+), 3 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll diff --git a/llvm/include/llvm/Transforms/IPO/Attributor.h b/llvm/include/llvm/Transforms/IPO/Attributor.h index e6eb756df987d..64285c2114976 100644 --- a/llvm/include/llvm/Transforms/IPO/Attributor.h +++ b/llvm/include/llvm/Transforms/IPO/Attributor.h @@ -1355,6 +1355,12 @@ struct InformationCache { /// Return the flat address space if the associated target has. LLVM_ABI std::optional getFlatAddressSpace() const; + virtual bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const { +return false; + } + private: struct FunctionInfo { LLVM_ABI ~FunctionInfo(); @@ -2042,6 +2048,19 @@ struct Attributor { SimplificationCallbacks[IRP].emplace_back(CB); } + using AlignmentCallbackTy = + std::function &)>; + void registerAlignmentCallback(const IRPosition &IRP, + const AlignmentCallbackTy &CB) { +AlignmentCallBacks[IRP].emplace_back(CB); + } + + SmallVector + getAlignmentCallback(const IRPosition &IRP) { +return AlignmentCallBacks.lookup(IRP); + } + /// Return true if there is a simplification callback for \p IRP. bool hasSimplificationCallback(const IRPosition &IRP) { return SimplificationCallbacks.count(IRP); @@ -2093,6 +2112,9 @@ struct Attributor { DenseMap> SimplificationCallbacks; + /// The vector with AAAlign callbacks registered by outside AAs. + DenseMap> AlignmentCallBacks; + /// The vector with all simplification callbacks for global variables /// registered by outside AAs. DenseMap(AA)) { +if (const auto *II = dyn_cast(I)) { + if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) +return true; +} + } + + return false; +} + namespace { class AMDGPUInformationCache : public InformationCache { public: @@ -235,6 +247,12 @@ class AMDGPUInformationCache : public InformationCache { return ST.getMaxWavesPerEU(); } + bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const override { +return isAlignAndMakeBuffer(QueryingAA, I); + } + private: /// Check if the ConstantExpr \p CE uses an addrspacecast from private or /// local to flat. These casts may require the queue pointer. @@ -1381,7 +1399,7 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, &AAAMDMaxNumWorkgroups::ID, &AAAMDWavesPerEU::ID, &AAAMDGPUNoAGPR::ID, &AACallEdges::ID, &AAPointerInfo::ID, &AAPotentialConstantValues::ID, &AAUnderlyingObjects::ID, &AAAddressSpace::ID, &AAIndirectCallInfo::ID, - &AAInstanceInfo::ID}); + &AAInstanceInfo::ID, &AAAlign::ID}); AttributorConfig AC(CGUpdater); AC.IsClosedWorldModule = Options.IsClosedWorld; @@ -1432,6 +1450,23 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, } else if (auto *CmpX = dyn_cast(&I)) { A.getOrCreateAAFor( IRPosition::value(*CmpX->getPointerOperand())); + } else if (auto *II = dyn_cast(&I)) { +if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) { + IRPosition IRP = IRPosition::inst(*II); + + Attributor::AlignmentCallbackTy ACB = + [](const IRPosition &IRP, const AbstractAttribute *AA, + SmallVectorImpl &Values) { +if (auto *I = dyn_cast(&IRP.getAssociatedValue())) + if (isAlignAndMakeBuffer(AA, I)) { +Values.push_back( +AA::ValueAndContext{*I->getOperand(0), nullptr}); + } + }; + A.registerAlignmentCallback(IRP, ACB); + + A.getOrCreateAAFor(IRP); +} } } } diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp index 3799a696f67af..cca03b30e75c7 100644 --- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp +++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp @@ -5202,6 +5202,10 @@ static unsigned getKnownAlignForUse(Attributor &A, AAAlign &QueryingAA, TrackUse = true; return 0; }
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
Shoreshen wrote: > This is still doing the target intrinsic instead of handling ptrmask first? Hi @arsenm, I'm going to open a new PR for ptrmask. But since the backward propagate is in the initialization, it may cause some problem (depend on potential constant attr). I'll need to read the code and discuss with shilei on how to solve it~~ https://github.com/llvm/llvm-project/pull/145278 ___ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
https://github.com/arsenm commented: This is still doing the target intrinsic instead of handling ptrmask first? https://github.com/llvm/llvm-project/pull/145278 ___ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
https://github.com/Shoreshen updated https://github.com/llvm/llvm-project/pull/145278 >From 888df5412b37bd3f232bdb38c9f89786d042fe75 Mon Sep 17 00:00:00 2001 From: shore <[email protected]> Date: Mon, 23 Jun 2025 14:12:15 +0800 Subject: [PATCH 1/6] Add alignment attr & propagate alignment through make.buffer.rsrc inst --- llvm/include/llvm/Transforms/IPO/Attributor.h | 22 ++ llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp | 37 - .../Transforms/IPO/AttributorAttributes.cpp | 14 ++- llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll | 40 +++ 4 files changed, 110 insertions(+), 3 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll diff --git a/llvm/include/llvm/Transforms/IPO/Attributor.h b/llvm/include/llvm/Transforms/IPO/Attributor.h index e6eb756df987d..64285c2114976 100644 --- a/llvm/include/llvm/Transforms/IPO/Attributor.h +++ b/llvm/include/llvm/Transforms/IPO/Attributor.h @@ -1355,6 +1355,12 @@ struct InformationCache { /// Return the flat address space if the associated target has. LLVM_ABI std::optional getFlatAddressSpace() const; + virtual bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const { +return false; + } + private: struct FunctionInfo { LLVM_ABI ~FunctionInfo(); @@ -2042,6 +2048,19 @@ struct Attributor { SimplificationCallbacks[IRP].emplace_back(CB); } + using AlignmentCallbackTy = + std::function &)>; + void registerAlignmentCallback(const IRPosition &IRP, + const AlignmentCallbackTy &CB) { +AlignmentCallBacks[IRP].emplace_back(CB); + } + + SmallVector + getAlignmentCallback(const IRPosition &IRP) { +return AlignmentCallBacks.lookup(IRP); + } + /// Return true if there is a simplification callback for \p IRP. bool hasSimplificationCallback(const IRPosition &IRP) { return SimplificationCallbacks.count(IRP); @@ -2093,6 +2112,9 @@ struct Attributor { DenseMap> SimplificationCallbacks; + /// The vector with AAAlign callbacks registered by outside AAs. + DenseMap> AlignmentCallBacks; + /// The vector with all simplification callbacks for global variables /// registered by outside AAs. DenseMap(AA)) { +if (const auto *II = dyn_cast(I)) { + if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) +return true; +} + } + + return false; +} + namespace { class AMDGPUInformationCache : public InformationCache { public: @@ -235,6 +247,12 @@ class AMDGPUInformationCache : public InformationCache { return ST.getMaxWavesPerEU(); } + bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const override { +return isAlignAndMakeBuffer(QueryingAA, I); + } + private: /// Check if the ConstantExpr \p CE uses an addrspacecast from private or /// local to flat. These casts may require the queue pointer. @@ -1381,7 +1399,7 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, &AAAMDMaxNumWorkgroups::ID, &AAAMDWavesPerEU::ID, &AAAMDGPUNoAGPR::ID, &AACallEdges::ID, &AAPointerInfo::ID, &AAPotentialConstantValues::ID, &AAUnderlyingObjects::ID, &AAAddressSpace::ID, &AAIndirectCallInfo::ID, - &AAInstanceInfo::ID}); + &AAInstanceInfo::ID, &AAAlign::ID}); AttributorConfig AC(CGUpdater); AC.IsClosedWorldModule = Options.IsClosedWorld; @@ -1432,6 +1450,23 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, } else if (auto *CmpX = dyn_cast(&I)) { A.getOrCreateAAFor( IRPosition::value(*CmpX->getPointerOperand())); + } else if (auto *II = dyn_cast(&I)) { +if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) { + IRPosition IRP = IRPosition::inst(*II); + + Attributor::AlignmentCallbackTy ACB = + [](const IRPosition &IRP, const AbstractAttribute *AA, + SmallVectorImpl &Values) { +if (auto *I = dyn_cast(&IRP.getAssociatedValue())) + if (isAlignAndMakeBuffer(AA, I)) { +Values.push_back( +AA::ValueAndContext{*I->getOperand(0), nullptr}); + } + }; + A.registerAlignmentCallback(IRP, ACB); + + A.getOrCreateAAFor(IRP); +} } } } diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp index 3799a696f67af..cca03b30e75c7 100644 --- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp +++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp @@ -5202,6 +5202,10 @@ static unsigned getKnownAlignForUse(Attributor &A, AAAlign &QueryingAA, TrackUse = true; return 0; }
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
@@ -1432,6 +1442,26 @@ static bool runImpl(Module &M, AnalysisGetter &AG,
TargetMachine &TM,
} else if (auto *CmpX = dyn_cast(&I)) {
A.getOrCreateAAFor(
IRPosition::value(*CmpX->getPointerOperand()));
+ } else if (auto *II = dyn_cast(&I)) {
+if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) {
+ IRPosition IRP = IRPosition::value(*II);
+
+ Attributor::AlignmentCallbackTy ACB =
+ [](const IRPosition &IRP, const AbstractAttribute *AA,
+ SmallVectorImpl &Values) {
+Instruction *I = IRP.getCtxI();
+if (!I)
+ return;
+if (auto *II = dyn_cast(I))
+ if (II->getIntrinsicID() ==
+ Intrinsic::amdgcn_make_buffer_rsrc)
+Values.push_back(
+AA::ValueAndContext{*I->getOperand(0), nullptr});
shiltian wrote:
```suggestion
if (auto *II = dyn_cast(I)) {
if (II->getIntrinsicID() ==
Intrinsic::amdgcn_make_buffer_rsrc)
Values.push_back(
AA::ValueAndContext{*I->getOperand(0), nullptr});
}
```
https://github.com/llvm/llvm-project/pull/145278
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[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
@@ -5501,7 +5505,32 @@ struct AAAlignCallSiteReturned final
using Base = AACalleeToCallSite;
AAAlignCallSiteReturned(const IRPosition &IRP, Attributor &A)
: Base(IRP, A) {}
+ ChangeStatus updateImpl(Attributor &A) override {
+SmallVector Values;
+SmallVector AligmentCBs =
+A.getAlignmentCallback(getIRPosition());
+
+for (Attributor::AlignmentCallbackTy CB : AligmentCBs)
+ CB(getIRPosition(), this, Values);
+
+if (!Values.empty()) {
+ StateType T;
+ for (AA::ValueAndContext &VAC : Values) {
+const AAAlign *AA = A.getAAFor(
+*this, IRPosition::value(*VAC.getValue()), DepClassTy::REQUIRED);
+if (AA && this != AA) {
shiltian wrote:
Not sure if that's a good idea to compare AA directly instead of comparing the
associated value.
https://github.com/llvm/llvm-project/pull/145278
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[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
@@ -85,7 +85,7 @@ __amdgpu_buffer_rsrc_t test_amdgcn_make_buffer_p0_nullptr(short stride, int num, // CHECK-LABEL: @test_amdgcn_make_buffer_p1_nullptr( // CHECK-NEXT: entry: -// CHECK-NEXT:[[TMP0:%.*]] = tail call ptr addrspace(8) @llvm.amdgcn.make.buffer.rsrc.p8.p1(ptr addrspace(1) null, i16 [[STRIDE:%.*]], i32 [[NUM:%.*]], i32 [[FLAGS:%.*]]) +// CHECK-NEXT:[[TMP0:%.*]] = tail call align 4294967296 ptr addrspace(8) @llvm.amdgcn.make.buffer.rsrc.p8.p1(ptr addrspace(1) null, i16 [[STRIDE:%.*]], i32 [[NUM:%.*]], i32 [[FLAGS:%.*]]) Shoreshen wrote: Hi @shiltian , the first operand of this is 0 pointer `__builtin_amdgcn_make_buffer_rsrc((global void *)0LL, stride, num, flags);`, so the attribute regard it as the maximum alignment... https://github.com/llvm/llvm-project/pull/145278 ___ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
https://github.com/Shoreshen updated https://github.com/llvm/llvm-project/pull/145278 >From 888df5412b37bd3f232bdb38c9f89786d042fe75 Mon Sep 17 00:00:00 2001 From: shore <[email protected]> Date: Mon, 23 Jun 2025 14:12:15 +0800 Subject: [PATCH 1/5] Add alignment attr & propagate alignment through make.buffer.rsrc inst --- llvm/include/llvm/Transforms/IPO/Attributor.h | 22 ++ llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp | 37 - .../Transforms/IPO/AttributorAttributes.cpp | 14 ++- llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll | 40 +++ 4 files changed, 110 insertions(+), 3 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll diff --git a/llvm/include/llvm/Transforms/IPO/Attributor.h b/llvm/include/llvm/Transforms/IPO/Attributor.h index e6eb756df987d..64285c2114976 100644 --- a/llvm/include/llvm/Transforms/IPO/Attributor.h +++ b/llvm/include/llvm/Transforms/IPO/Attributor.h @@ -1355,6 +1355,12 @@ struct InformationCache { /// Return the flat address space if the associated target has. LLVM_ABI std::optional getFlatAddressSpace() const; + virtual bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const { +return false; + } + private: struct FunctionInfo { LLVM_ABI ~FunctionInfo(); @@ -2042,6 +2048,19 @@ struct Attributor { SimplificationCallbacks[IRP].emplace_back(CB); } + using AlignmentCallbackTy = + std::function &)>; + void registerAlignmentCallback(const IRPosition &IRP, + const AlignmentCallbackTy &CB) { +AlignmentCallBacks[IRP].emplace_back(CB); + } + + SmallVector + getAlignmentCallback(const IRPosition &IRP) { +return AlignmentCallBacks.lookup(IRP); + } + /// Return true if there is a simplification callback for \p IRP. bool hasSimplificationCallback(const IRPosition &IRP) { return SimplificationCallbacks.count(IRP); @@ -2093,6 +2112,9 @@ struct Attributor { DenseMap> SimplificationCallbacks; + /// The vector with AAAlign callbacks registered by outside AAs. + DenseMap> AlignmentCallBacks; + /// The vector with all simplification callbacks for global variables /// registered by outside AAs. DenseMap(AA)) { +if (const auto *II = dyn_cast(I)) { + if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) +return true; +} + } + + return false; +} + namespace { class AMDGPUInformationCache : public InformationCache { public: @@ -235,6 +247,12 @@ class AMDGPUInformationCache : public InformationCache { return ST.getMaxWavesPerEU(); } + bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const override { +return isAlignAndMakeBuffer(QueryingAA, I); + } + private: /// Check if the ConstantExpr \p CE uses an addrspacecast from private or /// local to flat. These casts may require the queue pointer. @@ -1381,7 +1399,7 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, &AAAMDMaxNumWorkgroups::ID, &AAAMDWavesPerEU::ID, &AAAMDGPUNoAGPR::ID, &AACallEdges::ID, &AAPointerInfo::ID, &AAPotentialConstantValues::ID, &AAUnderlyingObjects::ID, &AAAddressSpace::ID, &AAIndirectCallInfo::ID, - &AAInstanceInfo::ID}); + &AAInstanceInfo::ID, &AAAlign::ID}); AttributorConfig AC(CGUpdater); AC.IsClosedWorldModule = Options.IsClosedWorld; @@ -1432,6 +1450,23 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, } else if (auto *CmpX = dyn_cast(&I)) { A.getOrCreateAAFor( IRPosition::value(*CmpX->getPointerOperand())); + } else if (auto *II = dyn_cast(&I)) { +if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) { + IRPosition IRP = IRPosition::inst(*II); + + Attributor::AlignmentCallbackTy ACB = + [](const IRPosition &IRP, const AbstractAttribute *AA, + SmallVectorImpl &Values) { +if (auto *I = dyn_cast(&IRP.getAssociatedValue())) + if (isAlignAndMakeBuffer(AA, I)) { +Values.push_back( +AA::ValueAndContext{*I->getOperand(0), nullptr}); + } + }; + A.registerAlignmentCallback(IRP, ACB); + + A.getOrCreateAAFor(IRP); +} } } } diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp index 3799a696f67af..cca03b30e75c7 100644 --- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp +++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp @@ -5202,6 +5202,10 @@ static unsigned getKnownAlignForUse(Attributor &A, AAAlign &QueryingAA, TrackUse = true; return 0; }
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
@@ -85,7 +85,7 @@ __amdgpu_buffer_rsrc_t test_amdgcn_make_buffer_p0_nullptr(short stride, int num, // CHECK-LABEL: @test_amdgcn_make_buffer_p1_nullptr( // CHECK-NEXT: entry: -// CHECK-NEXT:[[TMP0:%.*]] = tail call ptr addrspace(8) @llvm.amdgcn.make.buffer.rsrc.p8.p1(ptr addrspace(1) null, i16 [[STRIDE:%.*]], i32 [[NUM:%.*]], i32 [[FLAGS:%.*]]) +// CHECK-NEXT:[[TMP0:%.*]] = tail call align 4294967296 ptr addrspace(8) @llvm.amdgcn.make.buffer.rsrc.p8.p1(ptr addrspace(1) null, i16 [[STRIDE:%.*]], i32 [[NUM:%.*]], i32 [[FLAGS:%.*]]) shiltian wrote: This value doesn't look right? https://github.com/llvm/llvm-project/pull/145278 ___ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
https://github.com/Shoreshen updated https://github.com/llvm/llvm-project/pull/145278 >From 888df5412b37bd3f232bdb38c9f89786d042fe75 Mon Sep 17 00:00:00 2001 From: shore <[email protected]> Date: Mon, 23 Jun 2025 14:12:15 +0800 Subject: [PATCH 1/5] Add alignment attr & propagate alignment through make.buffer.rsrc inst --- llvm/include/llvm/Transforms/IPO/Attributor.h | 22 ++ llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp | 37 - .../Transforms/IPO/AttributorAttributes.cpp | 14 ++- llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll | 40 +++ 4 files changed, 110 insertions(+), 3 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll diff --git a/llvm/include/llvm/Transforms/IPO/Attributor.h b/llvm/include/llvm/Transforms/IPO/Attributor.h index e6eb756df987d..64285c2114976 100644 --- a/llvm/include/llvm/Transforms/IPO/Attributor.h +++ b/llvm/include/llvm/Transforms/IPO/Attributor.h @@ -1355,6 +1355,12 @@ struct InformationCache { /// Return the flat address space if the associated target has. LLVM_ABI std::optional getFlatAddressSpace() const; + virtual bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const { +return false; + } + private: struct FunctionInfo { LLVM_ABI ~FunctionInfo(); @@ -2042,6 +2048,19 @@ struct Attributor { SimplificationCallbacks[IRP].emplace_back(CB); } + using AlignmentCallbackTy = + std::function &)>; + void registerAlignmentCallback(const IRPosition &IRP, + const AlignmentCallbackTy &CB) { +AlignmentCallBacks[IRP].emplace_back(CB); + } + + SmallVector + getAlignmentCallback(const IRPosition &IRP) { +return AlignmentCallBacks.lookup(IRP); + } + /// Return true if there is a simplification callback for \p IRP. bool hasSimplificationCallback(const IRPosition &IRP) { return SimplificationCallbacks.count(IRP); @@ -2093,6 +2112,9 @@ struct Attributor { DenseMap> SimplificationCallbacks; + /// The vector with AAAlign callbacks registered by outside AAs. + DenseMap> AlignmentCallBacks; + /// The vector with all simplification callbacks for global variables /// registered by outside AAs. DenseMap(AA)) { +if (const auto *II = dyn_cast(I)) { + if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) +return true; +} + } + + return false; +} + namespace { class AMDGPUInformationCache : public InformationCache { public: @@ -235,6 +247,12 @@ class AMDGPUInformationCache : public InformationCache { return ST.getMaxWavesPerEU(); } + bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const override { +return isAlignAndMakeBuffer(QueryingAA, I); + } + private: /// Check if the ConstantExpr \p CE uses an addrspacecast from private or /// local to flat. These casts may require the queue pointer. @@ -1381,7 +1399,7 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, &AAAMDMaxNumWorkgroups::ID, &AAAMDWavesPerEU::ID, &AAAMDGPUNoAGPR::ID, &AACallEdges::ID, &AAPointerInfo::ID, &AAPotentialConstantValues::ID, &AAUnderlyingObjects::ID, &AAAddressSpace::ID, &AAIndirectCallInfo::ID, - &AAInstanceInfo::ID}); + &AAInstanceInfo::ID, &AAAlign::ID}); AttributorConfig AC(CGUpdater); AC.IsClosedWorldModule = Options.IsClosedWorld; @@ -1432,6 +1450,23 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, } else if (auto *CmpX = dyn_cast(&I)) { A.getOrCreateAAFor( IRPosition::value(*CmpX->getPointerOperand())); + } else if (auto *II = dyn_cast(&I)) { +if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) { + IRPosition IRP = IRPosition::inst(*II); + + Attributor::AlignmentCallbackTy ACB = + [](const IRPosition &IRP, const AbstractAttribute *AA, + SmallVectorImpl &Values) { +if (auto *I = dyn_cast(&IRP.getAssociatedValue())) + if (isAlignAndMakeBuffer(AA, I)) { +Values.push_back( +AA::ValueAndContext{*I->getOperand(0), nullptr}); + } + }; + A.registerAlignmentCallback(IRP, ACB); + + A.getOrCreateAAFor(IRP); +} } } } diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp index 3799a696f67af..cca03b30e75c7 100644 --- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp +++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp @@ -5202,6 +5202,10 @@ static unsigned getKnownAlignForUse(Attributor &A, AAAlign &QueryingAA, TrackUse = true; return 0; }
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
https://github.com/Shoreshen updated https://github.com/llvm/llvm-project/pull/145278 >From 888df5412b37bd3f232bdb38c9f89786d042fe75 Mon Sep 17 00:00:00 2001 From: shore <[email protected]> Date: Mon, 23 Jun 2025 14:12:15 +0800 Subject: [PATCH 1/5] Add alignment attr & propagate alignment through make.buffer.rsrc inst --- llvm/include/llvm/Transforms/IPO/Attributor.h | 22 ++ llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp | 37 - .../Transforms/IPO/AttributorAttributes.cpp | 14 ++- llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll | 40 +++ 4 files changed, 110 insertions(+), 3 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll diff --git a/llvm/include/llvm/Transforms/IPO/Attributor.h b/llvm/include/llvm/Transforms/IPO/Attributor.h index e6eb756df987d..64285c2114976 100644 --- a/llvm/include/llvm/Transforms/IPO/Attributor.h +++ b/llvm/include/llvm/Transforms/IPO/Attributor.h @@ -1355,6 +1355,12 @@ struct InformationCache { /// Return the flat address space if the associated target has. LLVM_ABI std::optional getFlatAddressSpace() const; + virtual bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const { +return false; + } + private: struct FunctionInfo { LLVM_ABI ~FunctionInfo(); @@ -2042,6 +2048,19 @@ struct Attributor { SimplificationCallbacks[IRP].emplace_back(CB); } + using AlignmentCallbackTy = + std::function &)>; + void registerAlignmentCallback(const IRPosition &IRP, + const AlignmentCallbackTy &CB) { +AlignmentCallBacks[IRP].emplace_back(CB); + } + + SmallVector + getAlignmentCallback(const IRPosition &IRP) { +return AlignmentCallBacks.lookup(IRP); + } + /// Return true if there is a simplification callback for \p IRP. bool hasSimplificationCallback(const IRPosition &IRP) { return SimplificationCallbacks.count(IRP); @@ -2093,6 +2112,9 @@ struct Attributor { DenseMap> SimplificationCallbacks; + /// The vector with AAAlign callbacks registered by outside AAs. + DenseMap> AlignmentCallBacks; + /// The vector with all simplification callbacks for global variables /// registered by outside AAs. DenseMap(AA)) { +if (const auto *II = dyn_cast(I)) { + if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) +return true; +} + } + + return false; +} + namespace { class AMDGPUInformationCache : public InformationCache { public: @@ -235,6 +247,12 @@ class AMDGPUInformationCache : public InformationCache { return ST.getMaxWavesPerEU(); } + bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const override { +return isAlignAndMakeBuffer(QueryingAA, I); + } + private: /// Check if the ConstantExpr \p CE uses an addrspacecast from private or /// local to flat. These casts may require the queue pointer. @@ -1381,7 +1399,7 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, &AAAMDMaxNumWorkgroups::ID, &AAAMDWavesPerEU::ID, &AAAMDGPUNoAGPR::ID, &AACallEdges::ID, &AAPointerInfo::ID, &AAPotentialConstantValues::ID, &AAUnderlyingObjects::ID, &AAAddressSpace::ID, &AAIndirectCallInfo::ID, - &AAInstanceInfo::ID}); + &AAInstanceInfo::ID, &AAAlign::ID}); AttributorConfig AC(CGUpdater); AC.IsClosedWorldModule = Options.IsClosedWorld; @@ -1432,6 +1450,23 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, } else if (auto *CmpX = dyn_cast(&I)) { A.getOrCreateAAFor( IRPosition::value(*CmpX->getPointerOperand())); + } else if (auto *II = dyn_cast(&I)) { +if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) { + IRPosition IRP = IRPosition::inst(*II); + + Attributor::AlignmentCallbackTy ACB = + [](const IRPosition &IRP, const AbstractAttribute *AA, + SmallVectorImpl &Values) { +if (auto *I = dyn_cast(&IRP.getAssociatedValue())) + if (isAlignAndMakeBuffer(AA, I)) { +Values.push_back( +AA::ValueAndContext{*I->getOperand(0), nullptr}); + } + }; + A.registerAlignmentCallback(IRP, ACB); + + A.getOrCreateAAFor(IRP); +} } } } diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp index 3799a696f67af..cca03b30e75c7 100644 --- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp +++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp @@ -5202,6 +5202,10 @@ static unsigned getKnownAlignForUse(Attributor &A, AAAlign &QueryingAA, TrackUse = true; return 0; }
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
https://github.com/Shoreshen updated https://github.com/llvm/llvm-project/pull/145278 >From 888df5412b37bd3f232bdb38c9f89786d042fe75 Mon Sep 17 00:00:00 2001 From: shore <[email protected]> Date: Mon, 23 Jun 2025 14:12:15 +0800 Subject: [PATCH 1/5] Add alignment attr & propagate alignment through make.buffer.rsrc inst --- llvm/include/llvm/Transforms/IPO/Attributor.h | 22 ++ llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp | 37 - .../Transforms/IPO/AttributorAttributes.cpp | 14 ++- llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll | 40 +++ 4 files changed, 110 insertions(+), 3 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll diff --git a/llvm/include/llvm/Transforms/IPO/Attributor.h b/llvm/include/llvm/Transforms/IPO/Attributor.h index e6eb756df987d..64285c2114976 100644 --- a/llvm/include/llvm/Transforms/IPO/Attributor.h +++ b/llvm/include/llvm/Transforms/IPO/Attributor.h @@ -1355,6 +1355,12 @@ struct InformationCache { /// Return the flat address space if the associated target has. LLVM_ABI std::optional getFlatAddressSpace() const; + virtual bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const { +return false; + } + private: struct FunctionInfo { LLVM_ABI ~FunctionInfo(); @@ -2042,6 +2048,19 @@ struct Attributor { SimplificationCallbacks[IRP].emplace_back(CB); } + using AlignmentCallbackTy = + std::function &)>; + void registerAlignmentCallback(const IRPosition &IRP, + const AlignmentCallbackTy &CB) { +AlignmentCallBacks[IRP].emplace_back(CB); + } + + SmallVector + getAlignmentCallback(const IRPosition &IRP) { +return AlignmentCallBacks.lookup(IRP); + } + /// Return true if there is a simplification callback for \p IRP. bool hasSimplificationCallback(const IRPosition &IRP) { return SimplificationCallbacks.count(IRP); @@ -2093,6 +2112,9 @@ struct Attributor { DenseMap> SimplificationCallbacks; + /// The vector with AAAlign callbacks registered by outside AAs. + DenseMap> AlignmentCallBacks; + /// The vector with all simplification callbacks for global variables /// registered by outside AAs. DenseMap(AA)) { +if (const auto *II = dyn_cast(I)) { + if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) +return true; +} + } + + return false; +} + namespace { class AMDGPUInformationCache : public InformationCache { public: @@ -235,6 +247,12 @@ class AMDGPUInformationCache : public InformationCache { return ST.getMaxWavesPerEU(); } + bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const override { +return isAlignAndMakeBuffer(QueryingAA, I); + } + private: /// Check if the ConstantExpr \p CE uses an addrspacecast from private or /// local to flat. These casts may require the queue pointer. @@ -1381,7 +1399,7 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, &AAAMDMaxNumWorkgroups::ID, &AAAMDWavesPerEU::ID, &AAAMDGPUNoAGPR::ID, &AACallEdges::ID, &AAPointerInfo::ID, &AAPotentialConstantValues::ID, &AAUnderlyingObjects::ID, &AAAddressSpace::ID, &AAIndirectCallInfo::ID, - &AAInstanceInfo::ID}); + &AAInstanceInfo::ID, &AAAlign::ID}); AttributorConfig AC(CGUpdater); AC.IsClosedWorldModule = Options.IsClosedWorld; @@ -1432,6 +1450,23 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, } else if (auto *CmpX = dyn_cast(&I)) { A.getOrCreateAAFor( IRPosition::value(*CmpX->getPointerOperand())); + } else if (auto *II = dyn_cast(&I)) { +if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) { + IRPosition IRP = IRPosition::inst(*II); + + Attributor::AlignmentCallbackTy ACB = + [](const IRPosition &IRP, const AbstractAttribute *AA, + SmallVectorImpl &Values) { +if (auto *I = dyn_cast(&IRP.getAssociatedValue())) + if (isAlignAndMakeBuffer(AA, I)) { +Values.push_back( +AA::ValueAndContext{*I->getOperand(0), nullptr}); + } + }; + A.registerAlignmentCallback(IRP, ACB); + + A.getOrCreateAAFor(IRP); +} } } } diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp index 3799a696f67af..cca03b30e75c7 100644 --- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp +++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp @@ -5202,6 +5202,10 @@ static unsigned getKnownAlignForUse(Attributor &A, AAAlign &QueryingAA, TrackUse = true; return 0; }
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
https://github.com/Shoreshen updated https://github.com/llvm/llvm-project/pull/145278 >From 888df5412b37bd3f232bdb38c9f89786d042fe75 Mon Sep 17 00:00:00 2001 From: shore <[email protected]> Date: Mon, 23 Jun 2025 14:12:15 +0800 Subject: [PATCH 1/5] Add alignment attr & propagate alignment through make.buffer.rsrc inst --- llvm/include/llvm/Transforms/IPO/Attributor.h | 22 ++ llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp | 37 - .../Transforms/IPO/AttributorAttributes.cpp | 14 ++- llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll | 40 +++ 4 files changed, 110 insertions(+), 3 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll diff --git a/llvm/include/llvm/Transforms/IPO/Attributor.h b/llvm/include/llvm/Transforms/IPO/Attributor.h index e6eb756df987d..64285c2114976 100644 --- a/llvm/include/llvm/Transforms/IPO/Attributor.h +++ b/llvm/include/llvm/Transforms/IPO/Attributor.h @@ -1355,6 +1355,12 @@ struct InformationCache { /// Return the flat address space if the associated target has. LLVM_ABI std::optional getFlatAddressSpace() const; + virtual bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const { +return false; + } + private: struct FunctionInfo { LLVM_ABI ~FunctionInfo(); @@ -2042,6 +2048,19 @@ struct Attributor { SimplificationCallbacks[IRP].emplace_back(CB); } + using AlignmentCallbackTy = + std::function &)>; + void registerAlignmentCallback(const IRPosition &IRP, + const AlignmentCallbackTy &CB) { +AlignmentCallBacks[IRP].emplace_back(CB); + } + + SmallVector + getAlignmentCallback(const IRPosition &IRP) { +return AlignmentCallBacks.lookup(IRP); + } + /// Return true if there is a simplification callback for \p IRP. bool hasSimplificationCallback(const IRPosition &IRP) { return SimplificationCallbacks.count(IRP); @@ -2093,6 +2112,9 @@ struct Attributor { DenseMap> SimplificationCallbacks; + /// The vector with AAAlign callbacks registered by outside AAs. + DenseMap> AlignmentCallBacks; + /// The vector with all simplification callbacks for global variables /// registered by outside AAs. DenseMap(AA)) { +if (const auto *II = dyn_cast(I)) { + if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) +return true; +} + } + + return false; +} + namespace { class AMDGPUInformationCache : public InformationCache { public: @@ -235,6 +247,12 @@ class AMDGPUInformationCache : public InformationCache { return ST.getMaxWavesPerEU(); } + bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const override { +return isAlignAndMakeBuffer(QueryingAA, I); + } + private: /// Check if the ConstantExpr \p CE uses an addrspacecast from private or /// local to flat. These casts may require the queue pointer. @@ -1381,7 +1399,7 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, &AAAMDMaxNumWorkgroups::ID, &AAAMDWavesPerEU::ID, &AAAMDGPUNoAGPR::ID, &AACallEdges::ID, &AAPointerInfo::ID, &AAPotentialConstantValues::ID, &AAUnderlyingObjects::ID, &AAAddressSpace::ID, &AAIndirectCallInfo::ID, - &AAInstanceInfo::ID}); + &AAInstanceInfo::ID, &AAAlign::ID}); AttributorConfig AC(CGUpdater); AC.IsClosedWorldModule = Options.IsClosedWorld; @@ -1432,6 +1450,23 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, } else if (auto *CmpX = dyn_cast(&I)) { A.getOrCreateAAFor( IRPosition::value(*CmpX->getPointerOperand())); + } else if (auto *II = dyn_cast(&I)) { +if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) { + IRPosition IRP = IRPosition::inst(*II); + + Attributor::AlignmentCallbackTy ACB = + [](const IRPosition &IRP, const AbstractAttribute *AA, + SmallVectorImpl &Values) { +if (auto *I = dyn_cast(&IRP.getAssociatedValue())) + if (isAlignAndMakeBuffer(AA, I)) { +Values.push_back( +AA::ValueAndContext{*I->getOperand(0), nullptr}); + } + }; + A.registerAlignmentCallback(IRP, ACB); + + A.getOrCreateAAFor(IRP); +} } } } diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp index 3799a696f67af..cca03b30e75c7 100644 --- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp +++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp @@ -5202,6 +5202,10 @@ static unsigned getKnownAlignForUse(Attributor &A, AAAlign &QueryingAA, TrackUse = true; return 0; }
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
https://github.com/Shoreshen updated https://github.com/llvm/llvm-project/pull/145278 >From 888df5412b37bd3f232bdb38c9f89786d042fe75 Mon Sep 17 00:00:00 2001 From: shore <[email protected]> Date: Mon, 23 Jun 2025 14:12:15 +0800 Subject: [PATCH 1/5] Add alignment attr & propagate alignment through make.buffer.rsrc inst --- llvm/include/llvm/Transforms/IPO/Attributor.h | 22 ++ llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp | 37 - .../Transforms/IPO/AttributorAttributes.cpp | 14 ++- llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll | 40 +++ 4 files changed, 110 insertions(+), 3 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll diff --git a/llvm/include/llvm/Transforms/IPO/Attributor.h b/llvm/include/llvm/Transforms/IPO/Attributor.h index e6eb756df987d..64285c2114976 100644 --- a/llvm/include/llvm/Transforms/IPO/Attributor.h +++ b/llvm/include/llvm/Transforms/IPO/Attributor.h @@ -1355,6 +1355,12 @@ struct InformationCache { /// Return the flat address space if the associated target has. LLVM_ABI std::optional getFlatAddressSpace() const; + virtual bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const { +return false; + } + private: struct FunctionInfo { LLVM_ABI ~FunctionInfo(); @@ -2042,6 +2048,19 @@ struct Attributor { SimplificationCallbacks[IRP].emplace_back(CB); } + using AlignmentCallbackTy = + std::function &)>; + void registerAlignmentCallback(const IRPosition &IRP, + const AlignmentCallbackTy &CB) { +AlignmentCallBacks[IRP].emplace_back(CB); + } + + SmallVector + getAlignmentCallback(const IRPosition &IRP) { +return AlignmentCallBacks.lookup(IRP); + } + /// Return true if there is a simplification callback for \p IRP. bool hasSimplificationCallback(const IRPosition &IRP) { return SimplificationCallbacks.count(IRP); @@ -2093,6 +2112,9 @@ struct Attributor { DenseMap> SimplificationCallbacks; + /// The vector with AAAlign callbacks registered by outside AAs. + DenseMap> AlignmentCallBacks; + /// The vector with all simplification callbacks for global variables /// registered by outside AAs. DenseMap(AA)) { +if (const auto *II = dyn_cast(I)) { + if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) +return true; +} + } + + return false; +} + namespace { class AMDGPUInformationCache : public InformationCache { public: @@ -235,6 +247,12 @@ class AMDGPUInformationCache : public InformationCache { return ST.getMaxWavesPerEU(); } + bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const override { +return isAlignAndMakeBuffer(QueryingAA, I); + } + private: /// Check if the ConstantExpr \p CE uses an addrspacecast from private or /// local to flat. These casts may require the queue pointer. @@ -1381,7 +1399,7 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, &AAAMDMaxNumWorkgroups::ID, &AAAMDWavesPerEU::ID, &AAAMDGPUNoAGPR::ID, &AACallEdges::ID, &AAPointerInfo::ID, &AAPotentialConstantValues::ID, &AAUnderlyingObjects::ID, &AAAddressSpace::ID, &AAIndirectCallInfo::ID, - &AAInstanceInfo::ID}); + &AAInstanceInfo::ID, &AAAlign::ID}); AttributorConfig AC(CGUpdater); AC.IsClosedWorldModule = Options.IsClosedWorld; @@ -1432,6 +1450,23 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, } else if (auto *CmpX = dyn_cast(&I)) { A.getOrCreateAAFor( IRPosition::value(*CmpX->getPointerOperand())); + } else if (auto *II = dyn_cast(&I)) { +if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) { + IRPosition IRP = IRPosition::inst(*II); + + Attributor::AlignmentCallbackTy ACB = + [](const IRPosition &IRP, const AbstractAttribute *AA, + SmallVectorImpl &Values) { +if (auto *I = dyn_cast(&IRP.getAssociatedValue())) + if (isAlignAndMakeBuffer(AA, I)) { +Values.push_back( +AA::ValueAndContext{*I->getOperand(0), nullptr}); + } + }; + A.registerAlignmentCallback(IRP, ACB); + + A.getOrCreateAAFor(IRP); +} } } } diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp index 3799a696f67af..cca03b30e75c7 100644 --- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp +++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp @@ -5202,6 +5202,10 @@ static unsigned getKnownAlignForUse(Attributor &A, AAAlign &QueryingAA, TrackUse = true; return 0; }
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/145278 ___ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
@@ -1381,7 +1399,7 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, &AAAMDMaxNumWorkgroups::ID, &AAAMDWavesPerEU::ID, &AAAMDGPUNoAGPR::ID, &AACallEdges::ID, &AAPointerInfo::ID, &AAPotentialConstantValues::ID, &AAUnderlyingObjects::ID, &AAAddressSpace::ID, &AAIndirectCallInfo::ID, - &AAInstanceInfo::ID}); + &AAInstanceInfo::ID, &AAAlign::ID}); shiltian wrote: agreed https://github.com/llvm/llvm-project/pull/145278 ___ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
@@ -5500,7 +5504,34 @@ struct AAAlignCallSiteReturned final
using Base = AACalleeToCallSite;
AAAlignCallSiteReturned(const IRPosition &IRP, Attributor &A)
: Base(IRP, A) {}
+ ChangeStatus updateImpl(Attributor &A) override {
+SmallVector Values;
+const auto &AligmentCBs = A.getAlignmentCallback(getIRPosition());
+
+if (!AligmentCBs.empty()) {
+ for (const auto &CB : AligmentCBs) {
+CB(getIRPosition(), this, Values);
+ }
+
+ if (!Values.empty()) {
+StateType T;
+for (const auto &VAC : Values) {
shiltian wrote:
no auto
https://github.com/llvm/llvm-project/pull/145278
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[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
@@ -5500,7 +5504,34 @@ struct AAAlignCallSiteReturned final
using Base = AACalleeToCallSite;
AAAlignCallSiteReturned(const IRPosition &IRP, Attributor &A)
: Base(IRP, A) {}
+ ChangeStatus updateImpl(Attributor &A) override {
+SmallVector Values;
+const auto &AligmentCBs = A.getAlignmentCallback(getIRPosition());
shiltian wrote:
no auto
https://github.com/llvm/llvm-project/pull/145278
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[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
@@ -5500,7 +5504,34 @@ struct AAAlignCallSiteReturned final
using Base = AACalleeToCallSite;
AAAlignCallSiteReturned(const IRPosition &IRP, Attributor &A)
: Base(IRP, A) {}
+ ChangeStatus updateImpl(Attributor &A) override {
+SmallVector Values;
+const auto &AligmentCBs = A.getAlignmentCallback(getIRPosition());
+
+if (!AligmentCBs.empty()) {
+ for (const auto &CB : AligmentCBs) {
+CB(getIRPosition(), this, Values);
+ }
shiltian wrote:
```suggestion
for (const auto &CB : AligmentCBs)
CB(getIRPosition(), this, Values);
```
https://github.com/llvm/llvm-project/pull/145278
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[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
@@ -5500,7 +5504,34 @@ struct AAAlignCallSiteReturned final
using Base = AACalleeToCallSite;
AAAlignCallSiteReturned(const IRPosition &IRP, Attributor &A)
: Base(IRP, A) {}
+ ChangeStatus updateImpl(Attributor &A) override {
+SmallVector Values;
+const auto &AligmentCBs = A.getAlignmentCallback(getIRPosition());
+
+if (!AligmentCBs.empty()) {
shiltian wrote:
since `lookup` will do a default construct, you don't need to check emptiness
here.
https://github.com/llvm/llvm-project/pull/145278
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[clang] [llvm] [AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst (PR #145278)
https://github.com/Shoreshen updated https://github.com/llvm/llvm-project/pull/145278 >From 888df5412b37bd3f232bdb38c9f89786d042fe75 Mon Sep 17 00:00:00 2001 From: shore <[email protected]> Date: Mon, 23 Jun 2025 14:12:15 +0800 Subject: [PATCH 1/4] Add alignment attr & propagate alignment through make.buffer.rsrc inst --- llvm/include/llvm/Transforms/IPO/Attributor.h | 22 ++ llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp | 37 - .../Transforms/IPO/AttributorAttributes.cpp | 14 ++- llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll | 40 +++ 4 files changed, 110 insertions(+), 3 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll diff --git a/llvm/include/llvm/Transforms/IPO/Attributor.h b/llvm/include/llvm/Transforms/IPO/Attributor.h index e6eb756df987d..64285c2114976 100644 --- a/llvm/include/llvm/Transforms/IPO/Attributor.h +++ b/llvm/include/llvm/Transforms/IPO/Attributor.h @@ -1355,6 +1355,12 @@ struct InformationCache { /// Return the flat address space if the associated target has. LLVM_ABI std::optional getFlatAddressSpace() const; + virtual bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const { +return false; + } + private: struct FunctionInfo { LLVM_ABI ~FunctionInfo(); @@ -2042,6 +2048,19 @@ struct Attributor { SimplificationCallbacks[IRP].emplace_back(CB); } + using AlignmentCallbackTy = + std::function &)>; + void registerAlignmentCallback(const IRPosition &IRP, + const AlignmentCallbackTy &CB) { +AlignmentCallBacks[IRP].emplace_back(CB); + } + + SmallVector + getAlignmentCallback(const IRPosition &IRP) { +return AlignmentCallBacks.lookup(IRP); + } + /// Return true if there is a simplification callback for \p IRP. bool hasSimplificationCallback(const IRPosition &IRP) { return SimplificationCallbacks.count(IRP); @@ -2093,6 +2112,9 @@ struct Attributor { DenseMap> SimplificationCallbacks; + /// The vector with AAAlign callbacks registered by outside AAs. + DenseMap> AlignmentCallBacks; + /// The vector with all simplification callbacks for global variables /// registered by outside AAs. DenseMap(AA)) { +if (const auto *II = dyn_cast(I)) { + if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) +return true; +} + } + + return false; +} + namespace { class AMDGPUInformationCache : public InformationCache { public: @@ -235,6 +247,12 @@ class AMDGPUInformationCache : public InformationCache { return ST.getMaxWavesPerEU(); } + bool shouldTrackUse(const AbstractAttribute *QueryingAA, + Value &AssociatedValue, const Use *U, + const Instruction *I) const override { +return isAlignAndMakeBuffer(QueryingAA, I); + } + private: /// Check if the ConstantExpr \p CE uses an addrspacecast from private or /// local to flat. These casts may require the queue pointer. @@ -1381,7 +1399,7 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, &AAAMDMaxNumWorkgroups::ID, &AAAMDWavesPerEU::ID, &AAAMDGPUNoAGPR::ID, &AACallEdges::ID, &AAPointerInfo::ID, &AAPotentialConstantValues::ID, &AAUnderlyingObjects::ID, &AAAddressSpace::ID, &AAIndirectCallInfo::ID, - &AAInstanceInfo::ID}); + &AAInstanceInfo::ID, &AAAlign::ID}); AttributorConfig AC(CGUpdater); AC.IsClosedWorldModule = Options.IsClosedWorld; @@ -1432,6 +1450,23 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, } else if (auto *CmpX = dyn_cast(&I)) { A.getOrCreateAAFor( IRPosition::value(*CmpX->getPointerOperand())); + } else if (auto *II = dyn_cast(&I)) { +if (II->getIntrinsicID() == Intrinsic::amdgcn_make_buffer_rsrc) { + IRPosition IRP = IRPosition::inst(*II); + + Attributor::AlignmentCallbackTy ACB = + [](const IRPosition &IRP, const AbstractAttribute *AA, + SmallVectorImpl &Values) { +if (auto *I = dyn_cast(&IRP.getAssociatedValue())) + if (isAlignAndMakeBuffer(AA, I)) { +Values.push_back( +AA::ValueAndContext{*I->getOperand(0), nullptr}); + } + }; + A.registerAlignmentCallback(IRP, ACB); + + A.getOrCreateAAFor(IRP); +} } } } diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp index 3799a696f67af..cca03b30e75c7 100644 --- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp +++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp @@ -5202,6 +5202,10 @@ static unsigned getKnownAlignForUse(Attributor &A, AAAlign &QueryingAA, TrackUse = true; return 0; }
