[clang] [llvm] [LLVM][AArch64] Add "u" variants of sve.[s,u]hsub intrinsics (PR #170894)

2025-12-12 Thread LLVM Continuous Integration via cfe-commits 

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `arc-builder` running on 
`arc-worker` while building `clang,llvm` at step 6 
"test-build-unified-tree-check-all".

Full details are available at: 
https://lab.llvm.org/buildbot/#/builders/3/builds/26161


Here is the relevant piece of the build log for the reference

```
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
 TEST 'LLVM :: CodeGen/X86/sse2-intrinsics-fast-isel.ll' 
FAILED 
Exit Code: 1

Command Output (stdout):
--
# RUN: at line 2
/buildbot/worker/arc-folder/build/bin/llc < 
/buildbot/worker/arc-folder/llvm-project/llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
 -show-mc-encoding -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse2 | 
/buildbot/worker/arc-folder/build/bin/FileCheck 
/buildbot/worker/arc-folder/llvm-project/llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
 --check-prefixes=CHECK,X86,SSE,X86-SSE
# executed command: /buildbot/worker/arc-folder/build/bin/llc -show-mc-encoding 
-fast-isel -mtriple=i386-unknown-unknown -mattr=+sse2
# .---command stderr
# | LLVM ERROR: Cannot select: intrinsic %llvm.x86.sse2.clflush
# | PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ 
and include the crash backtrace and instructions to reproduce the bug.
# | Stack dump:
# | 0.  Program arguments: /buildbot/worker/arc-folder/build/bin/llc 
-show-mc-encoding -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse2
# | 1.  Running pass 'Function Pass Manager' on module ''.
# | 2.  Running pass 'X86 DAG->DAG Instruction Selection' on function 
'@test_mm_clflush'
# |  #0 0x023b52a8 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) 
(/buildbot/worker/arc-folder/build/bin/llc+0x23b52a8)
# |  #1 0x023b21b5 SignalHandler(int, siginfo_t*, void*) Signals.cpp:0:0
# |  #2 0x7ffb28e58630 __restore_rt sigaction.c:0:0
# |  #3 0x7ffb27ba83d7 raise (/usr/lib64/libc.so.6+0x363d7)
# |  #4 0x7ffb27ba9ac8 abort (/usr/lib64/libc.so.6+0x37ac8)
# |  #5 0x0072e059 llvm::json::operator==(llvm::json::Value const&, 
llvm::json::Value const&) (.cold) JSON.cpp:0:0
# |  #6 0x021351f9 
llvm::SelectionDAGISel::CannotYetSelect(llvm::SDNode*) 
(/buildbot/worker/arc-folder/build/bin/llc+0x21351f9)
# |  #7 0x02139eb1 
llvm::SelectionDAGISel::SelectCodeCommon(llvm::SDNode*, unsigned char const*, 
unsigned int) (/buildbot/worker/arc-folder/build/bin/llc+0x2139eb1)
# |  #8 0x00971da7 (anonymous 
namespace)::X86DAGToDAGISel::Select(llvm::SDNode*) X86ISelDAGToDAG.cpp:0:0
# |  #9 0x0213098f llvm::SelectionDAGISel::DoInstructionSelection() 
(/buildbot/worker/arc-folder/build/bin/llc+0x213098f)
# | #10 0x02141348 llvm::SelectionDAGISel::CodeGenAndEmitDAG() 
(/buildbot/worker/arc-folder/build/bin/llc+0x2141348)
# | #11 0x021455f3 
llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) 
(/buildbot/worker/arc-folder/build/bin/llc+0x21455f3)
# | #12 0x021460ec 
llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) 
(/buildbot/worker/arc-folder/build/bin/llc+0x21460ec)
# | #13 0x0213019f 
llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&) 
(/buildbot/worker/arc-folder/build/bin/llc+0x213019f)
# | #14 0x0122db97 
llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (.part.0) 
MachineFunctionPass.cpp:0:0
# | #15 0x018b5a8b llvm::FPPassManager::runOnFunction(llvm::Function&) 
(/buildbot/worker/arc-folder/build/bin/llc+0x18b5a8b)
# | #16 0x018b5e31 llvm::FPPassManager::runOnModule(llvm::Module&) 
(/buildbot/worker/arc-folder/build/bin/llc+0x18b5e31)
# | #17 0x018b6a45 llvm::legacy::PassManagerImpl::run(llvm::Module&) 
(/buildbot/worker/arc-folder/build/bin/llc+0x18b6a45)
# | #18 0x00811d60 compileModule(char**, llvm::LLVMContext&, 
std::__cxx11::basic_string, 
std::allocator>&) llc.cpp:0:0
# | #19 0x007365c9 main 
(/buildbot/worker/arc-folder/build/bin/llc+0x7365c9)
# | #20 0x7ffb27b94555 __libc_start_main (/usr/lib64/libc.so.6+0x22555)
# | #21 0x00806d96 _start 
(/buildbot/worker/arc-folder/build/bin/llc+0x806d96)
# `-
# error: command failed with exit status: -6
# executed command: /buildbot/worker/arc-folder/build/bin/FileCheck 
/buildbot/worker/arc-folder/llvm-project/llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
 --check-prefixes=CHECK,X86,SSE,X86-SSE
# .---command stderr
# | 
/buildbot/worker/arc-folder/llvm-project/llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll:399:14:
 error: SSE-LABEL: expected string not found in input
# | ; SSE-LABEL: test_mm_bsrli_si128:
# |  ^
# | :170:21: note: scanning from here
# | test_mm_bslli_si128: # @test_mm_bslli_si128
# | ^
# | :178:9: note: possible intended match here
# |  .globl test_mm_bsrli_si128 # 
# | ^
...

```



https://github.com/llvm/l

[clang] [llvm] [LLVM][AArch64] Add "u" variants of sve.[s,u]hsub intrinsics (PR #170894)

2025-12-12 Thread Paul Walker via cfe-commits 

https://github.com/paulwalker-arm closed 
https://github.com/llvm/llvm-project/pull/170894
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[clang] [llvm] [LLVM][AArch64] Add "u" variants of sve.[s,u]hsub intrinsics (PR #170894)

2025-12-11 Thread Paul Walker via cfe-commits 

https://github.com/paulwalker-arm updated 
https://github.com/llvm/llvm-project/pull/170894

>From bec731b7ea9a85b28ccae0cb6ec9b754b23000fe Mon Sep 17 00:00:00 2001
From: Paul Walker 
Date: Tue, 2 Dec 2025 12:33:17 +
Subject: [PATCH] [LLVM][AArch64] Add "u" variants of sve.[s,u]hsub intrinsics

---
 clang/include/clang/Basic/arm_sve.td  |   8 +-
 .../AArch64/sve2-intrinsics/acle_sve2_hsub.c  |  64 ++--
 .../AArch64/sve2-intrinsics/acle_sve2_hsubr.c |  64 ++--
 llvm/include/llvm/IR/IntrinsicsAArch64.td |   2 +
 .../lib/Target/AArch64/AArch64SVEInstrInfo.td |  11 +-
 llvm/lib/Target/AArch64/AArch64SchedA320.td   |   2 +-
 llvm/lib/Target/AArch64/AArch64SchedA510.td   |   2 +-
 .../Target/AArch64/AArch64SchedNeoverseN2.td  |   2 +-
 .../Target/AArch64/AArch64SchedNeoverseN3.td  |   2 +-
 .../Target/AArch64/AArch64SchedNeoverseV2.td  |   2 +-
 .../Target/AArch64/AArch64SchedNeoverseV3.td  |   2 +-
 .../AArch64/AArch64SchedNeoverseV3AE.td   |   2 +-
 .../AArch64/AArch64TargetTransformInfo.cpp|   8 +
 .../sve2-intrinsics-uniform-dsp-undef.ll  | 296 ++
 .../sve-intrinsic-comb-no-active-lanes.ll |  12 +-
 .../sve-intrinsic-simplify-to-u-form.ll   |  44 +++
 16 files changed, 436 insertions(+), 87 deletions(-)

diff --git a/clang/include/clang/Basic/arm_sve.td 
b/clang/include/clang/Basic/arm_sve.td
index ed41b43162109..a4a0ee7ed5f5f 100644
--- a/clang/include/clang/Basic/arm_sve.td
+++ b/clang/include/clang/Basic/arm_sve.td
@@ -1292,10 +1292,10 @@ defm SVQSUB_S  : SInstZPZZ<"svqsub",  "csli", 
"aarch64_sve_sqsub",  "aarch64
 defm SVQSUB_U  : SInstZPZZ<"svqsub",  "UcUsUiUl", "aarch64_sve_uqsub",  
"aarch64_sve_uqsub_u">;
 defm SVQSUBR_S : SInstZPZZ<"svqsubr", "csli", "aarch64_sve_sqsubr", 
"aarch64_sve_sqsub_u", [ReverseMergeAnyBinOp]>;
 defm SVQSUBR_U : SInstZPZZ<"svqsubr", "UcUsUiUl", "aarch64_sve_uqsubr", 
"aarch64_sve_uqsub_u", [ReverseMergeAnyBinOp]>;
-defm SVHSUB_S  : SInstZPZZ<"svhsub",  "csli", "aarch64_sve_shsub",  
"aarch64_sve_shsub">;
-defm SVHSUB_U  : SInstZPZZ<"svhsub",  "UcUsUiUl", "aarch64_sve_uhsub",  
"aarch64_sve_uhsub">;
-defm SVHSUBR_S : SInstZPZZ<"svhsubr", "csli", "aarch64_sve_shsubr", 
"aarch64_sve_shsubr">;
-defm SVHSUBR_U : SInstZPZZ<"svhsubr", "UcUsUiUl", "aarch64_sve_uhsubr", 
"aarch64_sve_uhsubr">;
+defm SVHSUB_S  : SInstZPZZ<"svhsub",  "csli", "aarch64_sve_shsub",  
"aarch64_sve_shsub_u">;
+defm SVHSUB_U  : SInstZPZZ<"svhsub",  "UcUsUiUl", "aarch64_sve_uhsub",  
"aarch64_sve_uhsub_u">;
+defm SVHSUBR_S : SInstZPZZ<"svhsubr", "csli", "aarch64_sve_shsubr", 
"aarch64_sve_shsub_u", [ReverseMergeAnyBinOp]>;
+defm SVHSUBR_U : SInstZPZZ<"svhsubr", "UcUsUiUl", "aarch64_sve_uhsubr", 
"aarch64_sve_uhsub_u", [ReverseMergeAnyBinOp]>;
 
 defm SVQABS   : SInstZPZ<"svqabs",   "csil", "aarch64_sve_sqabs">;
 defm SVQNEG   : SInstZPZ<"svqneg",   "csil", "aarch64_sve_sqneg">;
diff --git a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsub.c 
b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsub.c
index 22c11466a7288..e101dd2fe3399 100644
--- a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsub.c
+++ b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsub.c
@@ -297,12 +297,12 @@ svuint64_t test_svhsub_u64_m(svbool_t pg, svuint64_t op1, 
svuint64_t op2)
 
 // CHECK-LABEL: @test_svhsub_s8_x(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]],  [[OP1:%.*]],  [[OP2:%.*]])
+// CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.aarch64.sve.shsub.u.nxv16i8( [[PG:%.*]],  [[OP1:%.*]],  [[OP2:%.*]])
 // CHECK-NEXT:ret  [[TMP0]]
 //
 // CPP-CHECK-LABEL: @_Z16test_svhsub_s8_xu10__SVBool_tu10__SVInt8_tS0_(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]],  [[OP1:%.*]],  [[OP2:%.*]])
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.aarch64.sve.shsub.u.nxv16i8( [[PG:%.*]],  [[OP1:%.*]],  [[OP2:%.*]])
 // CPP-CHECK-NEXT:ret  [[TMP0]]
 //
 svint8_t test_svhsub_s8_x(svbool_t pg, svint8_t op1, svint8_t op2)
@@ -313,13 +313,13 @@ svint8_t test_svhsub_s8_x(svbool_t pg, svint8_t op1, 
svint8_t op2)
 // CHECK-LABEL: @test_svhsub_s16_x(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]])
-// CHECK-NEXT:[[TMP1:%.*]] = tail call  
@llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]],  
[[OP1:%.*]],  [[OP2:%.*]])
+// CHECK-NEXT:[[TMP1:%.*]] = tail call  
@llvm.aarch64.sve.shsub.u.nxv8i16( [[TMP0]],  [[OP1:%.*]],  [[OP2:%.*]])
 // CHECK-NEXT:ret  [[TMP1]]
 //
 // CPP-CHECK-LABEL: @_Z17test_svhsub_s16_xu10__SVBool_tu11__SVInt16_tS0_(
 // CPP-CHECK-NEXT:  entry:
 // CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]])
-// CPP-CHECK-NEXT:[[TMP1:%.*]] = tail call  
@llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]],  
[[OP1:%.*]],  [[OP2:%.*]])
+// CPP-CHECK-NEXT:[[TMP

[clang] [llvm] [LLVM][AArch64] Add "u" variants of sve.[s,u]hsub intrinsics (PR #170894)

2025-12-09 Thread Paul Walker via cfe-commits 


@@ -2125,7 +2125,7 @@ def : InstRW<[V2Write_2c_1V],
 "^ADR_LSL_ZZZ_[SD]_[0123]",
 "^[SU](ADD|SUB)[LW][BT]_ZZZ_[HSD]",
 "^SADDLBT_ZZZ_[HSD]",
-"^[SU]H(ADD|SUB|SUBR)_ZPmZ_[BHSD]",
+"^[SU]H(ADD|SUB|SUBR)_(ZPmZ|ZPZZ)_[BHSD]",

paulwalker-arm wrote:

Sounds like a fantastic idea to me.  I've done this under 
https://github.com/llvm/llvm-project/pull/171487 and will update this PR once 
I'm confident there's no fallout.

https://github.com/llvm/llvm-project/pull/170894
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[clang] [llvm] [LLVM][AArch64] Add "u" variants of sve.[s,u]hsub intrinsics (PR #170894)

2025-12-08 Thread Paul Walker via cfe-commits 

https://github.com/paulwalker-arm edited 
https://github.com/llvm/llvm-project/pull/170894
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