subject:"\[clang\] \[llvm\] \[PowerPC\] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support \(PR #154715\)"

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-21 Thread LLVM Continuous Integration via cfe-commits


llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder 
`sanitizer-x86_64-linux-bootstrap-asan` running on `sanitizer-buildbot2` while 
building `clang,llvm` at step 2 "annotate".

Full details are available at: 
https://lab.llvm.org/buildbot/#/builders/52/builds/14463


Here is the relevant piece of the build log for the reference

```
Step 2 (annotate) failure: 'python 
../sanitizer_buildbot/sanitizers/zorg/buildbot/builders/sanitizers/buildbot_selector.py'
 (failure)
...
llvm-lit: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/utils/lit/lit/llvm/config.py:561:
 note: using lld-link: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/lld-link
llvm-lit: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/utils/lit/lit/llvm/config.py:561:
 note: using ld64.lld: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/ld64.lld
llvm-lit: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/utils/lit/lit/llvm/config.py:561:
 note: using wasm-ld: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/wasm-ld
llvm-lit: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/utils/lit/lit/llvm/config.py:561:
 note: using ld.lld: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/ld.lld
llvm-lit: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/utils/lit/lit/llvm/config.py:561:
 note: using lld-link: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/lld-link
llvm-lit: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/utils/lit/lit/llvm/config.py:561:
 note: using ld64.lld: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/ld64.lld
llvm-lit: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/utils/lit/lit/llvm/config.py:561:
 note: using wasm-ld: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/wasm-ld
llvm-lit: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/utils/lit/lit/main.py:74:
 note: The test suite configuration requested an individual test timeout of 0 
seconds but a timeout of 900 seconds was requested on the command line. Forcing 
timeout to be 900 seconds.
-- Testing: 95494 tests, 64 workers --
Testing:  0.. 10.. 20.. 30.. 40.. 50.. 
FAIL: LLVM :: ExecutionEngine/OrcLazy/global-ctors-and-dtors.ll (58780 of 95494)
 TEST 'LLVM :: 
ExecutionEngine/OrcLazy/global-ctors-and-dtors.ll' FAILED 
Exit Code: 1

Command Output (stdout):
--
# RUN: at line 3
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/lli 
-jit-kind=orc-lazy -orc-lazy-debug=funcs-to-stdout -extra-module 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/test/ExecutionEngine/OrcLazy/global-ctors-and-dtors.ll

/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/test/ExecutionEngine/OrcLazy/Inputs/noop-main.ll
 | 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/FileCheck
 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/test/ExecutionEngine/OrcLazy/global-ctors-and-dtors.ll
# executed command: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/lli 
-jit-kind=orc-lazy -orc-lazy-debug=funcs-to-stdout -extra-module 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/test/ExecutionEngine/OrcLazy/global-ctors-and-dtors.ll
 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/test/ExecutionEngine/OrcLazy/Inputs/noop-main.ll
# note: command had no output on stdout or stderr
# executed command: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/FileCheck
 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/test/ExecutionEngine/OrcLazy/global-ctors-and-dtors.ll
# note: command had no output on stdout or stderr
# RUN: at line 8
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/lli 
-jit-kind=orc-lazy -orc-lazy-debug=funcs-to-stdout-jd extra -extra-module 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/test/ExecutionEngine/OrcLazy/global-ctors-and-dtors.ll
 -jd main 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/test/ExecutionEngine/OrcLazy/Inputs/noop-main.ll
 | 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/FileCheck
 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/test/ExecutionEngine/OrcLazy/global-ctors-and-dtors.ll
# executed command: 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm_build_asan/bin/lli 
-jit-kind=orc-lazy -orc-lazy-debug=funcs-to-stdout -jd extra -extra-module 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/build/llvm-project/llvm/test/ExecutionEngine/OrcLazy/global-ctors-and-dtors.ll
 -jd main 
/home/b/sanitizer-x86_64-linux-bootstrap-asan/buil

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-21 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM closed 
https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-21 Thread Aditi Medhane via cfe-commits



@@ -114,6 +114,36 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit error diagnostics and return true on success
+  //  - IsVectorType: enforces vector unsigned char
+  //  - IsIntType: enforces any integer type
+  // Lambdas centralize type checks for BCD builtin handlers
+
+  // Lambda 1: verify vector unsigned char type
+  auto IsVectorType = [&](QualType ArgTy, unsigned ArgIndex) -> bool {
+QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+ VectorKind::AltiVecVector);
+if (Context.hasSameType(ArgTy, VecType))
+  return true;
+
+Diag(TheCall->getArg(ArgIndex)->getBeginLoc(),
+ diag::err_ppc_invalid_arg_type)
+<< ArgIndex << VecType << ArgTy;
+return false;
+  };
+
+  // Lambda 2: verify integer type
+  auto IsIntType = [&](QualType ArgTy, unsigned ArgIndex) -> bool {
+if (ArgTy->isIntegerType())
+  return true;
+
+Diag(TheCall->getArg(ArgIndex)->getBeginLoc(),
+ diag::err_ppc_invalid_arg_type)
+<< ArgIndex << "integer" << ArgTy;
+return false;
+  };

AditiRM wrote:

Thanks, noted. I’ll investigate how diagnostics are produced for normal 
builtins and follow this up as a separate issue.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-21 Thread Aditi Medhane via cfe-commits



@@ -114,6 +114,36 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit error diagnostics and return true on success
+  //  - IsVectorType: enforces vector unsigned char
+  //  - IsIntType: enforces any integer type
+  // Lambdas centralize type checks for BCD builtin handlers
+
+  // Lambda 1: verify vector unsigned char type
+  auto IsVectorType = [&](QualType ArgTy, unsigned ArgIndex) -> bool {

AditiRM wrote:

done.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-20 Thread Lei Huang via cfe-commits


https://github.com/lei137 approved this pull request.

Please address nit before commit.
Thx

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-20 Thread Lei Huang via cfe-commits


https://github.com/lei137 edited 
https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-20 Thread Lei Huang via cfe-commits



@@ -114,6 +114,36 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit error diagnostics and return true on success
+  //  - IsVectorType: enforces vector unsigned char
+  //  - IsIntType: enforces any integer type
+  // Lambdas centralize type checks for BCD builtin handlers
+
+  // Lambda 1: verify vector unsigned char type
+  auto IsVectorType = [&](QualType ArgTy, unsigned ArgIndex) -> bool {
+QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+ VectorKind::AltiVecVector);
+if (Context.hasSameType(ArgTy, VecType))
+  return true;
+
+Diag(TheCall->getArg(ArgIndex)->getBeginLoc(),
+ diag::err_ppc_invalid_arg_type)
+<< ArgIndex << VecType << ArgTy;
+return false;
+  };
+
+  // Lambda 2: verify integer type
+  auto IsIntType = [&](QualType ArgTy, unsigned ArgIndex) -> bool {
+if (ArgTy->isIntegerType())
+  return true;
+
+Diag(TheCall->getArg(ArgIndex)->getBeginLoc(),
+ diag::err_ppc_invalid_arg_type)
+<< ArgIndex << "integer" << ArgTy;
+return false;
+  };

lei137 wrote:

Feel like we should have this kind of check functions already elsewhere... but 
I won't block this PR for this.  Please do investigate as a followup. 

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-20 Thread Lei Huang via cfe-commits



@@ -114,6 +114,36 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit error diagnostics and return true on success
+  //  - IsVectorType: enforces vector unsigned char
+  //  - IsIntType: enforces any integer type
+  // Lambdas centralize type checks for BCD builtin handlers
+
+  // Lambda 1: verify vector unsigned char type
+  auto IsVectorType = [&](QualType ArgTy, unsigned ArgIndex) -> bool {

lei137 wrote:

nit: lambda name should be more specific to your check.  eg `IsTypeVecUChar()`

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-20 Thread Aditi Medhane via cfe-commits



@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> 
@llvm.ppc.bcdshiftround(<16 x i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshiftround_imm0(vector unsigned char a,int b, 
unsigned char c){
+return __builtin_ppc_bcdshiftround(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> 
@llvm.ppc.bcdshiftround(<16 x i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshiftround_imm1(vector unsigned char a,int b, 
unsigned char c){
+return __builtin_ppc_bcdshiftround(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdtruncate_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdtruncate(<16 
x i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdtruncate_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdtruncate(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdtruncate_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdtruncate(<16 
x i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdtruncate_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdtruncate(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdunsignedtruncate
+// CHECK:   [[TMP0:%.*]] = tail call <16 x i8> 
@llvm.ppc.bcdunsignedtruncate(<16 x i8> %a, i32 %b)
+// CHECK-NEXT:   ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdunsignedtruncate(vector unsigned char a, int b) {
+return __builtin_ppc_bcdunsignedtruncate(a, b);
+}
+
+// CHECK-LABEL: test_bcdunsignedshift
+// CHECK:   [[TMP0:%.*]] = tail call <16 x i8> 
@llvm.ppc.bcdunsignedshift(<16 x i8> %a, i32 %b)
+// CHECK-NEXT:   ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdunsignedshift(vector unsigned char a, int b){
+return __builtin_ppc_bcdunsignedshift(a,b);
+}

AditiRM wrote:

done

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-20 Thread Aditi Medhane via cfe-commits



@@ -0,0 +1,40 @@
+// Testfile to verify Sema diagnostics for BCD builtins bcdshift, 
bcdshiftround, bcdtruncate.
+
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64-unknown-unknown 
-fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -triple 
powerpc64le-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown 
-fsyntax-only -verify %s
+
+#include 
+#define DECL_COMMON_VARS\
+  vector unsigned char vec = {1,2,3,4}; \
+  unsigned char scalar = 1; \
+  int i = 1;\
+  float f = 1.0f;
+
+vector unsigned char test_bcdshift(void) {
+  DECL_COMMON_VARS
+  vector unsigned char res_a = __builtin_ppc_bcdshift(scalar, i, i); // 
expected-error {{argument 0 must be of type '__vector unsigned char' (vector of 
16 'unsigned char' values)}}
+  vector unsigned char res_b = __builtin_ppc_bcdshift(vec, f, i); // 
expected-error {{argument 1 must be of integer type}}
+  vector unsigned char res_c =  __builtin_ppc_bcdshift(vec, i, 2); // 
expected-error-re {{argument value {{.*}} is outside the valid range}}
+  vector unsigned char res_d = __builtin_ppc_bcdshift(vec, i, -1); // 
expected-error-re {{argument value {{.*}} is outside the valid range}}
+  return __builtin_ppc_bcdshift(vec, i, 1);
+}
+
+vector unsigned char test_bcdshiftround(void) {
+  DECL_COMMON_VARS
+  vector unsigned char res_a = __builtin_ppc_bcdshiftround(scalar, i, i); // 
expected-error {{argument 0 must be of type '__vector unsigned char' (vector of 
16 'unsigned char' values)}}
+  vector unsigned char res_b = __builtin_ppc_bcdshiftround(vec, f, i); // 
expected-error {{argument 1 must be of integer type}}
+  vector unsigned char res_c = __builtin_ppc_bcdshiftround(vec, i, 2); // 
expected-error-re {{argument value {{.*}} is outside the valid range}}
+  vector unsigned char res_d = __builtin_ppc_bcdshiftround(vec, i, -1); // 
expected-error-re {{argument value {{.*}} is outside the valid range}}
+  return __builtin_ppc_bcdshiftround(vec, i, 1);
+}
+
+vector unsigned char test_bcdtruncate(void) {
+  DECL_COMMON_VARS
+  vector unsigned char res_a =  __builtin_ppc_bcdtruncate(scalar, i, i); // 
expected-error {{argument 0 must be of type '__vector unsigned char' (vector of 
16 'unsigned char' values)}}
+  vector unsigned char res_b =  __builtin_ppc_bcdtruncate(vec, f, i); // 
expected-error {{argument 1 must be of integer type}}
+  vector unsigned char res_c =  __builtin_ppc_bcdtruncate(vec, i, 2); // 
expected-error-re {{argument value {{.*}} is outside the valid range}}
+  vector unsigned char res_d =  __builtin_ppc_bcdtruncate(vec, i, -1); // 
expected-error-re {{argument value {{.*}} is outside the valid range}}
+  return  __builtin_ppc_bcdtruncate(vec, i, 1);
+}

AditiRM wrote:

done

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-20 Thread Aditi Medhane via cfe-commits



@@ -11224,6 +11224,10 @@ def err_ppc_invalid_use_mma_type : Error<
   "invalid use of PPC MMA type">;
 def err_ppc_invalid_test_data_class_type : Error<
   "expected a 'float', 'double' or '__float128' for the first argument">;
+def err_ppc_invalid_vector_type : Error<
+  "argument %0 must be of type %1">;
+def err_ppc_invalid_integer_type : Error<
+  "argument %0 must be of %1">;

AditiRM wrote:

done, implemented the suggestion and adjusted the wording to keep the 
diagnostic clear.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-20 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/33] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-20 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM deleted 
https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-20 Thread Aditi Medhane via cfe-commits



@@ -104,6 +104,33 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit error diagnostics and return true on success
+  //  - IsVectorType: enforces vector unsigned char
+  //  - IsIntType: enforces any integer type
+  // Lambdas centralize type checks for BCD builtin handlers
+  QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+   VectorKind::AltiVecVector);

AditiRM wrote:

makes sense. i’ve moved the vector type construction inside `IsVectorType` so 
it’s only created when needed and scoped to that check.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-20 Thread Aditi Medhane via cfe-commits



@@ -11224,6 +11224,10 @@ def err_ppc_invalid_use_mma_type : Error<
   "invalid use of PPC MMA type">;
 def err_ppc_invalid_test_data_class_type : Error<
   "expected a 'float', 'double' or '__float128' for the first argument">;
+def err_ppc_invalid_vector_type : Error<
+  "argument %0 must be of type %1">;
+def err_ppc_invalid_integer_type : Error<
+  "argument %0 must be of %1">;

AditiRM wrote:

i think we need two diagnostics for clarity. vector args use a concrete clang 
type, so "argument %0 must be of type %1" formats correctly (e.g.` __vector 
unsigned char`). integer args use a type category (`"integer type"`), and using 
the same wording results in awkward output like `of type integer type`. keeping 
separate diagnostics preserves correct grammar and clearer user-facing errors.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-14 Thread Lei Huang via cfe-commits



@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> 
@llvm.ppc.bcdshiftround(<16 x i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshiftround_imm0(vector unsigned char a,int b, 
unsigned char c){
+return __builtin_ppc_bcdshiftround(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> 
@llvm.ppc.bcdshiftround(<16 x i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshiftround_imm1(vector unsigned char a,int b, 
unsigned char c){
+return __builtin_ppc_bcdshiftround(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdtruncate_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdtruncate(<16 
x i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdtruncate_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdtruncate(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdtruncate_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdtruncate(<16 
x i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdtruncate_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdtruncate(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdunsignedtruncate
+// CHECK:   [[TMP0:%.*]] = tail call <16 x i8> 
@llvm.ppc.bcdunsignedtruncate(<16 x i8> %a, i32 %b)
+// CHECK-NEXT:   ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdunsignedtruncate(vector unsigned char a, int b) {
+return __builtin_ppc_bcdunsignedtruncate(a, b);
+}
+
+// CHECK-LABEL: test_bcdunsignedshift
+// CHECK:   [[TMP0:%.*]] = tail call <16 x i8> 
@llvm.ppc.bcdunsignedshift(<16 x i8> %a, i32 %b)
+// CHECK-NEXT:   ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdunsignedshift(vector unsigned char a, int b){
+return __builtin_ppc_bcdunsignedshift(a,b);
+}

lei137 wrote:

same comment as below

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-14 Thread Lei Huang via cfe-commits



@@ -0,0 +1,40 @@
+// Testfile to verify Sema diagnostics for BCD builtins bcdshift, 
bcdshiftround, bcdtruncate.
+
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64-unknown-unknown 
-fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -triple 
powerpc64le-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown 
-fsyntax-only -verify %s
+
+#include 
+#define DECL_COMMON_VARS\
+  vector unsigned char vec = {1,2,3,4}; \
+  unsigned char scalar = 1; \
+  int i = 1;\
+  float f = 1.0f;
+
+vector unsigned char test_bcdshift(void) {
+  DECL_COMMON_VARS
+  vector unsigned char res_a = __builtin_ppc_bcdshift(scalar, i, i); // 
expected-error {{argument 0 must be of type '__vector unsigned char' (vector of 
16 'unsigned char' values)}}
+  vector unsigned char res_b = __builtin_ppc_bcdshift(vec, f, i); // 
expected-error {{argument 1 must be of integer type}}
+  vector unsigned char res_c =  __builtin_ppc_bcdshift(vec, i, 2); // 
expected-error-re {{argument value {{.*}} is outside the valid range}}
+  vector unsigned char res_d = __builtin_ppc_bcdshift(vec, i, -1); // 
expected-error-re {{argument value {{.*}} is outside the valid range}}
+  return __builtin_ppc_bcdshift(vec, i, 1);
+}
+
+vector unsigned char test_bcdshiftround(void) {
+  DECL_COMMON_VARS
+  vector unsigned char res_a = __builtin_ppc_bcdshiftround(scalar, i, i); // 
expected-error {{argument 0 must be of type '__vector unsigned char' (vector of 
16 'unsigned char' values)}}
+  vector unsigned char res_b = __builtin_ppc_bcdshiftround(vec, f, i); // 
expected-error {{argument 1 must be of integer type}}
+  vector unsigned char res_c = __builtin_ppc_bcdshiftround(vec, i, 2); // 
expected-error-re {{argument value {{.*}} is outside the valid range}}
+  vector unsigned char res_d = __builtin_ppc_bcdshiftround(vec, i, -1); // 
expected-error-re {{argument value {{.*}} is outside the valid range}}
+  return __builtin_ppc_bcdshiftround(vec, i, 1);
+}
+
+vector unsigned char test_bcdtruncate(void) {
+  DECL_COMMON_VARS
+  vector unsigned char res_a =  __builtin_ppc_bcdtruncate(scalar, i, i); // 
expected-error {{argument 0 must be of type '__vector unsigned char' (vector of 
16 'unsigned char' values)}}
+  vector unsigned char res_b =  __builtin_ppc_bcdtruncate(vec, f, i); // 
expected-error {{argument 1 must be of integer type}}
+  vector unsigned char res_c =  __builtin_ppc_bcdtruncate(vec, i, 2); // 
expected-error-re {{argument value {{.*}} is outside the valid range}}
+  vector unsigned char res_d =  __builtin_ppc_bcdtruncate(vec, i, -1); // 
expected-error-re {{argument value {{.*}} is outside the valid range}}
+  return  __builtin_ppc_bcdtruncate(vec, i, 1);
+}

lei137 wrote:

I think this red circle with a bar inside is due to this file not having a `\n` 
following `}`.  I feel like this causes some issues but I can't remember 
exactly why... save to just add EOL to the end of the file 🙂 

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-14 Thread Lei Huang via cfe-commits



@@ -104,6 +104,33 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit error diagnostics and return true on success
+  //  - IsVectorType: enforces vector unsigned char
+  //  - IsIntType: enforces any integer type
+  // Lambdas centralize type checks for BCD builtin handlers
+  QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+   VectorKind::AltiVecVector);

lei137 wrote:

location of this is a bit strange to me... seems we are doing this even though 
not all builtins requires this.  If this is needed in the lambda for specific 
builtins, I think it's better to either:
* do this right before the call to the lambda and pass it in as a param
or
* do it directly in the `IsVectorType` lambda def.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-14 Thread Lei Huang via cfe-commits



@@ -11224,6 +11224,10 @@ def err_ppc_invalid_use_mma_type : Error<
   "invalid use of PPC MMA type">;
 def err_ppc_invalid_test_data_class_type : Error<
   "expected a 'float', 'double' or '__float128' for the first argument">;
+def err_ppc_invalid_vector_type : Error<
+  "argument %0 must be of type %1">;
+def err_ppc_invalid_integer_type : Error<
+  "argument %0 must be of %1">;

lei137 wrote:

Can these be simplified into a general err message? eg:
```suggestion
def err_ppc_invalid_type : Error<
  "argument %0 must be of type %1">;
```

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-05 Thread Lei Huang via cfe-commits


lei137 wrote:

> Gentle ping @lei137

@AditiRM you didn't address one of my previous comments.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2026-01-04 Thread Aditi Medhane via cfe-commits


AditiRM wrote:

Gentle ping @lei137 

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-18 Thread Tony Varghese via cfe-commits


https://github.com/tonykuttai commented:

The negative tests looks good to me. 

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-18 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/32] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-18 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/31] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-18 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/30] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-15 Thread Aditi Medhane via cfe-commits



@@ -105,11 +105,67 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const 
TargetInfo &TI,
   switch (BuiltinID) {
   default:
 return false;
-  case PPC::BI__builtin_ppc_bcdsetsign:
   case PPC::BI__builtin_ppc_national2packed:
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdsetsign: {
+
+ASTContext &Context = SemaRef.Context;
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+
+QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+ VectorKind::AltiVecVector);
+
+// Arg0 must be <16 x unsigned char>
+if (!Context.hasSameType(Arg0Type, VecType))
+  return SemaRef.Diag(TheCall->getArg(0)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_vector_type)
+ << 0 << VecType << Arg0Type;

AditiRM wrote:

updated the names of the functions

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-15 Thread Aditi Medhane via cfe-commits



@@ -105,11 +105,67 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const 
TargetInfo &TI,
   switch (BuiltinID) {
   default:
 return false;
-  case PPC::BI__builtin_ppc_bcdsetsign:
   case PPC::BI__builtin_ppc_national2packed:
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdsetsign: {
+
+ASTContext &Context = SemaRef.Context;
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+
+QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+ VectorKind::AltiVecVector);
+
+// Arg0 must be <16 x unsigned char>
+if (!Context.hasSameType(Arg0Type, VecType))
+  return SemaRef.Diag(TheCall->getArg(0)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_vector_type)
+ << 0 << VecType << Arg0Type;
+
+// Arg1 must be integer type
+if (!Arg1Type->isIntegerType())
+  return SemaRef.Diag(TheCall->getArg(1)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_integer_type)
+ << 1 << "integer type" << Arg1Type;
+
+// Restrict Arg1 constant range (0–1)
+return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);

AditiRM wrote:

done

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-14 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/29] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-14 Thread Aditi Medhane via cfe-commits



@@ -104,6 +104,35 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit diagnostics and return true on failure
+  //  - VerifyVectorType: enforces vector unsigned char
+  //  - VerifyIntType: enforces any integer type
+  // Lambdas centralize type checks for BCD builtin handlers
+  QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+   VectorKind::AltiVecVector);
+  // Lambda 1: verify vector type
+  auto VerifyVectorType = [&](QualType ArgTy, SourceLocation Loc,
+  unsigned ArgIndex) -> bool {
+if (!Context.hasSameType(ArgTy, VecType)) {
+  Diag(Loc, diag::err_ppc_invalid_vector_type)

AditiRM wrote:

removed `Loc` parameter and use call location inside the helpers

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-14 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/28] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-14 Thread Aditi Medhane via cfe-commits



@@ -104,6 +104,35 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit diagnostics and return true on failure
+  //  - VerifyVectorType: enforces vector unsigned char
+  //  - VerifyIntType: enforces any integer type
+  // Lambdas centralize type checks for BCD builtin handlers
+  QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+   VectorKind::AltiVecVector);
+  // Lambda 1: verify vector type
+  auto VerifyVectorType = [&](QualType ArgTy, SourceLocation Loc,
+  unsigned ArgIndex) -> bool {
+if (!Context.hasSameType(ArgTy, VecType)) {
+  Diag(Loc, diag::err_ppc_invalid_vector_type)
+  << ArgIndex << VecType << ArgTy;
+  return true;
+}
+return false;
+  };
+
+  // Lambda 2: verify integer type
+  auto VerifyIntType = [&](QualType ArgTy, SourceLocation Loc,
+   unsigned ArgIndex) -> bool {
+if (!ArgTy->isIntegerType()) {
+  Diag(Loc, diag::err_ppc_invalid_integer_type)
+  << ArgIndex << "integer type" << ArgTy;
+  return true;
+}
+return false;

AditiRM wrote:

Implemented early exit and simplified the helper design.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-14 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/27] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-14 Thread Aditi Medhane via cfe-commits



@@ -112,6 +141,29 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshift:
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate: {
+
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+QualType Arg2Type = TheCall->getArg(2)->getType();
+
+// Arg0 must be vector unsigned char
+if (VerifyVectorType(Arg0Type, TheCall->getArg(0)->getBeginLoc(), 0))
+  return true;
+
+// Arg1 must be integer type
+if (VerifyIntType(Arg1Type, TheCall->getArg(1)->getBeginLoc(), 1))
+  return true;
+
+// Arg2 must be integer type
+if (VerifyIntType(Arg2Type, TheCall->getArg(2)->getBeginLoc(), 2))
+  return true;

AditiRM wrote:

got it. removed that check. 

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-14 Thread Aditi Medhane via cfe-commits



@@ -112,6 +141,29 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshift:
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate: {
+
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+QualType Arg2Type = TheCall->getArg(2)->getType();

AditiRM wrote:

done.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-14 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/26] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-12 Thread Lei Huang via cfe-commits


https://github.com/lei137 edited 
https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-12 Thread Lei Huang via cfe-commits



@@ -105,11 +105,67 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const 
TargetInfo &TI,
   switch (BuiltinID) {
   default:
 return false;
-  case PPC::BI__builtin_ppc_bcdsetsign:
   case PPC::BI__builtin_ppc_national2packed:
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdsetsign: {
+
+ASTContext &Context = SemaRef.Context;
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+
+QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+ VectorKind::AltiVecVector);
+
+// Arg0 must be <16 x unsigned char>
+if (!Context.hasSameType(Arg0Type, VecType))
+  return SemaRef.Diag(TheCall->getArg(0)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_vector_type)
+ << 0 << VecType << Arg0Type;

lei137 wrote:

nit... I feel these functions are name generally staring with `Is*`

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-12 Thread Lei Huang via cfe-commits


https://github.com/lei137 edited 
https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-12 Thread Lei Huang via cfe-commits


https://github.com/lei137 edited 
https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-12 Thread Lei Huang via cfe-commits



@@ -112,6 +141,29 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshift:
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate: {
+
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+QualType Arg2Type = TheCall->getArg(2)->getType();

lei137 wrote:

these temp are not needed, just inline it into the call below.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-12 Thread Lei Huang via cfe-commits



@@ -112,6 +141,29 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshift:
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate: {
+
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+QualType Arg2Type = TheCall->getArg(2)->getType();
+
+// Arg0 must be vector unsigned char
+if (VerifyVectorType(Arg0Type, TheCall->getArg(0)->getBeginLoc(), 0))
+  return true;
+
+// Arg1 must be integer type
+if (VerifyIntType(Arg1Type, TheCall->getArg(1)->getBeginLoc(), 1))
+  return true;
+
+// Arg2 must be integer type
+if (VerifyIntType(Arg2Type, TheCall->getArg(2)->getBeginLoc(), 2))
+  return true;

lei137 wrote:

I don't think this is needed since you are checking arg2 to be a constant below.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-12 Thread Lei Huang via cfe-commits



@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")

lei137 wrote:

I'm guessing we are giving up signature checking cause we want to do custom 
checking for the range.  Isn't this why we created the macro 
`UNALIASED_CUSTOM_BUILTIN`?

```suggestion
 UNALIASED_CUSTOM_BUILTIN(ppc_bcdtruncate, "V16UcV16UciUc", false, 
"power9-vector")
```

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-12 Thread Lei Huang via cfe-commits


https://github.com/lei137 requested changes to this pull request.

For some reason I thought we get the basic type checking for free... I don't 
see 


https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-12 Thread Lei Huang via cfe-commits



@@ -104,6 +104,35 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit diagnostics and return true on failure
+  //  - VerifyVectorType: enforces vector unsigned char
+  //  - VerifyIntType: enforces any integer type
+  // Lambdas centralize type checks for BCD builtin handlers
+  QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+   VectorKind::AltiVecVector);
+  // Lambda 1: verify vector type
+  auto VerifyVectorType = [&](QualType ArgTy, SourceLocation Loc,
+  unsigned ArgIndex) -> bool {
+if (!Context.hasSameType(ArgTy, VecType)) {
+  Diag(Loc, diag::err_ppc_invalid_vector_type)
+  << ArgIndex << VecType << ArgTy;
+  return true;
+}
+return false;
+  };
+
+  // Lambda 2: verify integer type
+  auto VerifyIntType = [&](QualType ArgTy, SourceLocation Loc,
+   unsigned ArgIndex) -> bool {
+if (!ArgTy->isIntegerType()) {
+  Diag(Loc, diag::err_ppc_invalid_integer_type)
+  << ArgIndex << "integer type" << ArgTy;
+  return true;
+}
+return false;

lei137 wrote:

nit: Prefer early exit.  `VerifyIntType` return `false` when the argTy is int 
is not very intuitive. 
```suggestion
if (ArgTy->isIntegerType())
  return true;
Diag(Loc, diag::err_ppc_invalid_integer_type)
  << ArgIndex << "integer type" << ArgTy;
return false;   
```

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-12 Thread Lei Huang via cfe-commits


https://github.com/lei137 edited 
https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-12 Thread Lei Huang via cfe-commits



@@ -104,6 +104,35 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit diagnostics and return true on failure
+  //  - VerifyVectorType: enforces vector unsigned char
+  //  - VerifyIntType: enforces any integer type
+  // Lambdas centralize type checks for BCD builtin handlers
+  QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+   VectorKind::AltiVecVector);
+  // Lambda 1: verify vector type
+  auto VerifyVectorType = [&](QualType ArgTy, SourceLocation Loc,
+  unsigned ArgIndex) -> bool {
+if (!Context.hasSameType(ArgTy, VecType)) {
+  Diag(Loc, diag::err_ppc_invalid_vector_type)

lei137 wrote:

I don't we need to pass in a `Loc` each time we call these lambdas.
Just code it into the func same way it's being used all through this functions

```suggestion
  Diag(TheCall->getBeginLoc(), diag::err_ppc_invalid_vector_type)
```

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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-12 Thread Aditi Medhane via cfe-commits



@@ -11199,6 +11199,10 @@ def err_ppc_invalid_use_mma_type : Error<
   "invalid use of PPC MMA type">;
 def err_ppc_invalid_test_data_class_type : Error<
   "expected a 'float', 'double' or '__float128' for the first argument">;
+def err_ppc_bcd_invalid_vector_type : Error<
+  "the first argument must be of type '<16 x unsigned char>'">;

AditiRM wrote:

thanks for pointing that out. fixed it. please let me know if anything else 
needs to get addressed. 

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-12 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/25] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-10 Thread Aditi Medhane via cfe-commits



@@ -36,5 +36,106 @@ entry:
   ret <16 x i8> %0
 }
 
+define dso_local <16 x i8> @test_bcdshift_imm0(<16 x i8> noundef %a, i32 %b) {

AditiRM wrote:

updated the testcase

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-09 Thread Aditi Medhane via cfe-commits



@@ -36,5 +36,106 @@ entry:
   ret <16 x i8> %0
 }
 
+define dso_local <16 x i8> @test_bcdshift_imm0(<16 x i8> noundef %a, i32 %b) {

AditiRM wrote:

done

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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-09 Thread Aditi Medhane via cfe-commits



@@ -104,14 +104,81 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const 
TargetInfo &TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit diagnostics and return true on failure
+  //  - VerifyVectorType: enforces vector unsigned char
+  //  - VerifyIntType: enforces any integer type
+  // Lambdas centralize type checks for all BCD builtin handlers

AditiRM wrote:

done

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-09 Thread Aditi Medhane via cfe-commits



@@ -104,14 +104,81 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const 
TargetInfo &TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit diagnostics and return true on failure
+  //  - VerifyVectorType: enforces vector unsigned char
+  //  - VerifyIntType: enforces any integer type
+  // Lambdas centralize type checks for all BCD builtin handlers
+  QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+   VectorKind::AltiVecVector);
+  // Lambda 1: verify vector type
+  auto VerifyVectorType = [&](QualType ArgTy, SourceLocation Loc,
+  unsigned ArgIndex) -> bool {
+if (!Context.hasSameType(ArgTy, VecType)) {
+  Diag(Loc, diag::err_ppc_bcd_invalid_vector_type)
+  << ArgIndex << VecType << ArgTy;
+  return true;
+}
+return false;
+  };
+
+  // Lambda 2: verify integer type
+  auto VerifyIntType = [&](QualType ArgTy, SourceLocation Loc,
+   unsigned ArgIndex) -> bool {
+if (!ArgTy->isIntegerType()) {
+  Diag(Loc, diag::err_ppc_bcd_invalid_integer_type)
+  << ArgIndex << "integer type" << ArgTy;
+  return true;
+}
+return false;
+  };
+
   switch (BuiltinID) {
   default:
 return false;
-  case PPC::BI__builtin_ppc_bcdsetsign:

AditiRM wrote:

will address this changes in new PR 

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-09 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/24] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-09 Thread Tony Varghese via cfe-commits


https://github.com/tonykuttai edited 
https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-09 Thread Tony Varghese via cfe-commits



@@ -36,5 +36,106 @@ entry:
   ret <16 x i8> %0
 }
 
+define dso_local <16 x i8> @test_bcdshift_imm0(<16 x i8> noundef %a, i32 %b) {

tonykuttai wrote:

I think this test file have lot of these.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-09 Thread Tony Varghese via cfe-commits



@@ -104,14 +104,81 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const 
TargetInfo &TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit diagnostics and return true on failure
+  //  - VerifyVectorType: enforces vector unsigned char
+  //  - VerifyIntType: enforces any integer type
+  // Lambdas centralize type checks for all BCD builtin handlers

tonykuttai wrote:

nit: remove `all` here

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-09 Thread Tony Varghese via cfe-commits



@@ -36,5 +36,106 @@ entry:
   ret <16 x i8> %0
 }
 
+define dso_local <16 x i8> @test_bcdshift_imm0(<16 x i8> noundef %a, i32 %b) {

tonykuttai wrote:

nit: clean up `dso_local` and `noundef`, Its not required.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-09 Thread Tony Varghese via cfe-commits



@@ -104,14 +104,81 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const 
TargetInfo &TI,
 return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
 
+  // Common BCD type-validation helpers
+  // Emit diagnostics and return true on failure
+  //  - VerifyVectorType: enforces vector unsigned char
+  //  - VerifyIntType: enforces any integer type
+  // Lambdas centralize type checks for all BCD builtin handlers
+  QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+   VectorKind::AltiVecVector);
+  // Lambda 1: verify vector type
+  auto VerifyVectorType = [&](QualType ArgTy, SourceLocation Loc,
+  unsigned ArgIndex) -> bool {
+if (!Context.hasSameType(ArgTy, VecType)) {
+  Diag(Loc, diag::err_ppc_bcd_invalid_vector_type)
+  << ArgIndex << VecType << ArgTy;
+  return true;
+}
+return false;
+  };
+
+  // Lambda 2: verify integer type
+  auto VerifyIntType = [&](QualType ArgTy, SourceLocation Loc,
+   unsigned ArgIndex) -> bool {
+if (!ArgTy->isIntegerType()) {
+  Diag(Loc, diag::err_ppc_bcd_invalid_integer_type)
+  << ArgIndex << "integer type" << ArgTy;
+  return true;
+}
+return false;
+  };
+
   switch (BuiltinID) {
   default:
 return false;
-  case PPC::BI__builtin_ppc_bcdsetsign:

tonykuttai wrote:

Why are we modifying `bcdsetsign` in this PR ?

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-09 Thread Tony Varghese via cfe-commits


https://github.com/tonykuttai requested changes to this pull request.

LGTM with nots.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-09 Thread Tony Varghese via cfe-commits


https://github.com/tonykuttai edited 
https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-09 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM edited 
https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-09 Thread via cfe-commits


github-actions[bot] wrote:


# :penguin: Linux x64 Test Results

* 77491 tests passed
* 1522 tests skipped

All tests passed but another part of the build **failed**. Click on a failure 
below to see the details.


tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaPPC.cpp.o

```
FAILED: tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaPPC.cpp.o
sccache /opt/llvm/bin/clang++ -DCLANG_EXPORTS -DGTEST_HAS_RTTI=0 -D_DEBUG 
-D_GLIBCXX_ASSERTIONS -D_GLIBCXX_USE_CXX11_ABI=1 -D_GNU_SOURCE 
-D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS 
-I/home/gha/actions-runner/_work/llvm-project/llvm-project/build/tools/clang/lib/Sema
 -I/home/gha/actions-runner/_work/llvm-project/llvm-project/clang/lib/Sema 
-I/home/gha/actions-runner/_work/llvm-project/llvm-project/clang/include 
-I/home/gha/actions-runner/_work/llvm-project/llvm-project/build/tools/clang/include
 -I/home/gha/actions-runner/_work/llvm-project/llvm-project/build/include 
-I/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/include -gmlt 
-fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror 
-Werror=date-time -Werror=unguarded-availability-new -Wall -Wextra 
-Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers 
-pedantic -Wno-long-long -Wc++98-compat-extra-semi -Wimplicit-fallthrough 
-Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor 
-Wdelete-non-virtual-dtor -Wsuggest-override -Wstring-conversion 
-Wno-pass-failed -Wmisleading-indentation -Wctad-maybe-unsupported 
-fdiagnostics-color -ffunction-sections -fdata-sections -fno-common 
-Woverloaded-virtual -Wno-nested-anon-types -O3 -DNDEBUG -std=c++17  
-fno-exceptions -funwind-tables -fno-rtti -UNDEBUG -MD -MT 
tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaPPC.cpp.o -MF 
tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaPPC.cpp.o.d -o 
tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaPPC.cpp.o -c 
/home/gha/actions-runner/_work/llvm-project/llvm-project/clang/lib/Sema/SemaPPC.cpp
/home/gha/actions-runner/_work/llvm-project/llvm-project/clang/lib/Sema/SemaPPC.cpp:145:17:
 error: unused variable 'Context' [-Werror,-Wunused-variable]
145 | ASTContext &Context = SemaRef.Context;
| ^~~
/home/gha/actions-runner/_work/llvm-project/llvm-project/clang/lib/Sema/SemaPPC.cpp:164:17:
 error: unused variable 'Context' [-Werror,-Wunused-variable]
164 | ASTContext &Context = SemaRef.Context;
| ^~~
2 errors generated.
```


If these failures are unrelated to your changes (for example tests are broken 
or flaky at HEAD), please open an issue at 
https://github.com/llvm/llvm-project/issues and add the `infrastructure` label.

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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-08 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/22] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-08 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM edited 
https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-08 Thread Aditi Medhane via cfe-commits



@@ -105,11 +105,67 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const 
TargetInfo &TI,
   switch (BuiltinID) {
   default:
 return false;
-  case PPC::BI__builtin_ppc_bcdsetsign:
   case PPC::BI__builtin_ppc_national2packed:
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdsetsign: {
+
+ASTContext &Context = SemaRef.Context;
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+
+QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+ VectorKind::AltiVecVector);
+
+// Arg0 must be <16 x unsigned char>
+if (!Context.hasSameType(Arg0Type, VecType))
+  return SemaRef.Diag(TheCall->getArg(0)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_vector_type)
+ << 0 << VecType << Arg0Type;

AditiRM wrote:

Implemented two lambda helpers VerifyVectorType and VerifyIntType to centralize 
type checks as suggested

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-08 Thread Aditi Medhane via cfe-commits



@@ -11199,6 +11199,10 @@ def err_ppc_invalid_use_mma_type : Error<
   "invalid use of PPC MMA type">;
 def err_ppc_invalid_test_data_class_type : Error<
   "expected a 'float', 'double' or '__float128' for the first argument">;
+def err_ppc_bcd_invalid_vector_type : Error<
+  "the first argument must be of type '<16 x unsigned char>'">;

AditiRM wrote:

Yes, I’ve updated the diagnostic message to match the revised wording.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-08 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/21] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-08 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/20] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-07 Thread Aditi Medhane via cfe-commits


AditiRM wrote:

## Prototypes

```c
vector unsigned char __builtin_bcdshift(vector unsigned char, int, unsigned 
char);
vector unsigned char __builtin_bcdshiftround(vector unsigned char, int, 
unsigned char);
vector unsigned char __builtin_bcdtruncate(vector unsigned char, int, unsigned 
char);
vector unsigned char __builtin_bcdunsignedtruncate(vector unsigned char, int);
vector unsigned char __builtin_bcdunsignedshift(vector unsigned char, int);
```
## Usage Details

`__builtin_bcdshift`: The built-in function decimal shifts the signed packed 
decimal value of a into the result.
If the value of b is positive, a is shifted left by (b<32)?b:31 digits. If the 
value of b is negative, a is shifted right by `((-b+1)<32)?(-b+1):31` digits.
The sign code of the result is set according to the following rules:
-If a is positive, the sign code is set to 0xD.
-If a is negative, the sign code is set according to the following rules:
   - If c equals to 0, the sign code is set to 0xC.
   - If c equals to 1, the sign code is set to 0xF.
> notes:
> The value of c can only be 0 or 1.
> You can determine whether a packed decimal value is positive or negative 
> according to the following rules:
>  - Packed decimal values with sign code of 0xA, 0xC, 0xE, or 0xF 
> are interpreted as positive values.
>  - Packed decimal values with sign code of 0xB or 0xD are 
> interpreted as negative values.

`__builtin_bcdshiftround`: The built-in function decimal shifts and rounds the 
signed packed decimal value of a into the result.
If the value of b is positive, a is shifted left by `b % 32` digits. If the 
value of b is negative, a is shifted right by `(-b) % 32` digits. If the last 
digit shifted out on the right is greater than 5, the result is incremented by 
1.
The sign code of the result is set according to the following rules:

- If a is positive, the sign code is set to 0xD.
- If a is negative, the sign code is set according to the following rules:
   - If c equals 0, the sign code is set to 0xC.
   - If c equals 1, the sign code is set to 0xF.

> notes:
> The other digits of the result are set to zero.
> You can determine whether a packed decimal value is positive or negative 
> according to the following rules:
>  - Packed decimal values with sign code of 0xA, 0xC, 0xE, or 0xF 
> are interpreted as positive values.
>  - Packed decimal values with sign code of 0xB or 0xD are 
> interpreted as negative values.

`__builtin_bcdtruncate`: The built-in function copies the rightmost b digits of 
the unsigned decimal value of a into the result.
The sign code of the result is set according to the following rules:

- If a is positive, the sign code is set to 0xD.
- If a is negative, the sign code is set according to the following rules:
   - If c equals 0, the sign code is set to 0xC.
   - If c equals 1, the sign code is set to 0xF.

`__builtin_bcdutruncate`: The built-in function copies the rightmost b digits 
of the unsigned decimal value of a into the result. The other digits of the 
result are set to zero.

`__builtin_bcdushift`: The built-in function decimal shifts the unsigned packed 
decimal value of a into the result.
- If the value of b is positive, a is shifted left by (b < 33) ? b : 32 digits.
- If the value of b is negative, a is shifted right by ((-b + 1) < 33) ? (-b + 
1) : 32 digits.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-07 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM edited 
https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-12-04 Thread Aditi Medhane via cfe-commits



@@ -105,11 +105,67 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const 
TargetInfo &TI,
   switch (BuiltinID) {
   default:
 return false;
-  case PPC::BI__builtin_ppc_bcdsetsign:
   case PPC::BI__builtin_ppc_national2packed:
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdsetsign: {
+
+ASTContext &Context = SemaRef.Context;
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+
+QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+ VectorKind::AltiVecVector);
+
+// Arg0 must be <16 x unsigned char>
+if (!Context.hasSameType(Arg0Type, VecType))
+  return SemaRef.Diag(TheCall->getArg(0)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_vector_type)
+ << 0 << VecType << Arg0Type;
+
+// Arg1 must be integer type
+if (!Arg1Type->isIntegerType())
+  return SemaRef.Diag(TheCall->getArg(1)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_integer_type)
+ << 1 << "integer type" << Arg1Type;
+
+// Restrict Arg1 constant range (0–1)
+return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  }
+  case PPC::BI__builtin_ppc_bcdshift:
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate: {
+
+ASTContext &Context = SemaRef.Context;
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+QualType Arg2Type = TheCall->getArg(2)->getType();
+
+QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+ VectorKind::AltiVecVector);
+
+// Arg0 must be <16 x unsigned char>
+if (!Context.hasSameType(Arg0Type, VecType))
+  return SemaRef.Diag(TheCall->getArg(0)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_vector_type)
+ << 0 << VecType << Arg0Type;
+
+// Arg1 must be integer type
+if (!Arg1Type->isIntegerType())
+  return SemaRef.Diag(TheCall->getArg(1)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_integer_type)
+ << 1 << "integer type" << Arg1Type;

AditiRM wrote:

I checked this with a small testcase, and the builtins without the `"t"`flag 
already get the type error from Clang’s normal checking. The ones marked with 
`"t"` skip that path, so I added the explicit diagnostic to ensure the error is 
still reported.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Lei Huang via cfe-commits



@@ -105,11 +105,67 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const 
TargetInfo &TI,
   switch (BuiltinID) {
   default:
 return false;
-  case PPC::BI__builtin_ppc_bcdsetsign:
   case PPC::BI__builtin_ppc_national2packed:
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdsetsign: {
+
+ASTContext &Context = SemaRef.Context;
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+
+QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+ VectorKind::AltiVecVector);
+
+// Arg0 must be <16 x unsigned char>
+if (!Context.hasSameType(Arg0Type, VecType))
+  return SemaRef.Diag(TheCall->getArg(0)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_vector_type)
+ << 0 << VecType << Arg0Type;
+
+// Arg1 must be integer type
+if (!Arg1Type->isIntegerType())
+  return SemaRef.Diag(TheCall->getArg(1)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_integer_type)
+ << 1 << "integer type" << Arg1Type;
+
+// Restrict Arg1 constant range (0–1)
+return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);

lei137 wrote:

consider using existing function: `SemaRef.BuiltinConstantArgRange()`

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Lei Huang via cfe-commits



@@ -105,11 +105,67 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const 
TargetInfo &TI,
   switch (BuiltinID) {
   default:
 return false;
-  case PPC::BI__builtin_ppc_bcdsetsign:
   case PPC::BI__builtin_ppc_national2packed:
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdsetsign: {
+
+ASTContext &Context = SemaRef.Context;
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+
+QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+ VectorKind::AltiVecVector);
+
+// Arg0 must be <16 x unsigned char>
+if (!Context.hasSameType(Arg0Type, VecType))
+  return SemaRef.Diag(TheCall->getArg(0)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_vector_type)
+ << 0 << VecType << Arg0Type;
+
+// Arg1 must be integer type
+if (!Arg1Type->isIntegerType())
+  return SemaRef.Diag(TheCall->getArg(1)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_integer_type)
+ << 1 << "integer type" << Arg1Type;
+
+// Restrict Arg1 constant range (0–1)
+return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  }
+  case PPC::BI__builtin_ppc_bcdshift:
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate: {
+
+ASTContext &Context = SemaRef.Context;
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+QualType Arg2Type = TheCall->getArg(2)->getType();
+
+QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+ VectorKind::AltiVecVector);
+
+// Arg0 must be <16 x unsigned char>
+if (!Context.hasSameType(Arg0Type, VecType))
+  return SemaRef.Diag(TheCall->getArg(0)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_vector_type)
+ << 0 << VecType << Arg0Type;
+
+// Arg1 must be integer type
+if (!Arg1Type->isIntegerType())
+  return SemaRef.Diag(TheCall->getArg(1)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_integer_type)
+ << 1 << "integer type" << Arg1Type;

lei137 wrote:

I don't see this kind of checks for other builtins... maybe try a tc and see if 
it's caught elsewhere...

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Lei Huang via cfe-commits



@@ -105,11 +105,67 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const 
TargetInfo &TI,
   switch (BuiltinID) {
   default:
 return false;
-  case PPC::BI__builtin_ppc_bcdsetsign:
   case PPC::BI__builtin_ppc_national2packed:
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdsetsign: {
+
+ASTContext &Context = SemaRef.Context;
+QualType Arg0Type = TheCall->getArg(0)->getType();
+QualType Arg1Type = TheCall->getArg(1)->getType();
+
+QualType VecType = Context.getVectorType(Context.UnsignedCharTy, 16,
+ VectorKind::AltiVecVector);
+
+// Arg0 must be <16 x unsigned char>
+if (!Context.hasSameType(Arg0Type, VecType))
+  return SemaRef.Diag(TheCall->getArg(0)->getBeginLoc(),
+  diag::err_ppc_bcd_invalid_vector_type)
+ << 0 << VecType << Arg0Type;

lei137 wrote:

Since this is repeated below, please consider putting this into a function to 
be called for checking for vector types.  eg isVecType(ArgNum, 
VectorTypeExpected).

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Lei Huang via cfe-commits



@@ -11199,6 +11199,10 @@ def err_ppc_invalid_use_mma_type : Error<
   "invalid use of PPC MMA type">;
 def err_ppc_invalid_test_data_class_type : Error<
   "expected a 'float', 'double' or '__float128' for the first argument">;
+def err_ppc_bcd_invalid_vector_type : Error<
+  "the first argument must be of type '<16 x unsigned char>'">;

lei137 wrote:

```suggestion
  "the first argument must be of type vector unsigned char'">;
```

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/19] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/18] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/17] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Aditi Medhane via cfe-commits


AditiRM wrote:

@s-barannikov Thanks for the guidance, it would be great if you could merge 
main into the branch.
Really appreciate the help!

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Sergei Barannikov via cfe-commits


s-barannikov wrote:

Done, I verified locally that the build is in order and tests pass

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Sergei Barannikov via cfe-commits


https://github.com/s-barannikov updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/16] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK:

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Sergei Barannikov via cfe-commits


s-barannikov wrote:

Hi,
I think all you need to do is revert the changes made to `PPCISelLowering.h` 
and `PPCTargetLowering::getTargetNodeName()`.
Perhaps merging main into your branch would be easier than rebasing. I can do 
that for you if you want.


https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Aditi Medhane via cfe-commits


AditiRM wrote:

Hi @s-barannikov, I’m running into a merge conflict while rebasing on top of 
your recent change [[PowerPC] TableGen-erate SDNode 
descriptions](https://github.com/llvm/llvm-project/pull/link)
I’m trying to understand where the backend-lowering logic should reside now, 
given the new structure. Could you clarify the appropriate location or pattern 
to follow for lowering code after this refactor?

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread via cfe-commits


github-actions[bot] wrote:


# :penguin: Linux x64 Test Results

* 3053 tests passed
* 7 tests skipped

All tests passed but another part of the build **failed**. Click on a failure 
below to see the details.


lib/Target/PowerPC/CMakeFiles/LLVMPowerPCCodeGen.dir/PPCFastISel.cpp.o

```
FAILED: lib/Target/PowerPC/CMakeFiles/LLVMPowerPCCodeGen.dir/PPCFastISel.cpp.o
sccache /opt/llvm/bin/clang++ -DGTEST_HAS_RTTI=0 -D_DEBUG -D_GLIBCXX_ASSERTIONS 
-D_GLIBCXX_USE_CXX11_ABI=1 -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS 
-D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS 
-I/home/gha/actions-runner/_work/llvm-project/llvm-project/build/lib/Target/PowerPC
 
-I/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC
 -I/home/gha/actions-runner/_work/llvm-project/llvm-project/build/include 
-I/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/include -gmlt 
-fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror 
-Werror=date-time -Werror=unguarded-availability-new -Wall -Wextra 
-Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers 
-pedantic -Wno-long-long -Wc++98-compat-extra-semi -Wimplicit-fallthrough 
-Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor 
-Wdelete-non-virtual-dtor -Wsuggest-override -Wstring-conversion 
-Wno-pass-failed -Wmisleading-indentation -Wctad-maybe-unsupported 
-fdiagnostics-color -ffunction-sections -fdata-sections -O3 -DNDEBUG -std=c++17 
-fvisibility=hidden  -fno-exceptions -funwind-tables -fno-rtti -UNDEBUG -MD -MT 
lib/Target/PowerPC/CMakeFiles/LLVMPowerPCCodeGen.dir/PPCFastISel.cpp.o -MF 
lib/Target/PowerPC/CMakeFiles/LLVMPowerPCCodeGen.dir/PPCFastISel.cpp.o.d -o 
lib/Target/PowerPC/CMakeFiles/LLVMPowerPCCodeGen.dir/PPCFastISel.cpp.o -c 
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCFastISel.cpp
In file included from 
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCFastISel.cpp:20:
In file included from 
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h:15:
/home/gha/actions-runner/_work/llvm-project/llvm-project/build/lib/Target/PowerPC/PPCGenSDNodeInfo.inc:16:3:
 error: redefinition of enumerator 'ACC_BUILD'
16 |   ACC_BUILD = ISD::BUILTIN_OP_END,
|   ^
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.h:464:5:
 note: previous definition is here
464 | ACC_BUILD,
| ^
In file included from 
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCFastISel.cpp:20:
In file included from 
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h:15:
/home/gha/actions-runner/_work/llvm-project/llvm-project/build/lib/Target/PowerPC/PPCGenSDNodeInfo.inc:17:3:
 error: redefinition of enumerator 'ADDC'
17 |   ADDC,
|   ^
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.h:165:5:
 note: previous definition is here
165 | ADDC,
| ^
In file included from 
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCFastISel.cpp:20:
In file included from 
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h:15:
/home/gha/actions-runner/_work/llvm-project/llvm-project/build/lib/Target/PowerPC/PPCGenSDNodeInfo.inc:18:3:
 error: redefinition of enumerator 'ADDE'
18 |   ADDE,
|   ^
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.h:166:5:
 note: previous definition is here
166 | ADDE,
| ^
In file included from 
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCFastISel.cpp:20:
In file included from 
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h:15:
/home/gha/actions-runner/_work/llvm-project/llvm-project/build/lib/Target/PowerPC/PPCGenSDNodeInfo.inc:19:3:
 error: redefinition of enumerator 'ADDIS_DTPREL_HA'
19 |   ADDIS_DTPREL_HA,
|   ^
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.h:416:5:
 note: previous definition is here
416 | ADDIS_DTPREL_HA,
| ^
In file included from 
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCFastISel.cpp:20:
In file included from 
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h:15:
/home/gha/actions-runner/_work/llvm-project/llvm-project/build/lib/Target/PowerPC/PPCGenSDNodeInfo.inc:20:3:
 error: redefinition of enumerator 'ADDIS_GOT_TPREL_HA'
20 |   ADDIS_GOT_TPREL_HA,
|   ^
/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.h:330:5:
 note: previous definition is here
330 | ADDIS_GOT_TPREL_HA,
| ^
In file included from 
/home/gha/actions-runner/_work/llvm-project/llvm-project

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/16] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/16] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Aditi Medhane via cfe-commits



@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")

AditiRM wrote:

yes thanks for pointing that out. implemented error dignostics according to bcd 
builtins.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-28 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/16] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-21 Thread via cfe-commits



@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")

RolandF77 wrote:

Tried an example with an invalid first parameter type to __builtin_ppc_bcdshift 
and got the error message:

bcd.c:35:16: error: expected a 'float', 'double' or '__float128' for the first 
argument

The first parameter is a supposed to be a vector. You are using the diagnostic 
from the test data class builtin and that is inaccurate. I suspect you need to 
add a diagnostic.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-11-19 Thread Aditi Medhane via cfe-commits


AditiRM wrote:

Ping @RolandF77 @amy-kwan @lei137 @tonykuttai 

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-10-23 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/14] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-10-23 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/14] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-10-23 Thread Aditi Medhane via cfe-commits



@@ -249,6 +269,11 @@ def PPCpaddiDtprel   : SDNode<"PPCISD::PADDI_DTPREL", 
SDTIntBinOp>;
 
 def PPCvperm : SDNode<"PPCISD::VPERM", SDT_PPCvperm, []>;
 def PPCxxsplt: SDNode<"PPCISD::XXSPLT", SDT_PPCVecSplat, []>;
+def PPCbcds  : SDNode<"PPCISD::BCDSHIFT", SDT_PPCBcdShift, []>;
+def PPCbcdsr : SDNode<"PPCISD::BCDSHIFTROUND", SDT_PPCBcdShiftRound, []>;
+def PPCbcdtrunc  : SDNode<"PPCISD::BCDTRUNC", SDT_PPCBcdTrunc, []>;
+def PPCbcdutrunc : SDNode<"PPCISD::BCDUTRUNC", SDT_PPCBcdUTrunc, []>;
+def PPCbcdus : SDNode<"PPCISD::BCDUSHIFT", SDT_PPCBcdUShift, []>;

AditiRM wrote:

Moved BCD nodes after LAST_MEMORY_OPCODE since they do not perform any memory 
operations and should not be treated as memory opcodes.

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-10-23 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/14] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-10-18 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/13] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-10-18 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 1/9] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP0:

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-10-18 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/10] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-10-18 Thread Aditi Medhane via cfe-commits



@@ -3455,6 +3480,21 @@ include "PPCInstr64Bit.td"
 include "PPCInstrVSX.td"
 include "PPCInstrHTM.td"
 
+def : Pat<(PPCbcds v4i32:$Shift, v16i8:$Src, i32:$PS),
+  (BCDS_rec $Shift, $Src, $PS)>;

AditiRM wrote:

Yes agree. I moved the pattern matching definitions to the proper section in 
`PPCInstrAltivec.td`

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-10-18 Thread Aditi Medhane via cfe-commits



@@ -11151,6 +11161,20 @@ SDValue 
PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
 
   SDLoc dl(Op);
 
+  // Lowers BCD intrinsics with rounding operand
+  auto MapNodeWithSplatVector = [&](unsigned Opcode) -> SDValue {
+SDValue SplatVal =
+DAG.getNode(ISD::SPLAT_VECTOR, dl, MVT::v4i32, Op.getOperand(2));
+return DAG.getNode(Opcode, dl, MVT::v16i8, SplatVal, Op.getOperand(1),
+   Op.getOperand(3));
+  };
+  // Lowers BCD intrinsics without rounding operand
+  auto MapNodeWithSplatVectorInt = [&](unsigned Opcode) -> SDValue {

AditiRM wrote:

Merged both the functions into one. 

https://github.com/llvm/llvm-project/pull/154715
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[clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)

2025-10-18 Thread Aditi Medhane via cfe-commits


https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/154715

>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM 
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 01/12] Implement frontend for bcd builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  5 ++
 clang/lib/Basic/Targets/PPC.cpp   |  7 +++
 clang/lib/Sema/SemaPPC.cpp|  4 ++
 .../PowerPC/builtins-bcd-format-conversion.c  | 56 +++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td | 29 +-
 5 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..0e1789b507d5b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
 // P9 Binary-coded decimal (BCD) builtins. 
   
 TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index a6e1ad10568bb..a37a68ad91724 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -91,6 +91,13 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
   Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
+  Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift");
+  Builder.defineMacro("__builtin_bcdshiftround", 
"__builtin_ppc_bcdshiftround");
+  Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedtruncate",
+  "__builtin_ppc_bcdunsignedtruncate");
+  Builder.defineMacro("__builtin_bcdunsignedshift",
+  "__builtin_ppc_bcdunsignedshift");
   Builder.defineMacro("__builtin_national2packed",
   "__builtin_ppc_national2packed");
   Builder.defineMacro("__builtin_packed2national",
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 46d7372dd056b..85b084e9e2f24 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   case PPC::BI__builtin_ppc_packed2zoned:
   case PPC::BI__builtin_ppc_zoned2packed:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
+  case PPC::BI__builtin_ppc_bcdshiftround:
+  case PPC::BI__builtin_ppc_bcdtruncate:
+  case PPC::BI__builtin_ppc_bcdshift:
+return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
index 0aeb720e545ed..1698afa3b8b4f 100644
--- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
@@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned 
char a) {
 vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
 return __builtin_ppc_bcdsetsign(a, '\1');
 }
+
+// CHECK-LABEL: test_bcdshift_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\0');
+}
+
+// CHECK-LABEL: test_bcdshift_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x 
i8> %a, i32 %b, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, 
unsigned char c){
+return __builtin_ppc_bcdshift(a,b,'\1');
+}
+
+// CHECK-LABEL: test_bcdshiftround_imm0
+// CHECK: [[TMP

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