[clang] [llvm] [X86][AVX10.2-BF16] Remove [NE]P from intrinsic and instruction name (PR #123335)
https://github.com/phoebewang closed https://github.com/llvm/llvm-project/pull/123335 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86][AVX10.2-BF16] Remove [NE]P from intrinsic and instruction name (PR #123335)
https://github.com/e-kud approved this pull request. LGTM. However some clang-format changes for `llvm/lib/Target/X86/X86InstrFMA3Info.cpp` look reasonable for me. https://github.com/llvm/llvm-project/pull/123335 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86][AVX10.2-BF16] Remove [NE]P from intrinsic and instruction name (PR #123335)
@@ -5385,120 +5385,120 @@ let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth< } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vcmppbf16512_mask : X86Builtin<"unsigned int(_Vector<32, __bf16>, _Vector<32, __bf16>, _Constant int, unsigned int)">; + def vcmpbf16512_mask : X86Builtin<"unsigned int(_Vector<32, __bf16>, _Vector<32, __bf16>, _Constant int, unsigned int)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vcmppbf16256_mask : X86Builtin<"unsigned short(_Vector<16, __bf16>, _Vector<16, __bf16>, _Constant int, unsigned short)">; + def vcmpbf16256_mask : X86Builtin<"unsigned short(_Vector<16, __bf16>, _Vector<16, __bf16>, _Constant int, unsigned short)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vcmppbf16128_mask : X86Builtin<"unsigned char(_Vector<8, __bf16>, _Vector<8, __bf16>, _Constant int, unsigned char)">; - def vfpclasspbf16128_mask : X86Builtin<"unsigned char(_Vector<8, __bf16>, _Constant int, unsigned char)">; + def vcmpbf16128_mask : X86Builtin<"unsigned char(_Vector<8, __bf16>, _Vector<8, __bf16>, _Constant int, unsigned char)">; + def vfpclassbf16128_mask : X86Builtin<"unsigned char(_Vector<8, __bf16>, _Constant int, unsigned char)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vfpclasspbf16256_mask : X86Builtin<"unsigned short(_Vector<16, __bf16>, _Constant int, unsigned short)">; + def vfpclassbf16256_mask : X86Builtin<"unsigned short(_Vector<16, __bf16>, _Constant int, unsigned short)">; } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vfpclasspbf16512_mask : X86Builtin<"unsigned int(_Vector<32, __bf16>, _Constant int, unsigned int)">; + def vfpclassbf16512_mask : X86Builtin<"unsigned int(_Vector<32, __bf16>, _Constant int, unsigned int)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vscalefpbf16128_mask : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, _Vector<8, __bf16>, unsigned char)">; + def vscalefbf16128_mask : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, _Vector<8, __bf16>, unsigned char)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vscalefpbf16256_mask : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, _Vector<16, __bf16>, unsigned short)">; + def vscalefbf16256_mask : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, _Vector<16, __bf16>, unsigned short)">; } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vscalefpbf16512_mask : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>, _Vector<32, __bf16>, unsigned int)">; + def vscalefbf16512_mask : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>, _Vector<32, __bf16>, unsigned int)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vrcppbf16128_mask : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, unsigned char)">; + def vrcpbf16128_mask : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, unsigned char)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vrcppbf16256_mask : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, unsigned short)">; + def vrcpbf16256_mask : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, unsigned short)">; } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vrcppbf16512_mask : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>, unsigned int)">; + def vrcpbf16512_mask : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>, unsigned int)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vgetexppbf16128_mask : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, unsigned char)">; + def vgetexpbf16128_mask : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, unsigned char)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vgetexppbf16256_mask : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, unsigned short)">; + def vgetexpbf16256_mask : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, unsigned short)">; } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vgetexppbf
[clang] [llvm] [X86][AVX10.2-BF16] Remove [NE]P from intrinsic and instruction name (PR #123335)
@@ -5385,120 +5385,120 @@ let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth< } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vcmppbf16512_mask : X86Builtin<"unsigned int(_Vector<32, __bf16>, _Vector<32, __bf16>, _Constant int, unsigned int)">; + def vcmpbf16512_mask : X86Builtin<"unsigned int(_Vector<32, __bf16>, _Vector<32, __bf16>, _Constant int, unsigned int)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vcmppbf16256_mask : X86Builtin<"unsigned short(_Vector<16, __bf16>, _Vector<16, __bf16>, _Constant int, unsigned short)">; + def vcmpbf16256_mask : X86Builtin<"unsigned short(_Vector<16, __bf16>, _Vector<16, __bf16>, _Constant int, unsigned short)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vcmppbf16128_mask : X86Builtin<"unsigned char(_Vector<8, __bf16>, _Vector<8, __bf16>, _Constant int, unsigned char)">; - def vfpclasspbf16128_mask : X86Builtin<"unsigned char(_Vector<8, __bf16>, _Constant int, unsigned char)">; + def vcmpbf16128_mask : X86Builtin<"unsigned char(_Vector<8, __bf16>, _Vector<8, __bf16>, _Constant int, unsigned char)">; + def vfpclassbf16128_mask : X86Builtin<"unsigned char(_Vector<8, __bf16>, _Constant int, unsigned char)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vfpclasspbf16256_mask : X86Builtin<"unsigned short(_Vector<16, __bf16>, _Constant int, unsigned short)">; + def vfpclassbf16256_mask : X86Builtin<"unsigned short(_Vector<16, __bf16>, _Constant int, unsigned short)">; } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vfpclasspbf16512_mask : X86Builtin<"unsigned int(_Vector<32, __bf16>, _Constant int, unsigned int)">; + def vfpclassbf16512_mask : X86Builtin<"unsigned int(_Vector<32, __bf16>, _Constant int, unsigned int)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vscalefpbf16128_mask : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, _Vector<8, __bf16>, unsigned char)">; + def vscalefbf16128_mask : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, _Vector<8, __bf16>, unsigned char)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vscalefpbf16256_mask : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, _Vector<16, __bf16>, unsigned short)">; + def vscalefbf16256_mask : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, _Vector<16, __bf16>, unsigned short)">; } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vscalefpbf16512_mask : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>, _Vector<32, __bf16>, unsigned int)">; + def vscalefbf16512_mask : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>, _Vector<32, __bf16>, unsigned int)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vrcppbf16128_mask : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, unsigned char)">; + def vrcpbf16128_mask : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, unsigned char)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vrcppbf16256_mask : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, unsigned short)">; + def vrcpbf16256_mask : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, unsigned short)">; } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vrcppbf16512_mask : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>, unsigned int)">; + def vrcpbf16512_mask : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>, unsigned int)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vgetexppbf16128_mask : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, unsigned char)">; + def vgetexpbf16128_mask : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, unsigned char)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vgetexppbf16256_mask : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, unsigned short)">; + def vgetexpbf16256_mask : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, unsigned short)">; } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vgetexppbf
[clang] [llvm] [X86][AVX10.2-BF16] Remove [NE]P from intrinsic and instruction name (PR #123335)
github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff 1274bca2ad5befe56d82ef76100e2c294ca57ce2 ef979383a507277247d36b97572f4bf558e84305 --extensions inc,cpp,h,c -- clang/lib/CodeGen/CGBuiltin.cpp clang/lib/Headers/avx10_2_512bf16intrin.h clang/lib/Headers/avx10_2bf16intrin.h clang/lib/Sema/SemaX86.cpp clang/test/CodeGen/X86/avx10_2_512bf16-builtins.c clang/test/CodeGen/X86/avx10_2bf16-builtins.c llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp llvm/lib/Target/X86/X86InstrFMA3Info.cpp llvm/lib/Target/X86/X86IntrinsicsInfo.h llvm/test/TableGen/x86-fold-tables.inc `` View the diff from clang-format here. ``diff diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp index cd89b88f46..6b9527502b 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp @@ -166,15 +166,24 @@ bool X86ATTInstPrinter::printVecCompareInstr(const MCInst *MI, case X86::VCMPPHZrmbi: case X86::VCMPPHZrmbik: case X86::VCMPPHZrrib: case X86::VCMPPHZrribk: case X86::VCMPSHZrrib_Int: case X86::VCMPSHZrribk_Int: - case X86::VCMPBF16Z128rmi: case X86::VCMPBF16Z128rri: - case X86::VCMPBF16Z256rmi: case X86::VCMPBF16Z256rri: - case X86::VCMPBF16Zrmi: case X86::VCMPBF16Zrri: - case X86::VCMPBF16Z128rmik: case X86::VCMPBF16Z128rrik: - case X86::VCMPBF16Z256rmik: case X86::VCMPBF16Z256rrik: - case X86::VCMPBF16Zrmik:case X86::VCMPBF16Zrrik: - case X86::VCMPBF16Z128rmbi: case X86::VCMPBF16Z128rmbik: - case X86::VCMPBF16Z256rmbi: case X86::VCMPBF16Z256rmbik: - case X86::VCMPBF16Zrmbi:case X86::VCMPBF16Zrmbik: + case X86::VCMPBF16Z128rmi: + case X86::VCMPBF16Z128rri: + case X86::VCMPBF16Z256rmi: + case X86::VCMPBF16Z256rri: + case X86::VCMPBF16Zrmi: + case X86::VCMPBF16Zrri: + case X86::VCMPBF16Z128rmik: + case X86::VCMPBF16Z128rrik: + case X86::VCMPBF16Z256rmik: + case X86::VCMPBF16Z256rrik: + case X86::VCMPBF16Zrmik: + case X86::VCMPBF16Zrrik: + case X86::VCMPBF16Z128rmbi: + case X86::VCMPBF16Z128rmbik: + case X86::VCMPBF16Z256rmbi: + case X86::VCMPBF16Z256rmbik: + case X86::VCMPBF16Zrmbi: + case X86::VCMPBF16Zrmbik: if (Imm >= 0 && Imm <= 31) { OS << '\t'; printCMPMnemonic(MI, /*IsVCMP*/true, OS); diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp index 8470d26011..8d9fa806a2 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp @@ -309,15 +309,24 @@ void X86InstPrinterCommon::printCMPMnemonic(const MCInst *MI, bool IsVCmp, case X86::VCMPSHZrmik_Int: case X86::VCMPSHZrrik_Int: OS << "sh\t"; break; - case X86::VCMPBF16Z128rmi: case X86::VCMPBF16Z128rri: - case X86::VCMPBF16Z256rmi: case X86::VCMPBF16Z256rri: - case X86::VCMPBF16Zrmi: case X86::VCMPBF16Zrri: - case X86::VCMPBF16Z128rmik: case X86::VCMPBF16Z128rrik: - case X86::VCMPBF16Z256rmik: case X86::VCMPBF16Z256rrik: - case X86::VCMPBF16Zrmik:case X86::VCMPBF16Zrrik: - case X86::VCMPBF16Z128rmbi: case X86::VCMPBF16Z128rmbik: - case X86::VCMPBF16Z256rmbi: case X86::VCMPBF16Z256rmbik: - case X86::VCMPBF16Zrmbi:case X86::VCMPBF16Zrmbik: + case X86::VCMPBF16Z128rmi: + case X86::VCMPBF16Z128rri: + case X86::VCMPBF16Z256rmi: + case X86::VCMPBF16Z256rri: + case X86::VCMPBF16Zrmi: + case X86::VCMPBF16Zrri: + case X86::VCMPBF16Z128rmik: + case X86::VCMPBF16Z128rrik: + case X86::VCMPBF16Z256rmik: + case X86::VCMPBF16Z256rrik: + case X86::VCMPBF16Zrmik: + case X86::VCMPBF16Zrrik: + case X86::VCMPBF16Z128rmbi: + case X86::VCMPBF16Z128rmbik: + case X86::VCMPBF16Z256rmbi: + case X86::VCMPBF16Z256rmbik: + case X86::VCMPBF16Zrmbi: + case X86::VCMPBF16Zrmbik: OS << "bf16\t"; break; } diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp index 0d92609b3a..5a814fce46 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp @@ -145,15 +145,24 @@ bool X86IntelInstPrinter::printVecCompareInstr(const MCInst *MI, raw_ostream &OS case X86::VCMPPHZrmbi: case X86::VCMPPHZrmbik: case X86::VCMPPHZrrib: case X86::VCMPPHZrribk: case X86::VCMPSHZrrib_Int: case X86::VCMPSHZrribk_Int: - case X86::VCMPBF16Z128rmi: case X86::VCMPBF16Z128rri: - case X86::VCMPBF16Z256rmi: case X86::VCMPBF16Z256rri: - case X86::V
[clang] [llvm] [X86][AVX10.2-BF16] Remove [NE]P from intrinsic and instruction name (PR #123335)
llvmbot wrote: @llvm/pr-subscribers-llvm-ir Author: Phoebe Wang (phoebewang) Changes Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965 --- Patch is 1.81 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/123335.diff 29 Files Affected: - (modified) clang/include/clang/Basic/BuiltinsX86.td (+48-48) - (modified) clang/lib/CodeGen/CGBuiltin.cpp (+15-15) - (modified) clang/lib/Headers/avx10_2_512bf16intrin.h (+103-107) - (modified) clang/lib/Headers/avx10_2bf16intrin.h (+210-216) - (modified) clang/lib/Sema/SemaX86.cpp (+9-9) - (modified) clang/test/CodeGen/X86/avx10_2_512bf16-builtins.c (+150-150) - (modified) clang/test/CodeGen/X86/avx10_2bf16-builtins.c (+273-273) - (modified) llvm/include/llvm/IR/IntrinsicsX86.td (+78-78) - (modified) llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp (+4-4) - (modified) llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp (+9-9) - (modified) llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp (+2-2) - (modified) llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp (+10-10) - (modified) llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp (+9-9) - (modified) llvm/lib/Target/X86/X86InstrAVX10.td (+70-70) - (modified) llvm/lib/Target/X86/X86InstrFMA3Info.cpp (+2-2) - (modified) llvm/lib/Target/X86/X86InstrUtils.td (+3-3) - (modified) llvm/lib/Target/X86/X86IntrinsicsInfo.h (+27-27) - (modified) llvm/test/CodeGen/X86/avx10.2-fma-commute.ll (+108-108) - (modified) llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll (+110-110) - (modified) llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll (+97-97) - (modified) llvm/test/CodeGen/X86/avx10_2bf16-arith.ll (+222-222) - (modified) llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll (+222-222) - (modified) llvm/test/MC/Disassembler/X86/avx10.2-bf16-32.txt (+1492-1492) - (modified) llvm/test/MC/Disassembler/X86/avx10.2-bf16-64.txt (+1492-1492) - (modified) llvm/test/MC/X86/avx10.2-bf16-32-att.s (+1492-1492) - (modified) llvm/test/MC/X86/avx10.2-bf16-32-intel.s (+1492-1492) - (modified) llvm/test/MC/X86/avx10.2-bf16-64-att.s (+1492-1492) - (modified) llvm/test/MC/X86/avx10.2-bf16-64-intel.s (+1492-1492) - (modified) llvm/test/TableGen/x86-fold-tables.inc (+492-492) ``diff diff --git a/clang/include/clang/Basic/BuiltinsX86.td b/clang/include/clang/Basic/BuiltinsX86.td index 18fc10eb85c027..32d5486f162b38 100644 --- a/clang/include/clang/Basic/BuiltinsX86.td +++ b/clang/include/clang/Basic/BuiltinsX86.td @@ -5304,75 +5304,75 @@ let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] i } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vaddnepbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>)">; + def vaddbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vaddnepbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>)">; + def vaddbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>)">; } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vaddnepbf16512 : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>)">; + def vaddbf16512 : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vdivnepbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>)">; + def vdivbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vdivnepbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>)">; + def vdivbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>)">; } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vdivnepbf16512 : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>)">; + def vdivbf16512 : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vmaxpbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>)">; + def vmaxbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vmaxpbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>)">; + def vmaxbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>)">; } l
[clang] [llvm] [X86][AVX10.2-BF16] Remove [NE]P from intrinsic and instruction name (PR #123335)
llvmbot wrote: @llvm/pr-subscribers-clang-codegen Author: Phoebe Wang (phoebewang) Changes Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965 --- Patch is 1.81 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/123335.diff 29 Files Affected: - (modified) clang/include/clang/Basic/BuiltinsX86.td (+48-48) - (modified) clang/lib/CodeGen/CGBuiltin.cpp (+15-15) - (modified) clang/lib/Headers/avx10_2_512bf16intrin.h (+103-107) - (modified) clang/lib/Headers/avx10_2bf16intrin.h (+210-216) - (modified) clang/lib/Sema/SemaX86.cpp (+9-9) - (modified) clang/test/CodeGen/X86/avx10_2_512bf16-builtins.c (+150-150) - (modified) clang/test/CodeGen/X86/avx10_2bf16-builtins.c (+273-273) - (modified) llvm/include/llvm/IR/IntrinsicsX86.td (+78-78) - (modified) llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp (+4-4) - (modified) llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp (+9-9) - (modified) llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp (+2-2) - (modified) llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp (+10-10) - (modified) llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp (+9-9) - (modified) llvm/lib/Target/X86/X86InstrAVX10.td (+70-70) - (modified) llvm/lib/Target/X86/X86InstrFMA3Info.cpp (+2-2) - (modified) llvm/lib/Target/X86/X86InstrUtils.td (+3-3) - (modified) llvm/lib/Target/X86/X86IntrinsicsInfo.h (+27-27) - (modified) llvm/test/CodeGen/X86/avx10.2-fma-commute.ll (+108-108) - (modified) llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll (+110-110) - (modified) llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll (+97-97) - (modified) llvm/test/CodeGen/X86/avx10_2bf16-arith.ll (+222-222) - (modified) llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll (+222-222) - (modified) llvm/test/MC/Disassembler/X86/avx10.2-bf16-32.txt (+1492-1492) - (modified) llvm/test/MC/Disassembler/X86/avx10.2-bf16-64.txt (+1492-1492) - (modified) llvm/test/MC/X86/avx10.2-bf16-32-att.s (+1492-1492) - (modified) llvm/test/MC/X86/avx10.2-bf16-32-intel.s (+1492-1492) - (modified) llvm/test/MC/X86/avx10.2-bf16-64-att.s (+1492-1492) - (modified) llvm/test/MC/X86/avx10.2-bf16-64-intel.s (+1492-1492) - (modified) llvm/test/TableGen/x86-fold-tables.inc (+492-492) ``diff diff --git a/clang/include/clang/Basic/BuiltinsX86.td b/clang/include/clang/Basic/BuiltinsX86.td index 18fc10eb85c027..32d5486f162b38 100644 --- a/clang/include/clang/Basic/BuiltinsX86.td +++ b/clang/include/clang/Basic/BuiltinsX86.td @@ -5304,75 +5304,75 @@ let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] i } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vaddnepbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>)">; + def vaddbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vaddnepbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>)">; + def vaddbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>)">; } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vaddnepbf16512 : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>)">; + def vaddbf16512 : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vdivnepbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>)">; + def vdivbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vdivnepbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>)">; + def vdivbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>)">; } let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { - def vdivnepbf16512 : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>)">; + def vdivbf16512 : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vmaxpbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>)">; + def vmaxbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>)">; } let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vmaxpbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>)">; + def vmaxbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>)">;