Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
xiaoxiang781216 merged PR #16293: URL: https://github.com/apache/nuttx/pull/16293 -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
stbenn commented on PR #16293: URL: https://github.com/apache/nuttx/pull/16293#issuecomment-2854579971 @jerpelea They have been split into separate commits -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
raiden00pl commented on PR #16293: URL: https://github.com/apache/nuttx/pull/16293#issuecomment-2853524486 @stbenn `nucleo-g0b1re/nsh` is not normalized. Try this command and update config: ``` boards/arm/stm32f0l0g0/nucleo-g0b1re/configs/nsh/defconfig ``` -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
stbenn commented on PR #16293: URL: https://github.com/apache/nuttx/pull/16293#issuecomment-2852151807 @lupyuen Any idea why Linux arm-13 might be failing on this build? I don't see any error or warnings (outside of CMake warning) in the logs. The only strange part of the logs is that after the check for `nucleo-g0b1re/nsh, CONFIG_ARM_TOOLCHAIN_CLANG` saves a new configuration file. Then every check afterwards has "Changes not staged for commit". -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
stbenn commented on code in PR #16293: URL: https://github.com/apache/nuttx/pull/16293#discussion_r2073380119 ## Documentation/platforms/arm/stm32g0/boards/nucleo-g0b1re/index.rst: ## @@ -0,0 +1,57 @@ + +ST Nucleo G0B1RE + +.. figure:: nucleo-g0b1re.png + :align: center + +Board Information += + +The Nucleo G0B1RE is a member of the Nucleo-64 board family, based on the +MB1360 reference board, featureing the STM32G0B1RET6U MCU. The STM32G0B1RE is Review Comment: Oops, fixed! -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
hartmannathan commented on code in PR #16293: URL: https://github.com/apache/nuttx/pull/16293#discussion_r2072661564 ## Documentation/platforms/arm/stm32g0/boards/nucleo-g0b1re/index.rst: ## @@ -0,0 +1,57 @@ + +ST Nucleo G0B1RE + +.. figure:: nucleo-g0b1re.png + :align: center + +Board Information += + +The Nucleo G0B1RE is a member of the Nucleo-64 board family, based on the +MB1360 reference board, featureing the STM32G0B1RET6U MCU. The STM32G0B1RE is Review Comment: Just one minor nit... ```suggestion MB1360 reference board, featuring the STM32G0B1RET6U MCU. The STM32G0B1RE is ``` -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
stbenn commented on PR #16293: URL: https://github.com/apache/nuttx/pull/16293#issuecomment-2847263236 Log from ostest run on d26d8f9 [ostest_log2.log](https://github.com/user-attachments/files/20013697/ostest_log2.log) -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
stbenn commented on code in PR #16293: URL: https://github.com/apache/nuttx/pull/16293#discussion_r2071640761 ## Documentation/platforms/arm/stm32g0/boards/nucleo-g0b1re/index.rst: ## @@ -0,0 +1,5 @@ + +ST Nucleo G0B1RE + + +The Nucleo G0B1RE is a member of the Nucleo-64 board family. Review Comment: Added requested changes in d26d8f9. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
stbenn commented on code in PR #16293: URL: https://github.com/apache/nuttx/pull/16293#discussion_r2071639028 ## arch/arm/src/stm32f0l0g0/stm32_crypto.c: ## @@ -79,7 +79,7 @@ static int stm32_newsession(uint32_t *sid, struct cryptoini *cri) *sid = g_stm32_sesnum++; break; - default : + default: Review Comment: Has been addressed in latest commit. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
stbenn commented on code in PR #16293: URL: https://github.com/apache/nuttx/pull/16293#discussion_r2071638737 ## boards/Kconfig: ## @@ -3552,6 +3562,7 @@ config ARCH_BOARD default "stm32g071b-disco" if ARCH_BOARD_STM32G071B_DISCO default "nucleo-g070rb" if ARCH_BOARD_NUCLEO_G070RB default "nucleo-g071rb" if ARCH_BOARD_NUCLEO_G071RB + default "nucleo-g0b1re" if ARCH_BOARD_NUCLEO_G0B1RE Review Comment: Has been addressed in latest version. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
stbenn commented on code in PR #16293: URL: https://github.com/apache/nuttx/pull/16293#discussion_r2070252033 ## arch/arm/src/stm32f0l0g0/Kconfig: ## @@ -531,6 +531,86 @@ config ARCH_CHIP_STM32G071RB select STM32F0L0G0_STM32G0 depends on ARCH_CHIP_STM32G0 +config ARCH_CHIP_STM32G0B1KB Review Comment: See #16296 . -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
stbenn commented on code in PR #16293: URL: https://github.com/apache/nuttx/pull/16293#discussion_r2070232400 ## arch/arm/include/stm32f0l0g0/chip.h: ## @@ -281,6 +281,39 @@ # define STM32_NCAP0 /* No Capacitive sensing channels */ # define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-F */ +#elif defined(CONFIG_ARCH_CHIP_STM32G0B1KB) || defined(CONFIG_ARCH_CHIP_STM32G0B1CB) || \ + defined(CONFIG_ARCH_CHIP_STM32G0B1RB) || defined(CONFIG_ARCH_CHIP_STM32G0B1MB) || \ + defined(CONFIG_ARCH_CHIP_STM32G0B1VB) || defined(CONFIG_ARCH_CHIP_STM32G0B1KC) || \ + defined(CONFIG_ARCH_CHIP_STM32G0B1CC) || defined(CONFIG_ARCH_CHIP_STM32G0B1RC) || \ + defined(CONFIG_ARCH_CHIP_STM32G0B1MC) || defined(CONFIG_ARCH_CHIP_STM32G0B1VC) || \ + defined(CONFIG_ARCH_CHIP_STM32G0B1KE) || defined(CONFIG_ARCH_CHIP_STM32G0B1CE) || \ + defined(CONFIG_ARCH_CHIP_STM32G0B1RE) || defined(CONFIG_ARCH_CHIP_STM32G0B1NE) || \ + defined(CONFIG_ARCH_CHIP_STM32G0B1ME) || defined(CONFIG_ARCH_CHIP_STM32G0B1VE) + +# define STM32_NATIM 1 /* One advanced timer TIM1 */ // Checked Review Comment: Good catch. Just a note, `nxstyle` check missed this. I ran it multiple times across all stm32f0l0g0 directories. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
stbenn commented on code in PR #16293: URL: https://github.com/apache/nuttx/pull/16293#discussion_r2070234101 ## arch/arm/src/stm32f0l0g0/stm32_crypto.c: ## @@ -79,7 +79,7 @@ static int stm32_newsession(uint32_t *sid, struct cryptoini *cri) *sid = g_stm32_sesnum++; break; - default : + default: Review Comment: This, along with the serial related changes you pointed out, was because `nxstyle` fails on these. I will remove the changes, hopefully that doesn't break the CI tests. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
stbenn commented on code in PR #16293:
URL: https://github.com/apache/nuttx/pull/16293#discussion_r2070234598
##
arch/arm/src/stm32f0l0g0/stm32_serial_v1.c:
##
@@ -2320,25 +2320,25 @@ static void stm32serial_pmnotify(struct pm_callback_s
*cb, int domain,
{
switch (pmstate)
{
- case(PM_NORMAL):
Review Comment:
See response to comment in `stm32_crypto.c`.
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Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
raiden00pl commented on code in PR #16293:
URL: https://github.com/apache/nuttx/pull/16293#discussion_r2069963907
##
arch/arm/src/stm32f0l0g0/Kconfig:
##
@@ -531,6 +531,86 @@ config ARCH_CHIP_STM32G071RB
select STM32F0L0G0_STM32G0
depends on ARCH_CHIP_STM32G0
+config ARCH_CHIP_STM32G0B1KB
Review Comment:
please split changes to `/arch` and `/boards` into separate commits.
Something like this:
* /arch/stm32f0l0g0: add stm32g0bXXX support
* /boards/stm32f0l0g0: Add Nucleo G0B1RE support
##
arch/arm/src/stm32f0l0g0/stm32_crypto.c:
##
@@ -79,7 +79,7 @@ static int stm32_newsession(uint32_t *sid, struct cryptoini
*cri)
*sid = g_stm32_sesnum++;
break;
- default :
+ default:
Review Comment:
please move this change to a separate commit
##
arch/arm/src/stm32f0l0g0/stm32_serial_v1.c:
##
@@ -2320,25 +2320,25 @@ static void stm32serial_pmnotify(struct pm_callback_s
*cb, int domain,
{
switch (pmstate)
{
- case(PM_NORMAL):
Review Comment:
please move serial related changes to a separate commit
##
arch/arm/include/stm32f0l0g0/chip.h:
##
@@ -281,6 +281,39 @@
# define STM32_NCAP0 /* No Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-F */
+#elif defined(CONFIG_ARCH_CHIP_STM32G0B1KB) ||
defined(CONFIG_ARCH_CHIP_STM32G0B1CB) || \
+ defined(CONFIG_ARCH_CHIP_STM32G0B1RB) ||
defined(CONFIG_ARCH_CHIP_STM32G0B1MB) || \
+ defined(CONFIG_ARCH_CHIP_STM32G0B1VB) ||
defined(CONFIG_ARCH_CHIP_STM32G0B1KC) || \
+ defined(CONFIG_ARCH_CHIP_STM32G0B1CC) ||
defined(CONFIG_ARCH_CHIP_STM32G0B1RC) || \
+ defined(CONFIG_ARCH_CHIP_STM32G0B1MC) ||
defined(CONFIG_ARCH_CHIP_STM32G0B1VC) || \
+ defined(CONFIG_ARCH_CHIP_STM32G0B1KE) ||
defined(CONFIG_ARCH_CHIP_STM32G0B1CE) || \
+ defined(CONFIG_ARCH_CHIP_STM32G0B1RE) ||
defined(CONFIG_ARCH_CHIP_STM32G0B1NE) || \
+ defined(CONFIG_ARCH_CHIP_STM32G0B1ME) ||
defined(CONFIG_ARCH_CHIP_STM32G0B1VE)
+
+# define STM32_NATIM 1 /* One advanced timer TIM1 */
// Checked
Review Comment:
remove c++ comments
##
boards/Kconfig:
##
@@ -3552,6 +3562,7 @@ config ARCH_BOARD
default "stm32g071b-disco" if ARCH_BOARD_STM32G071B_DISCO
default "nucleo-g070rb" if ARCH_BOARD_NUCLEO_G070RB
default "nucleo-g071rb" if ARCH_BOARD_NUCLEO_G071RB
+ default "nucleo-g0b1re" if
ARCH_BOARD_NUCLEO_G0B1RE
Review Comment:
please fix this indentation
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Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
acassis commented on code in PR #16293: URL: https://github.com/apache/nuttx/pull/16293#discussion_r2069670019 ## Documentation/platforms/arm/stm32g0/boards/nucleo-g0b1re/index.rst: ## @@ -0,0 +1,5 @@ + +ST Nucleo G0B1RE + + +The Nucleo G0B1RE is a member of the Nucleo-64 board family. Review Comment: Please include: - a picture of the board - the features this board has, which MCU PN# it uses, etc - add the supported board profiles -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
Re: [PR] boards/stm32f0l0g0: Add Nucleo G0B1RE support. [nuttx]
stbenn commented on PR #16293: URL: https://github.com/apache/nuttx/pull/16293#issuecomment-2842986262 Just noticed that `pipfile.lock` was updated when I built the documentation following the instructions in the Nuttx documentation. Should I discard this change from the PR? -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
