Paul Menzel (paulepan...@users.sourceforge.net) just uploaded a new patch set
to gerrit, which you can find at http://review.coreboot.org/2562
-gerrit
commit 68257c44434e861027250f2aad967b53bb35d2e3
Author: Paul Menzel <paulepan...@users.sourceforge.net>
Date: Fri Mar 1 13:05:04 2013 +0100
AMD CIMx SB800: late.c: Use variable `device` from for loop condition
Use the variable `device` instead of `dev` in the predicate of
the if condition, as `dev` is not changed in the for loop.
The for loop was added in the following commit.
commit 8fed77ae4c46122859d0718678e54546e126d4bc
Author: Scott Duplichan <sc...@notabs.org>
Date: Sat Jun 18 10:46:45 2011 -0500
ASRock E350M1: Configure SB800 GPP ports to support onboard pcie nic
Reviewed-on: http://review.coreboot.org/44
The assumption that the devices are ordered in the tree seem to
hold in this case (although it is not ensured) and therefore at
least with the ASRock E350M1 no (visible) change is experienced as
the children are all of type `DEVICE_PATH_PCI`.
Change-Id: Iaa2fa13305dbe924965d27680cd02fe30c2f58a5
Signed-off-by: Paul Menzel <paulepan...@users.sourceforge.net>
---
src/southbridge/amd/cimx/sb800/late.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/southbridge/amd/cimx/sb800/late.c
b/src/southbridge/amd/cimx/sb800/late.c
index cfdf9f2..506e90c 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -451,7 +451,7 @@ static void sb800_enable(device_t dev)
{
device_t device;
for (device = dev; device; device = device->next) {
- if (dev->path.type != DEVICE_PATH_PCI) continue;
+ if (device->path.type != DEVICE_PATH_PCI)
continue;
if ((device->path.pci.devfn & ~7) !=
PCI_DEVFN(0x15,0)) break;
sb_config->PORTCONFIG[device->path.pci.devfn &
3].PortCfg.PortPresent = device->enabled;
}
--
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