Hi Leela,
On 30 October 2013 12:23, Leela Krishna Amudala wrote:
> Adds watchdog device nodes to the DT device list for Exynos5250 and Exynos5420
>
> Signed-off-by: Leela Krishna Amudala
> ---
> arch/arm/boot/dts/exynos5.dtsi| 12 +---
> arch/arm/boot/dts/exynos5250.dtsi |7 ++
Hi Sachin,
On Wed, Oct 30, 2013 at 10:56 AM, Sachin Kamat wrote:
> Added an example for reference.
>
> Signed-off-by: Sachin Kamat
> ---
> .../devicetree/bindings/watchdog/samsung-wdt.txt |9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/wa
Adds watchdog device nodes to the DT device list for Exynos5250 and Exynos5420
Signed-off-by: Leela Krishna Amudala
---
arch/arm/boot/dts/exynos5.dtsi| 12 +---
arch/arm/boot/dts/exynos5250.dtsi |7 ++-
arch/arm/boot/dts/exynos5420.dtsi | 10 ++
3 files changed, 2
This patchset does the following things
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure pmu registers
to mask/unmask enable/disable of watchdog.
This patch set is rebased on Kgene's for-next branch and tested on SMDK5420
The syscon regmap interface is used to configure AUTOMATIC_WDT_RESET_DISABLE
and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of
watchdog in probe and s2r scenarios.
Signed-off-by: Leela Krishna Amudala
---
.../devicetree/bindings/watchdog/samsung-wdt.txt | 13 ++-
d
Adds watchdog device nodes to the DT device list for Exynos5250 and Exynos5420
Signed-off-by: Leela Krishna Amudala
---
arch/arm/boot/dts/exynos5.dtsi| 12 +---
arch/arm/boot/dts/exynos5250.dtsi |7 ++-
arch/arm/boot/dts/exynos5420.dtsi | 10 ++
3 files changed, 2
The syscon regmap interface is used to configure AUTOMATIC_WDT_RESET_DISABLE
and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of
watchdog in probe and s2r scenarios.
Signed-off-by: Leela Krishna Amudala
---
.../devicetree/bindings/watchdog/samsung-wdt.txt | 13 ++-
d
This patchset does the following things
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure pmu registers
to mask/unmask enable/disable of watchdog.
This patch set is rebased on Kgene's for-next branch and tested on SMDK5420
On Mon, Oct 28, 2013 at 1:38 PM, Olof Johansson wrote:
> On Mon, Sep 23, 2013 at 10:20 AM, Christian Daudt wrote:
>> --- a/arch/arm/mach-bcm/Kconfig
>> +++ b/arch/arm/mach-bcm/Kconfig
>> @@ -1,5 +1,17 @@
>> config ARCH_BCM
>> - bool "Broadcom SoC" if ARCH_MULTI_V7
>> + bool "Broadcom
From: Rob Herring
Introduce a helper to match, create and probe a platform device. This
is for drivers such as cpuidle or cpufreq that typically don't have a
bus device node and need to match on a system-level compatible property.
Cc: Greg Kroah-Hartman
Cc: Grant Likely
Signed-off-by: Rob Herr
From: Rob Herring
Add boilerplate helpers to create initcalls which are conditional on
matching on devicetree properties.
Cc: Grant Likely
Signed-off-by: Rob Herring
---
include/linux/of.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/linux/of.h b/include/linux/of.
From: Rob Herring
This series adds a couple of boilerplate helpers to match with DT for
initcalls and platform device creation and probe. The goal here is to
remove more platform code out of arch/arm and eventually the machine
descriptors.
Rob
Rob Herring (2):
driver core: introduce module_p
Added an example for reference.
Signed-off-by: Sachin Kamat
---
.../devicetree/bindings/watchdog/samsung-wdt.txt |9 +
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.
On 30 October 2013 10:41, Sachin Kamat wrote:
> Added an example for reference.
>
> Signed-off-by: Sachin Kamat
> ---
> .../devicetree/bindings/watchdog/samsung-wdt.txt |9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.t
On Tue, Oct 29, 2013 at 12:44 PM, Mark Brown wrote:
>
> Please take a look at Morimoto-san's work on the generic sound card if
> you want to work on a generic card, it'd be good if some of the people
> complaining about this stuff could help him work on that as he doesn't
> seem to be getting any
On 28 October 2013 19:07, Guenter Roeck wrote:
> On 10/27/2013 11:24 PM, Sachin Kamat wrote:
>>
>> Update the name as per DT naming convention.
>>
>> Signed-off-by: Sachin Kamat
>> ---
>> .../devicetree/bindings/watchdog/samsung-wdt.txt |2 +-
>> 1 file changed, 1 insertion(+), 1 deletio
Added an example for reference.
Signed-off-by: Sachin Kamat
---
.../devicetree/bindings/watchdog/samsung-wdt.txt |9 +
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.
From: Rob Herring
Platform devices created by DT code don't initialize dma_mask pointer to
anything. Set it to coherent_dma_mask by default if the architecture
code has not set it.
Signed-off-by: Rob Herring
---
I think this is at least part of what is needed to fix dma_mask issue
raised by Ste
Hi Sascha,
On Tue, Oct 29, 2013 at 02:51:43PM +0100, Sascha Hauer wrote:
> Look at drivers/dma/imx-sdma.c:
>
> > /**
> > * struct sdma_firmware_header - Layout of the firmware image
> > *
> > * @magic "SDMA"
> > * @version_major increased whenever layout of struct
> > * sdma_scri
Updated supported SoC name for pwm-samsung.
Signed-off-by: Sachin Kamat
---
.../devicetree/bindings/pwm/pwm-samsung.txt|2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
b/Documentation/devicetree/bindings/pwm/pwm
On Fri, Oct 18, 2013 at 11:39:28AM -0700, Stephen Boyd wrote:
> On 10/15/13 07:11, Stanimir Varbanov wrote:
> > This adds a driver for hardware random number generator present
> > on Qualcomm MSM SoC's.
> >
> > Signed-off-by: Stanimir Varbanov
> > ---
>
> Reviewed-by: Stephen Boyd
Both patches
On Thu, Oct 24, 2013 at 9:52 AM, Ezequiel Garcia
wrote:
> Just as suggestion, I think you should reconsider your 'upstream strategy'.
>
> On Thu, Oct 24, 2013 at 06:20:16PM +0530, Pekon Gupta wrote:
> [..]
>>
>> Pekon Gupta (10):
>> ARM: OMAP2+: cleaned-up DT support of various ECC schemes
>>
Hi Mark,
Apologize for my late reply.
On Thu, Oct 24, 2013 at 10:57 PM, Mark Rutland wrote:
>
> On Thu, Oct 24, 2013 at 06:05:53PM +0100, Manish Badarkhe wrote:
> > Hi Mark,
> >
> > Thank you for your reply.
> >
> > On Wed, Oct 23, 2013 at 10:15 PM, Mark Rutland wrote:
> >
> > On Wed, Oct
On 10/29/2013 05:12 PM, Kumar Gala wrote:
On Oct 28, 2013, at 7:25 PM, Mark Rutland wrote:
On Mon, Oct 28, 2013 at 11:31:36PM +, Tomasz Figa wrote:
On Monday 28 of October 2013 14:56:49 Olof Johansson wrote:
On Mon, Oct 28, 2013 at 05:57:04AM -0500, Kumar Gala wrote:
On Oct 28, 2013, at
On Tue, Oct 29, 2013 at 12:44 PM, Mark Brown wrote:
> On Tue, Oct 29, 2013 at 11:56:54AM -0500, Matt Sealey wrote:
>
>> Maybe this is a reasonable place to ask since I am holding off on
>> doing any audio support for the i.MX platform I want to push a DT for,
>> and I am still bashing my head over
Hi Mark (Brown), Mark (Rutland)
I had sent v4 patch, but I removed simple-card,card-name on it.
But, as Mark (Brown) explained, I think simple-card,card-name
is very helpful for users.
I can send v5 patch (with it), or incremental patch if we can have it.
So, I need your comment
> [1 ]
> [1.1
On Tue, Oct 29, 2013 at 06:00:59PM +, Stephen Boyd wrote:
> On 10/29/13 01:21, Kumar Gala wrote:
> > On Oct 28, 2013, at 7:31 PM, Stephen Boyd wrote:
> >
> >> The Krait L1/L2 error reporting device is made up of two
> >> interrupts, one per-CPU interrupt for the L1 caches and one
> >> interrupt
On Tue, Oct 29, 2013 at 05:06:45AM +, Stephen Boyd wrote:
> On 10/28, Mark Rutland wrote:
> > On Tue, Oct 29, 2013 at 12:31:28AM +, Stephen Boyd wrote:
> > > +
> > > +Optional properties:
> > > +- interrupt-names: Should contain the interrupt names "l1_irq" and
> > > + "l2_irq"
> >
> > As
On Tue, Oct 29, 2013 at 12:19:08PM -0500, Kumar Gala wrote:
>
> On Oct 29, 2013, at 3:44 AM, Simon Horman wrote:
>
> > On Tue, Oct 29, 2013 at 03:24:16AM -0500, Kumar Gala wrote:
> >>
> >> On Oct 28, 2013, at 11:59 PM, Simon Horman wrote:
> >>
> >>> On Wed, Oct 16, 2013 at 04:06:01PM +0400, Val
On Oct 29, 2013, at 7:06 PM, Laurent Pinchart wrote:
> Hi Kumar,
>
> Thank you for the review.
>
> On Tuesday 29 October 2013 18:36:06 Kumar Gala wrote:
>> On Oct 29, 2013, at 9:55 AM, Laurent Pinchart wrote:
>>> MSTP clocks are gate clocks controlled through a register that handles
>>> up to 3
On 10/29/2013 01:54 PM, Mauro Carvalho Chehab wrote:
[...]
Yeah, it seems that we've waited for a long time to get an ack there.
So, let's do this:
Please send a new version with Mark's comments. Also, please split Doc
changes from the code changes on the new series. I'll wait for a couple
days
On 10/29, Stephen Boyd wrote:
> On 10/29/13 01:21, Kumar Gala wrote:
> > On Oct 28, 2013, at 7:31 PM, Stephen Boyd wrote:
> >
> >> The Krait L1/L2 error reporting device is made up of two
> >> interrupts, one per-CPU interrupt for the L1 caches and one
> >> interrupt for the L2 cache.
> >>
> >> Cc:
Hi Kumar,
Thank you for the review.
On Tuesday 29 October 2013 18:36:06 Kumar Gala wrote:
> On Oct 29, 2013, at 9:55 AM, Laurent Pinchart wrote:
> > MSTP clocks are gate clocks controlled through a register that handles
> > up to 32 clocks. The register is often sparsely populated.
> >
> > Those
On Oct 29, 2013, at 6:54 PM, Laurent Pinchart wrote:
> Hi Kumar,
>
> Thank you for the review.
>
> On Tuesday 29 October 2013 18:33:00 Kumar Gala wrote:
>> On Oct 29, 2013, at 9:55 AM, Laurent Pinchart wrote:
>>> DIV6 clocks are divider gate clocks controlled through a single
>>> register. The
On Oct 29, 2013, at 9:55 AM, Laurent Pinchart wrote:
> The R8A7790 has several clocks that are too custom to be supported in a
> generic driver. Those clocks can be divided in two categories:
>
> - Fixed rate clocks with multiplier and divisor set according to boot
> mode configuration
>
> - C
Hi Kumar,
Thank you for the review.
On Tuesday 29 October 2013 18:33:00 Kumar Gala wrote:
> On Oct 29, 2013, at 9:55 AM, Laurent Pinchart wrote:
> > DIV6 clocks are divider gate clocks controlled through a single
> > register. The divider is expressed on 6 bits, hence the name, and can
> > take v
On Oct 29, 2013, at 9:55 AM, Laurent Pinchart wrote:
> MSTP clocks are gate clocks controlled through a register that handles
> up to 32 clocks. The register is often sparsely populated.
>
> Those clocks are found on Renesas ARM SoCs.
>
> Signed-off-by: Laurent Pinchart
> ---
> .../bindings/cl
On Oct 29, 2013, at 9:55 AM, Laurent Pinchart wrote:
> DIV6 clocks are divider gate clocks controlled through a single
> register. The divider is expressed on 6 bits, hence the name, and can
> take values from 1/1 to 1/64.
>
> Those clocks are found on Renesas ARM SoCs.
>
> Signed-off-by: Laure
On Aug 29, 2013, at 7:52 AM, Lokesh Vutla wrote:
> Add the AM33xx RNG module's device tree data.
> Also add Documentation file describing the data
> for the RNG module.
>
> Signed-off-by: Lokesh Vutla
> ---
> Changes since V1:
> - Drop "status=disabled" entry in dt node, Since
> RNG is present
* Lokesh Vutla [131016 04:16]:
> + Rob and Mark
> On Tuesday 15 October 2013 12:19 PM, Benoit Cousson wrote:
> > Hi Lokesh,
> >
> > On 12/10/2013 15:26, Lokesh Vutla wrote:
> >> Hi Benoit,
> >> On Thursday 29 August 2013 06:22 PM, Lokesh Vutla wrote:
> >>> Add the AM33xx RNG module's device tree
* Tony Lindgren [131011 16:49]:
> * Suman Anna [131010 14:24]:
> > Add the hwspinlock device tree node for OMAP4 family
> > of SoCs.
>
> Suman, can you please post the .dts changes separately from
> the driver changes next time so driver maintainers don't
> accidentally pick them up. That leads
On Tue, Oct 29, 2013 at 11:00 AM, Stephen Boyd wrote:
> On 10/29/13 01:21, Kumar Gala wrote:
>> On Oct 28, 2013, at 7:31 PM, Stephen Boyd wrote:
>>
>>> The Krait L1/L2 error reporting device is made up of two
>>> interrupts, one per-CPU interrupt for the L1 caches and one
>>> interrupt for the L2
On Tue, Oct 29, 2013 at 03:12:05AM -0500, Kumar Gala wrote:
>
> On Oct 28, 2013, at 7:25 PM, Mark Rutland wrote:
>
> > On Mon, Oct 28, 2013 at 11:31:36PM +, Tomasz Figa wrote:
> >> On Monday 28 of October 2013 14:56:49 Olof Johansson wrote:
> >>> On Mon, Oct 28, 2013 at 05:57:04AM -0500, Kuma
On 10/29/13 01:21, Kumar Gala wrote:
> On Oct 28, 2013, at 7:31 PM, Stephen Boyd wrote:
>
>> The Krait L1/L2 error reporting device is made up of two
>> interrupts, one per-CPU interrupt for the L1 caches and one
>> interrupt for the L2 cache.
>>
>> Cc:
>> Signed-off-by: Stephen Boyd
>> ---
>> ..
On 10/25, Andy Gross wrote:
> diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
> index f238cfd..a71b415 100644
> --- a/drivers/dma/Kconfig
> +++ b/drivers/dma/Kconfig
> @@ -364,4 +364,13 @@ config DMATEST
> Simple DMA test client. Say N unless you're debugging a
> DMA Device d
On Fri, Oct 25, 2013 at 10:56 AM, Tero Kristo wrote:
> Some devices require their clocks to be available with a specific
> dev-id con-id mapping. With DT, the clocks can be found by default
> only with their name, or alternatively through the device node of
> the consumer. With drivers, that don't
On Tue, Oct 29, 2013 at 11:56:54AM -0500, Matt Sealey wrote:
> Maybe this is a reasonable place to ask since I am holding off on
> doing any audio support for the i.MX platform I want to push a DT for,
> and I am still bashing my head over the logic in this. Why is this so
> much more complicated
Hi,
On Tue, Oct 29, 2013 at 04:06:58PM +0100, Andreas Fenkart wrote:
> >> diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
> >> index 94d6dc8..53beac4 100644
> >> --- a/drivers/mmc/host/omap_hsmmc.c
> >> +++ b/drivers/mmc/host/omap_hsmmc.c
> >> @@ -130,6 +130,7 @@ static
On Oct 29, 2013, at 7:33 AM, Nicolin Chen wrote:
> There's a script for SSI missing in current sdma script list. Thus add it.
> This script would allow SSI use its dual fifo mode to transimit/receive
> data without occasional hardware underrun/overrun.
>
> This patch also fixed a counting error
On Oct 29, 2013, at 3:44 AM, Simon Horman wrote:
> On Tue, Oct 29, 2013 at 03:24:16AM -0500, Kumar Gala wrote:
>>
>> On Oct 28, 2013, at 11:59 PM, Simon Horman wrote:
>>
>>> On Wed, Oct 16, 2013 at 04:06:01PM +0400, Valentine Barshak wrote:
R-Car Gen2 SoCs have a different PHY which is not
On Oct 5, 2013, at 6:17 AM, Andreas Fenkart wrote:
> For now, only support SDIO interrupt if we are booted with
> DT. This is because some platforms need special quirks. And
> we don't want to add new legacy mux platform init code
> callbacks any longer as we are moving to DT based booting
> anyw
On Sat, Oct 26, 2013 at 6:48 AM, Mark Brown wrote:
> On Fri, Oct 25, 2013 at 08:15:13PM +0100, Grant Likely wrote:
>> On Thu, 24 Oct 2013 14:13:49 +0200, Denis Carikli wrote:
>
>> > +- mux-int-port : The internal port of the i.MX audio muxer (AUDMUX).
>> > +- mux-ext-port : The external port of t
Looking in clk-exynso5420 driver 'usbd301' falls at ID 367
instead of 377. Correct the same.
No functional change, just document correction.
Signed-off-by: Vivek Gautam
CC: Chander Kashyap
CC: Thomas Abraham
CC: Rahul Sharma
CC: Tomasz Figa
CC: Mike Turquette
CC: Kukjin Kim
---
.../devicet
Hi,
On Tue, Oct 15, 2013 at 1:39 PM, Grant Likely wrote:
> All the users of of_irq_parse_raw pass in a raw interrupt specifier from
> the device tree and expect it to be returned (possibly modified) in an
> of_phandle_args structure. However, the primary function of
> of_irq_parse_raw() is to che
On 10/25/2013 10:56 AM, Tero Kristo wrote:
> Testing done:
> - omap3-beagle: boot + suspend/resume (ret + off)
> - omap4-panda-es: boot + suspend/resume
> - omap5-uevm: boot
> - dra7-evm: boot
> - am335x-bone: boot
>
> Test branches available:
>
> tree: https://github.com/t-kristo/linux-pm.git
On Tue, Oct 29, 2013 at 7:32 AM, Markus Pargmann wrote:
> imx27 pincontrol driver using the imx1 core driver. The DT bindings are
> similar to other imx pincontrol drivers.
>
> Signed-off-by: Markus Pargmann
> Acked-by: Sascha Hauer
> Acked-by: Shawn Guo
> ---
> Hi,
>
> another binding documen
The following devices/functionalities were added:
* Main and secondary UARTs.
* i2c and the pcf8563 device.
* CMO-QVGA(With backlight), DVI-VGA and DVI-SVGA displays
* Ethernet.
* NAND.
* The BP1 button.
* The LED.
* Watchdog
* SD.
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: St
Without that patch, a user can't select the imxfb driver when the i.MX25 and/or
the i.MX27 device tree board are selected and that no boards that selects
IMX_HAVE_PLATFORM_IMX_FB are compiled in.
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Stephen Warren
Cc: Ian Campbell
Cc: devic
pwmr has to be set to get the imxfb backlight work,
though pwmr was only configurable trough the platform data.
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Stephen Warren
Cc: Ian Campbell
Cc: devicetree@vger.kernel.org
Cc: Jean-Christophe Plagniol-Villard
Cc: Tomi Valkeinen
Cc: linu
This is mostly cut and paste from the imx35 pinctrl driver.
The data was generated using sed and awk on
arch/arm/plat-mxc/include/mach/iomux-mx25.h.
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Stephen Warren
Cc: Ian Campbell
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer
Cc: linux
Uart1, fec, i2c1,esdhc1 and audmux were added.
I also added a label to the iomuxc device node like in:
7b7d672 ARM i.MX dts: Consistently add labels to devicenodes
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Stephen Warren
Cc: Ian Campbell
Cc: devicetree@vger.kernel.org
Cc: Sascha
On Oct 29, 2013, at 8:19 AM, Maxime Coquelin wrote:
>
> On 10/28/2013 08:25 PM, Kumar Gala wrote:
>> On Oct 14, 2013, at 7:46 AM, Maxime COQUELIN wrote:
>>
>>> This patch adds support to SSC (Synchronous Serial Controller)
>>> I2C driver. This IP also supports SPI protocol, but this is not
>>>
On 10/29/13 04:42, Tomasz Figa wrote:
Hi Kukjin, Mike,
On Monday 21 of October 2013 05:16:05 Mike Turquette wrote:
Quoting Kukjin Kim (2013-10-20 13:51:42)
On 10/20/13 01:03, Tomasz Figa wrote:
Hi Mike, Kukjin, Rafael,
On Tuesday 24 of September 2013 14:50:06 Mateusz Krawczuk wrote:
This pa
Hi,
On Tue, 2013-10-29 at 10:05 -0500, Josh Cartwright wrote:
> On Tue, Oct 29, 2013 at 04:18:35PM +0200, Ivan T. Ivanov wrote:
> > On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote:
> > > Document the bindings used to describe the Qualcomm 8x41 PMICs.
> > >
> > > Signed-off-by: Josh Ca
On Tue, 29 Oct 2013, Laxman Dewangan wrote:
> Device ams AS3722 supports the one 32KHz clock output. The clock control
> support is provided through clock driver.
>
> Add clock driver as mfd sub device to probe the clock driver.
>
> Signed-off-by: Laxman Dewangan
> ---
> Documentation/devicetr
On Tue, Oct 29, 2013 at 04:08:29PM +0200, Ivan T. Ivanov wrote:
> On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote:
> > Signed-off-by: Josh Cartwright
> > ---
> > .../bindings/spmi/qcom,spmi-pmic-arb.txt | 42
> > ++
> > 1 file changed, 42 insertions(+)
> >
On Tue, Oct 29, 2013 at 02:55:56PM +0100, Linus Walleij wrote:
> On Mon, Oct 28, 2013 at 10:00 AM, Markus Pargmann wrote:
>
> > Core driver for register formats of imx1/imx21/imx27 processors.
> >
> > The pins of those processors are grouped into ports. Each port has 32
> > pins. The pins mux con
On Tue, Oct 29, 2013 at 04:18:35PM +0200, Ivan T. Ivanov wrote:
> On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote:
> > Document the bindings used to describe the Qualcomm 8x41 PMICs.
> >
> > Signed-off-by: Josh Cartwright
> > ---
> > Documentation/devicetree/bindings/mfd/pm8x41.txt | 3
Hi
2013/10/8 Felipe Balbi :
> Hi,
>
> On Sat, Oct 05, 2013 at 01:17:08PM +0200, Andreas Fenkart wrote:
>> For now, only support SDIO interrupt if we are booted with
>> DT. This is because some platforms need special quirks. And
>> we don't want to add new legacy mux platform init code
>> callbacks
Hello,
This patch set adds CCF drivers for the clocks found in the Renesas R-Car
R8A7790 (H2) SoC.
The patches are pretty self-explanatory and described in their respective
commit message. The R8A7790 datasheet is unfortunately not publicly available.
The code is available in my git tree at
DIV6 clocks are divider gate clocks controlled through a single
register. The divider is expressed on 6 bits, hence the name, and can
take values from 1/1 to 1/64.
Those clocks are found on Renesas ARM SoCs.
Signed-off-by: Laurent Pinchart
---
.../bindings/clock/renesas,cpg-div6-clocks.txt
MSTP clocks are gate clocks controlled through a register that handles
up to 32 clocks. The register is often sparsely populated.
Those clocks are found on Renesas ARM SoCs.
Signed-off-by: Laurent Pinchart
---
.../bindings/clock/renesas,cpg-mstp-clocks.txt | 47 +
drivers/clk/shmobile/
The R8A7790 has several clocks that are too custom to be supported in a
generic driver. Those clocks can be divided in two categories:
- Fixed rate clocks with multiplier and divisor set according to boot
mode configuration
- Custom divider clocks with SoC-specific divider values
This driver s
imx27 pincontrol driver using the imx1 core driver. The DT bindings are
similar to other imx pincontrol drivers.
Signed-off-by: Markus Pargmann
Acked-by: Sascha Hauer
Acked-by: Shawn Guo
---
Hi,
another binding documentation update. The MUX_ID components are described more
detailed now.
Regar
Hi Josh,
On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote:
> Document the bindings used to describe the Qualcomm 8x41 PMICs.
>
> Signed-off-by: Josh Cartwright
> ---
> Documentation/devicetree/bindings/mfd/pm8x41.txt | 33
>
> 1 file changed, 33 insertions(+)
Hi Josh,
On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote:
> Signed-off-by: Josh Cartwright
> ---
> .../bindings/spmi/qcom,spmi-pmic-arb.txt | 42
> ++
> 1 file changed, 42 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/spmi/qcom
On Mon, Oct 28, 2013 at 10:00 AM, Markus Pargmann wrote:
> +static int imx1_pinconf_get(struct pinctrl_dev *pctldev,
> +unsigned pin_id, unsigned long *config)
> +{
> + struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
> +
> + *config = imx1_re
On Mon, Oct 28, 2013 at 10:00 AM, Markus Pargmann wrote:
> imx27 pincontrol driver using the imx1 core driver. The DT bindings are
> similar to other imx pincontrol drivers.
>
> Signed-off-by: Markus Pargmann
> Acked-by: Sascha Hauer
> Acked-by: Shawn Guo
I haven't applied this since there ar
On Tue, Oct 29, 2013 at 08:33:15PM +0800, Nicolin Chen wrote:
> There's a script for SSI missing in current sdma script list. Thus add it.
> This script would allow SSI use its dual fifo mode to transimit/receive
> data without occasional hardware underrun/overrun.
>
> This patch also fixed a coun
On Mon, Oct 28, 2013 at 10:00 AM, Markus Pargmann wrote:
> Core driver for register formats of imx1/imx21/imx27 processors.
>
> The pins of those processors are grouped into ports. Each port has 32
> pins. The pins mux configuration is controlled by registers with 1 or 2
> bit per pin, depending
On 29/10/2013 13:58, Wim Van Sebroeck wrote:
Hi Boris,
I'm sorry for the inconvenience, but I found some bugs in my patch series:
1) the secs_to_ticks returns an erronous value when 0 is passed as an
argument
2) the calculated heartbeat is too small for some use cases
(i.e. kexecing a new
On 10/28/2013 08:25 PM, Kumar Gala wrote:
On Oct 14, 2013, at 7:46 AM, Maxime COQUELIN wrote:
This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.
This IP is embedded in all ST SoCs for Set-top b
On 10/29/2013 09:26 AM, Kumar Gala wrote:
>
> On Oct 28, 2013, at 5:17 PM, Tomasz Figa wrote:
>
> diff --git a/Documentation/devicetree/bindings/clock/zynq-7000.txt
> b/Documentation/devicetree/bindings/clock/zynq-7000.txt index
> d99af878f5d7..11fdd146ec83 100644
> --- a/Document
Thank you, sir. And sorry for taking your time.
Sent by Android device.
Timur Tabi wrote:
Chen Guangyu-B42378 wrote:
> Without dual fifo support, handware underrun would occasionally
> occur and then two audio channels would physically swap. This could
> be easily reproduced in low bus freque
Chen Guangyu-B42378 wrote:
Without dual fifo support, handware underrun would occasionally
occur and then two audio channels would physically swap. This could
be easily reproduced in low bus frequency situation, while it would
be better if we enable dual fifo.
Ok.
ACK.
--
To unsubscribe from
Hi Boris,
> I'm sorry for the inconvenience, but I found some bugs in my patch series:
>
> 1) the secs_to_ticks returns an erronous value when 0 is passed as an
> argument
> 2) the calculated heartbeat is too small for some use cases
> (i.e. kexecing a new kernel might trigger a watchdog res
Em Tue, 29 Oct 2013 01:06:30 +0100
Sylwester Nawrocki escreveu:
> Hi Mauro,
>
> On 10/28/2013 11:11 PM, Mauro Carvalho Chehab wrote:
> >> The following changes since commit
> >> 8ca5d2d8e58df7235b77ed435e63c484e123fede:
> >> >
> >> > [media] uvcvideo: Fix data type for pan/tilt control (201
Without dual fifo support, handware underrun would occasionally occur and then
two audio channels would physically swap. This could be easily reproduced in
low bus frequency situation, while it would be better if we enable dual fifo.
Sent by Android device.
Timur Tabi wrote:
Nicolin Chen wr
Nicolin Chen wrote:
By enabling dual fifo mode, it would allow SSI enter a better performance
to transimit/receive data without occasional hardware underrun/overrun.
Have you measured any real performance gain with this patch? I
considered adding dual-FIFO support when I originally wrote this
By enabling dual fifo mode, it would allow SSI enter a better performance
to transimit/receive data without occasional hardware underrun/overrun.
[ Passed compile-test with mpc85xx_defconfig ]
Signed-off-by: Nicolin Chen
---
sound/soc/fsl/fsl_ssi.c | 24 +++-
1 file changed,
There's a script for SSI missing in current sdma script list. Thus add it.
This script would allow SSI use its dual fifo mode to transimit/receive
data without occasional hardware underrun/overrun.
This patch also fixed a counting error for total number of scripts.
Signed-off-by: Nicolin Chen
--
Use dual-fifo sdma scripts instead of shared scripts for ssi on i.MX series.
Signed-off-by: Nicolin Chen
---
arch/arm/boot/dts/imx51.dtsi | 4 ++--
arch/arm/boot/dts/imx53.dtsi | 4 ++--
arch/arm/boot/dts/imx6qdl.dtsi | 12 ++--
arch/arm/boot/dts/imx6sl.dtsi | 12 ++--
4 f
Changelog
v1:
* SSI can reduce hardware overrun/underrun possibility when using dual
* fifo mode. To support this mode, we need to first update sdma sciprt
* list, and then enable dual fifo BIT in SSI driver, and last update DT
* bindings of i.MX series.
*
* ! This series of patches has a dir
ams AS3722 supports the power off functionality to turn off
system.
Add power off driver for ams AS3722.
Signed-off-by: Laxman Dewangan
---
drivers/power/reset/Kconfig |6 ++
drivers/power/reset/Makefile |1 +
drivers/power/reset/as3722-poweroff.c | 101 +
ams AS3722 device supports the power off by turning off its all rails.
Add dt node properties to enable this functionality on this device.
Signed-off-by: Laxman Dewangan
---
Documentation/devicetree/bindings/mfd/as3722.txt |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff
Device ams AS3722 supports the one 32KHz clock output. The clock control
support is provided through clock driver.
Add clock driver as mfd sub device to probe the clock driver.
Signed-off-by: Laxman Dewangan
---
Documentation/devicetree/bindings/mfd/as3722.txt |9 +
drivers/mfd/as37
Device ams AS3722 supports one clock 32KHz output. Add clock driver
to control the clock through clock framework.
Signed-off-by: Laxman Dewangan
---
drivers/clk/Kconfig |8 ++
drivers/clk/Makefile |1 +
drivers/clk/clk-as3722.c | 166
Add power off and clock driver for the ams AS3722.
The mfd patches are depends on mfd subtree which can be applied independtly.
The pacthes are created such that clock driver can go in clock tree and power
off driver in power sub tree.
Laxman Dewangan (4):
mfd: as3722: add clock driver as mfd-s
Add initial support for cm-fx6 module.
cm-fx6 is a module based on mx6q SoC with the following features:
- Up to 4GB of DDR3
- 1 LCD/DVI output port
- 1 HDMI output port
- 2 LVDS LCD ports
- Gigabit Ethernet
- Analog Audio
- CAN
- SATA
- NAND
- PCIE
This patch allows to boot up the module, config
Hi Andrew,
Can you please review this patch?
If it is lost then I will be happy to repost it.
Thanks,
Laxman
On Monday 21 October 2013 05:17 PM, Laxman Dewangan wrote:
The ams AS3722 is a compact system PMU suitable for mobile phones,
tablets etc.
Add a driver to support accessing the RTC fou
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