This patch adds a watchdog driver for devices controlled through GPIO,
(Analog Devices ADM706, Maxim MAX823, National NE555 etc).
Signed-off-by: Alexander Shiyan
---
.../devicetree/bindings/watchdog/gpio-wdt.txt | 23 ++
drivers/watchdog/Kconfig | 8 +
drivers/w
On Friday 29 November 2013, Linus Walleij wrote:
> On Thu, Nov 28, 2013 at 5:37 PM, Arnd Bergmann wrote:
> > On Thursday 28 November 2013, Jonas Jensen wrote:
> >> +static void __iomem *moxart_gpio_base;
> >
> > Just one comment: the usual way to do such a driver is to have
> > a derived data stru
All hardware parts of the (mv78230 Armada XP based) NETGEAR ReadyNAS
2120 are supported by mainline kernel (USB 3.0 and eSATA rear ports,
USB 2.0 front port, Gigabit controller and PHYs for the two rear ports,
serial port, LEDs, Buttons, 88SE9170 SATA controllers, three G762 fan
controllers, G751
Hi,
On Fri, Nov 29, 2013 at 09:00:29PM +0200, Tero Kristo wrote:
> On 11/26/2013 10:51 AM, Alexander Aring wrote:
> >Hi,
> >
> >On Tue, Nov 26, 2013 at 10:05:56AM +0200, Tero Kristo wrote:
> >>From: J Keerthy
> >>
> >>The patch adds support for DRA7 PCIe APLL. The APLL
> >>sources the optional fu
On Sat, Nov 30, 2013 at 12:35:52AM +0400, Valentine wrote:
> On 11/30/2013 12:14 AM, Tejun Heo wrote:
> >Hello,
> >
> >On Wed, Nov 27, 2013 at 02:06:05AM +0400, Valentine wrote:
> >>On 11/08/2013 04:09 PM, Valentine Barshak wrote:
> >>
> >>Tejun,
> >>are you OK with taking this?
> >
> >Yeah, the st
On 11/30/2013 12:14 AM, Tejun Heo wrote:
Hello,
On Wed, Nov 27, 2013 at 02:06:05AM +0400, Valentine wrote:
On 11/08/2013 04:09 PM, Valentine Barshak wrote:
Tejun,
are you OK with taking this?
Yeah, the stat part looks okay to me. How the two should be routed?
Both through libata or should I
This patch provides some whitespace cleanup for NETGEAR
ReadyNAS Duo v2 and 102 .dts files:
- Fixed bad spaces
- Added some space between nodes to improve readability
Signed-off-by: Arnaud Ebalard
---
arch/arm/boot/dts/armada-370-netgear-rn102.dts | 1 +
.../boot/dts/kirkwood-netgear_re
On Fri, Nov 29, 2013 at 12:11 PM, Jonas Jensen wrote:
> Add GPIO driver for MOXA ART SoCs.
>
> Signed-off-by: Jonas Jensen
OK this v6 version is looking *really good* so I have
applied it, couldn't hesitate.
> +static struct gpio_chip moxart_template_chip = {
> + .label
The patch does some cleanup work on NETGEAR ReadyNAS 104 .dts
file. Changes are listed below:
- Completed conversion from value to macros for GPIO voltage level
- Converted all numeric input key values to macros
- Fixed all node names and labels to use respectively '-' and '_'
- Made button n
The patch does some cleanup work on NETGEAR ReadyNAS 102 .dts
file. Changes are listed below
- Added missing button mpp in pinctrl
- Converted from value to macros for GPIO voltage level
- Converted all numeric input key values to macros
- Added GPIO keys pins to pinctrl
- Made button names
The patch does some cleanup work on NETGEAR ReadyNAS Duo v2 .dts
file. Changes are listed below:
- Converted from value to macros for GPIO voltage level
- Converted all numeric input key values to macros
- Made button names more explicit
- Document ethernet PHY (Marvell 88E1318) via a comment
Hi,
This series provides some cleanup for all NETGEAR ReadyNAS .dts files
(Duo v2, 102 and 104). This is mostly based on suggestions from
Sebastian during RN2120 .dts submission. Jason, two remarks:
- Patch 1/4 applies on top of previous gpio-poweroff patch for Duo v2
- Patch 3/4 applies on NXP
On Thu, Nov 28, 2013 at 5:37 PM, Arnd Bergmann wrote:
> On Thursday 28 November 2013, Jonas Jensen wrote:
>> +static void __iomem *moxart_gpio_base;
>
> Just one comment: the usual way to do such a driver is to have
> a derived data structure like
>
> struct moxart_gpio_chip {
> struct gpi
On Fri, Nov 29, 2013 at 9:14 PM, Laurent Pinchart
wrote:
> The r8a7791 (R-Car M2) has a GPIO controller with additional features
> compared to the generic renesas,gpio-rcar compatible devices. Add a
> model-specific string to let the driver enable these features.
>
> Signed-off-by: Laurent Pincha
On Fri, Nov 29, 2013 at 5:41 PM, Gerhard Sittig wrote:
> On Fri, Nov 29, 2013 at 09:59 +0800, Tien Hock Loh wrote:
>>
>> On Fri, Nov 29, 2013 at 4:24 AM, Gerhard Sittig wrote:
>> > On Wed, Nov 27, 2013 at 11:49 +0800, th...@altera.com wrote:
>> >>
>> >> --- /dev/null
>> >> +++ b/Documentation/dev
The r8a7791 (R-Car M2) has a GPIO controller with additional features
compared to the generic renesas,gpio-rcar compatible devices. Add a
model-specific string to let the driver enable these features.
Signed-off-by: Laurent Pinchart
---
Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.tx
Hello,
On Wed, Nov 27, 2013 at 02:06:05AM +0400, Valentine wrote:
> On 11/08/2013 04:09 PM, Valentine Barshak wrote:
>
> Tejun,
> are you OK with taking this?
Yeah, the stat part looks okay to me. How the two should be routed?
Both through libata or should I just take the first one?
Thanks.
-
On Fri, Nov 29, 2013 at 09:42:23AM -0800, Greg KH wrote:
> On Fri, Nov 29, 2013 at 10:37:14AM +0100, Thierry Reding wrote:
> > > > Some of this is a consequence of the push to have the firmware
> > > > minimal. As soon as you say the kernel has to configure the address
> > > > map you've created a
Hi Srinivas,
On Tue, Nov 12, 2013 at 01:53:03PM +, srinivas.kandaga...@st.com wrote:
> From: Srinivas Kandagatla
>
> STi series SOCs have a glue layer on top of the synopsis gmac IP, this
> glue layer needs to be configured before the gmac driver starts using
> the IP.
>
> This patch adds a
On Fri, Nov 29, 2013 at 1:19 PM, Lee Jones wrote:
Re this:
> +Optional properties:
> + - st,syscfg : Phandle to boot-device system configuration
> registers
> + - st,boot-device-reg : Address of the aforementioned boot-device
> register(s)
> + - st,boot-device-spi : Expected boot-d
On Friday 29 November 2013, Jonas Jensen wrote:
> Add GPIO driver for MOXA ART SoCs.
>
> Signed-off-by: Jonas Jensen
Acked-by: Arnd Bergmann
One more comment, no need to resend for another review if this is the only
thing you want to change:
> +struct moxart_gpio_chip {
> + struct gpio_ch
On 11/26/2013 10:51 AM, Alexander Aring wrote:
Hi,
On Tue, Nov 26, 2013 at 10:05:56AM +0200, Tero Kristo wrote:
From: J Keerthy
The patch adds support for DRA7 PCIe APLL. The APLL
sources the optional functional clocks for PCIe module.
APLL stands for Analog PLL. This is different when comap
On 11/29/2013 07:12 PM, Tony Lindgren wrote:
* Paul Walmsley [131128 10:59]:
On Wed, 27 Nov 2013, Nishanth Menon wrote:
http://pastebin.mozilla.org/3681900 -> AM3517-evm (not sure yet how
long this has been broken).
Seems to work in v3.13-rc1:
http://www.pwsan.com/omap/testlogs/test_v3.13-
On Fri, Nov 29, 2013 at 11:58:15AM +, Dave Martin wrote:
> > Hopefully the ARM guys concur, this was just my impression from
> > reviewing their patches and having recently done some design work with
> > AXI..
>
> Yes and no. We are trying to describe a real topology here, but only
> because
On Fri, Nov 29, 2013 at 06:11:23PM +, Greg KH wrote:
> On Fri, Nov 29, 2013 at 06:01:10PM +, Will Deacon wrote:
> > On Fri, Nov 29, 2013 at 05:37:01PM +, Greg KH wrote:
> > > On Fri, Nov 29, 2013 at 11:44:53AM +, Will Deacon wrote:
> > > > On Thu, Nov 28, 2013 at 09:25:28PM +, G
On Fri, Nov 29, 2013 at 06:01:10PM +, Will Deacon wrote:
> On Fri, Nov 29, 2013 at 05:37:01PM +, Greg KH wrote:
> > On Fri, Nov 29, 2013 at 11:44:53AM +, Will Deacon wrote:
> > > On Thu, Nov 28, 2013 at 09:25:28PM +, Greg KH wrote:
> > > > On Thu, Nov 28, 2013 at 07:39:17PM +, D
On Fri, Nov 29, 2013 at 05:37:01PM +, Greg KH wrote:
> On Fri, Nov 29, 2013 at 11:44:53AM +, Will Deacon wrote:
> > On Thu, Nov 28, 2013 at 09:25:28PM +, Greg KH wrote:
> > > On Thu, Nov 28, 2013 at 07:39:17PM +, Dave Martin wrote:
> > > > On Thu, Nov 28, 2013 at 11:13:31AM -0800, G
On Fri, Nov 29, 2013 at 01:13:59PM +, Dave Martin wrote:
> On Fri, Nov 29, 2013 at 09:57:03AM +, Russell King - ARM Linux wrote:
> > On Fri, Nov 29, 2013 at 10:37:14AM +0100, Thierry Reding wrote:
> > > There's a large gap between how fast new SoCs are supposed to tape out
> > > and the rat
On Fri, Nov 29, 2013 at 10:37:14AM +0100, Thierry Reding wrote:
> > > Some of this is a consequence of the push to have the firmware
> > > minimal. As soon as you say the kernel has to configure the address
> > > map you've created a big complexity for it..
> >
> > Why the push to make firmware "m
On Fri, Nov 29, 2013 at 11:44:53AM +, Will Deacon wrote:
> On Thu, Nov 28, 2013 at 09:25:28PM +, Greg KH wrote:
> > On Thu, Nov 28, 2013 at 07:39:17PM +, Dave Martin wrote:
> > > On Thu, Nov 28, 2013 at 11:13:31AM -0800, Greg KH wrote:
> > > > Yes it is, you all are the ones tasked with
Hi Shirish,
Please see my comments inline.
On Monday 25 of November 2013 14:24:39 Shirish S wrote:
> This patch adds dt support to hdmiphy config settings
> as it is board specific and depends on the signal pattern
> of board.
>
> Signed-off-by: Shirish S
> ---
> .../devicetree/bindings/video/
* Paul Walmsley [131128 10:59]:
> On Wed, 27 Nov 2013, Nishanth Menon wrote:
>
> > http://pastebin.mozilla.org/3681900 -> AM3517-evm (not sure yet how
> > long this has been broken).
>
> Seems to work in v3.13-rc1:
>
> http://www.pwsan.com/omap/testlogs/test_v3.13-rc1/20131124230250/boot/3517ev
On Fri, Nov 29, 2013 at 09:59 +0800, Tien Hock Loh wrote:
>
> On Fri, Nov 29, 2013 at 4:24 AM, Gerhard Sittig wrote:
> > On Wed, Nov 27, 2013 at 11:49 +0800, th...@altera.com wrote:
> >>
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/gpio/gpio-altera.txt
> >> @@ -0,0 +1,35 @@
> >
Ivan,
On Thursday 21 November 2013 06:28 AM, Ivan Khoronzhuk wrote:
> This series contains fixes and updates of Davinci nand driver in
> order to reuse it for Keystone platform.
>
> The series is combination of two following series:
> - Davinci nand driver fixes and updates:
> https://lkml.org/l
On Mon, Nov 25, 2013 at 03:39:20PM -0700, Stephen Warren wrote:
[...]
> diff --git a/arch/arm/boot/dts/tegra124-venice2.dts
> b/arch/arm/boot/dts/tegra124-venice2.dts
> index a0b028384658..bc502112eb04 100644
> --- a/arch/arm/boot/dts/tegra124-venice2.dts
> +++ b/arch/arm/boot/dts/tegra124-venice2
On Mon, Nov 25, 2013 at 03:39:19PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> Signed-off-by: Stephen Warren
> ---
> arch/arm/boot/dts/tegra124.dtsi | 6 ++
> 1 file changed, 6 insertions(+)
Reviewed-by: Thierry Reding
And since I've been running my Venice2 with that patch fo
On Mon, Nov 25, 2013 at 03:39:18PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> Instantiate the APB DMA controller in the Tegra124 DT, and add all
> DMA-related properties to other DT nodes that rely on (reference) the
> DMA controller's node.
>
> Signed-off-by: Stephen Warren
> ---
On Mon, Nov 25, 2013 at 03:39:17PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> Signed-off-by: Stephen Warren
> ---
> arch/arm/boot/dts/tegra124.dtsi | 11 +++
> 1 file changed, 11 insertions(+)
A proper commit message would be nice, but it probably wouldn't be much
more tha
On Wed, 2013-11-27 at 14:36 +, Grant Likely wrote:
> On Fri, 22 Nov 2013 11:22:23 +, Mark Rutland wrote:
> > On Wed, Nov 20, 2013 at 11:56:39AM +, Grant Likely wrote:
> > > On Wed, Nov 20, 2013 at 11:55 AM, Grant Likely
> > > wrote:
> > > > To help keep track of what is going on, I wo
On 11/29/2013 05:37 PM, Santosh Shilimkar wrote:
> Ivan,
>
> On Wednesday 20 November 2013 10:22 AM, Ivan Khoronzhuk wrote:
>> This series contains fixes and updates of Davinci nand driver, in
>> order to prepare it to be reused for Keystone platform.
>>
>> V1:
>> https://lkml.org/lkml/2013/11/11/
On Friday 29 November 2013 10:35 AM, Grygorii Strashko wrote:
> On 11/29/2013 05:32 PM, Santosh Shilimkar wrote:
>> On Wednesday 20 November 2013 10:46 AM, Ivan Khoronzhuk wrote:
>>> Add new AEMIF driver for EMIF16 Texas Instruments controller.
>>> The EMIF16 module is intended to provide a glue-le
On 11/29/2013 05:32 PM, Santosh Shilimkar wrote:
On Wednesday 20 November 2013 10:46 AM, Ivan Khoronzhuk wrote:
Add new AEMIF driver for EMIF16 Texas Instruments controller.
The EMIF16 module is intended to provide a glue-less interface to
a variety of asynchronous memory devices like ASRA M, NO
Ivan,
On Wednesday 20 November 2013 10:22 AM, Ivan Khoronzhuk wrote:
> This series contains fixes and updates of Davinci nand driver, in
> order to prepare it to be reused for Keystone platform.
>
> V1:
> https://lkml.org/lkml/2013/11/11/352
>
> Ivan Khoronzhuk (7):
> mtd: nand: davinci: fix d
On Wednesday 20 November 2013 10:46 AM, Ivan Khoronzhuk wrote:
> Add new AEMIF driver for EMIF16 Texas Instruments controller.
> The EMIF16 module is intended to provide a glue-less interface to
> a variety of asynchronous memory devices like ASRA M, NOR and NAND
> memory. A total of 256M bytes of
On 29/11/2013 14:31, Linus Walleij wrote:
On Fri, Nov 29, 2013 at 11:30 AM, boris brezillon
wrote:
On 29/11/2013 11:03, Linus Walleij wrote:
I guess one way is to obtain this GPIO in board code and just
flick it depending on which device you register.
(...)
The whole goal of moving from boar
On Friday 29 November 2013 10:00 AM, Grygorii Strashko wrote:
> Hi Kumar Gala,
>
> On 11/22/2013 11:06 PM, Kumar Gala wrote:
>>
>> On Nov 20, 2013, at 1:03 PM, ivan.khoronzhuk wrote:
>>
>>> On 11/20/2013 08:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> + the chip se
On Friday 29 November 2013 09:56 AM, Grygorii Strashko wrote:
> Hi Jean-Christophe,
>
> On 11/22/2013 08:42 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>> On 21:03 Wed 20 Nov , ivan.khoronzhuk wrote:
>>> On 11/20/2013 08:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> +
Hi Kumar Gala,
On 11/22/2013 11:06 PM, Kumar Gala wrote:
>
> On Nov 20, 2013, at 1:03 PM, ivan.khoronzhuk wrote:
>
>> On 11/20/2013 08:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
+ the chip select signal.
+ Minimum value is 1 (0 tre
Hi Jean-Christophe,
On 11/22/2013 08:42 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 21:03 Wed 20 Nov , ivan.khoronzhuk wrote:
>> On 11/20/2013 08:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
+ the chip select signal.
+ Minimum
On Friday 29 November 2013 08:18 AM, Grygorii Strashko wrote:
> Hi Sekhar,
>
> On 11/27/2013 02:48 PM, Ivan Khoronzhuk wrote:
>> These patches are intended to update Davinci watchdog to use WDT core
>> and reuse driver for keystone arch, because Keystone uses the similar
>> IP like Davinci.
>>
>>
On Thursday 28 November 2013 11:38 PM, Sekhar Nori wrote:
> On Wednesday 27 November 2013 08:01 PM, Ivan Khoronzhuk wrote:
>> The problem that the set timings code contains the call of Davinci
>> platform function davinci_aemif_setup_timing() which is not
>> accessible if kernel is built for anothe
On Fri, Nov 15, 2013 at 01:54:24PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> Now that all Tegra drivers have been converted to use DMA APIs which
> retrieve DMA channel information from standard DMA DT properties, we can
> remove all the legacy DT DMA-related properties.
>
> Cc: tr
On Fri, Nov 15, 2013 at 01:54:23PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> Now that all Tegra drivers have been converted to use the common reset
> framework, we can remove all the legacy DT clocks/clock-names entries for
> "clocks" that were only used with the old custom Tegra mo
On Fri, Nov 29, 2013 at 09:57:12AM +, Thierry Reding wrote:
> On Thu, Nov 28, 2013 at 04:31:47PM -0700, Jason Gunthorpe wrote:
[...]
> > The AXI DAG side-table would be used to resolve weirdness with 'bus
> > master' DMA programming. The OS can detect all the required
> > configuration and pr
Here's my proposal, based in Pekon's latest work.
This patch removes the flash device bus-width configuration, prior to
the device detection. With this modification, a NAND driver is no longer
able to "force" the device width, and instead can only obtain the detected
bus-width after the call to na
From: Pekon Gupta
This patch is alternative implementation for following commit which introduced
NAND_BUSWIDTH_AUTO for detection of bus-width during device probe
commit 64b37b2a63eb2f80b65c7185f0013f8ffc637ae3
Author: Matthieu CASTET
AuthorDate: 2012-11-06
As NAND device is identi
On Fri, Nov 29, 2013 at 11:30 AM, boris brezillon
wrote:
> On 29/11/2013 11:03, Linus Walleij wrote:
>> I guess one way is to obtain this GPIO in board code and just
>> flick it depending on which device you register.
(...)
> The whole goal of moving from board files to dt is to drop all board
>
On Fri, Nov 29, 2013 at 01:13:59PM +, Dave Martin wrote:
> On Fri, Nov 29, 2013 at 09:57:03AM +, Russell King - ARM Linux wrote:
> > On Fri, Nov 29, 2013 at 10:37:14AM +0100, Thierry Reding wrote:
> > > There's a large gap between how fast new SoCs are supposed to tape out
> > > and the rat
Hi Sekhar,
On 11/27/2013 02:48 PM, Ivan Khoronzhuk wrote:
> These patches are intended to update Davinci watchdog to use WDT core
> and reuse driver for keystone arch, because Keystone uses the similar
> IP like Davinci.
>
> See Documentation:
> Davinci DM646x - http://www.ti.com/lit/ug/spruer5b/
On Fri, Nov 29, 2013 at 09:57:03AM +, Russell King - ARM Linux wrote:
> On Fri, Nov 29, 2013 at 10:37:14AM +0100, Thierry Reding wrote:
> > There's a large gap between how fast new SoCs are supposed to tape out
> > and the rate at which new code can be merged upstream. Perhaps some of
> > that
On Fri, Nov 15, 2013 at 01:54:00PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> This patch switches the Tegra DT files to use the standard DMA DT bindings
> rather than custom properties. Note that the legacy properties are not yet
> removed; the drivers must be updated to use the new
On Fri, Nov 15, 2013 at 01:53:59PM -0700, Stephen Warren wrote:
[...]
> @@ -135,8 +140,10 @@
> reg-shift = <2>;
> interrupts = ;
> nvidia,dma-request-selector = <&apbdma 9>;
> - status = "disabled";
> clocks = <&tegra_car TEGRA114_
On Thu, Nov 28, 2013 at 05:11:34PM -0800, Kuninori Morimoto wrote:
> I would like to know current status of this patch
Still hoping for DT review :/
signature.asc
Description: Digital signature
On Fri, Nov 15, 2013 at 01:53:58PM -0700, Stephen Warren wrote:
[...]
> diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
> b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
> index 2b6817f6e40e..eaf00102d92c 100644
> --- a/Documentation/devicetree/bindin
Cc: devicetree@vger.kernel.org
Signed-off-by: Lee Jones
---
Documentation/devicetree/bindings/mtd/st-fsm.txt | 26
1 file changed, 26 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/st-fsm.txt
diff --git a/Documentation/devicetree/bindings/mtd/st-
Hi Brian,
On Tue, Nov 26, 2013 at 05:23:38PM -0800, Brian Norris wrote:
[..]
> >
> > If we do resort to a new binding for auto-buswidth, it should be a
> > generic one that all NAND drivers can use.
Why do we need yet another binding to describe something that's
completely discoverable?
I'm wor
On Fri, Nov 15, 2013 at 01:53:57PM -0700, Stephen Warren wrote:
[...]
> diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
> b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
[...]
> + - resets : Must contain an entry for each entry in reset-names.
> +
On Thu, Nov 28, 2013 at 04:31:47PM -0700, Jason Gunthorpe wrote:
> On Thu, Nov 28, 2013 at 11:22:33PM +0100, Thierry Reding wrote:
> > On Thu, Nov 28, 2013 at 02:10:09PM -0700, Jason Gunthorpe wrote:
> > > On Thu, Nov 28, 2013 at 09:33:23PM +0100, Thierry Reding wrote:
> > >
> > > > > - Describi
On Fri, Nov 15, 2013 at 01:53:56PM -0700, Stephen Warren wrote:
[...]
> @@ -60,6 +81,12 @@ of the following host1x client modules:
>- compatible: "nvidia,tegra-dc"
>- reg: Physical base address and length of the controller's registers.
>- interrupts: The interrupt outputs from the contr
Hiroshi Doyu wrote @ Thu, 28 Nov 2013 14:58:18 +0200 (EET):
> > In other words, an implementation more along the lines of
> > include/linux/of.h's:
> >
> > #define of_property_for_each_u32(np, propname, prop, p, u) \
> > for (prop = of_find_property(np, propname, NULL), \
On Thu, Nov 28, 2013 at 09:25:28PM +, Greg KH wrote:
> On Thu, Nov 28, 2013 at 07:39:17PM +, Dave Martin wrote:
> > On Thu, Nov 28, 2013 at 11:13:31AM -0800, Greg KH wrote:
> > > Yes it is, you all are the ones tasked with implementing the crazy crap
> > > the hardware people have created,
On Mon, Nov 25, 2013 at 03:37:55PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> This binding shouldn't exist; Tegra20 has two forms of SPI controller
> that are documented separately in nvidia,tegra20-sflash.txt and
> nvidia,tegra20-slink.txt.
>
> Signed-off-by: Stephen Warren
> ---
ntainer_of()
4. add container_of() helper function
Applies to next-20131129
.../devicetree/bindings/gpio/moxa,moxart-gpio.txt | 19 +++
drivers/gpio/Kconfig | 7 +
drivers/gpio/Makefile | 1 +
drivers/gpio/gpi
On Thu, Nov 28, 2013 at 01:54:10PM +0100, Marc Dietrich wrote:
[...]
> Yes, rfkill is just an interface for userspace to able to control the gpio.
> E.g. backlight of medcom-wide seems to be related to the pwm controller, but
> is not a subnode of it. Instead it is a device of its own without par
On Fri, Nov 29, 2013 at 09:57:03AM +, Russell King - ARM Linux wrote:
> On Fri, Nov 29, 2013 at 10:37:14AM +0100, Thierry Reding wrote:
> > There's a large gap between how fast new SoCs are supposed to tape out
> > and the rate at which new code can be merged upstream. Perhaps some of
> > that
Hello Linus,
On 29/11/2013 11:03, Linus Walleij wrote:
På tisdag, 26 Nov, 2013 vid 6:11 PM, skrev boris brezillon
:
Le 26/11/2013 14:46, Linus Walleij a écrit :
But in this case it is a mechanical switch rather than a jumper?
Not exactly.
The functionnaly selection (spi device or mmc slot) i
På tisdag, 26 Nov, 2013 vid 6:11 PM, skrev boris brezillon
:
> Le 26/11/2013 14:46, Linus Walleij a écrit :
>> But in this case it is a mechanical switch rather than a jumper?
>
> Not exactly.
>
> The functionnaly selection (spi device or mmc slot) is done by the software
> using to the
> PB22 pin
On Thu, Nov 28, 2013 at 04:31:47PM -0700, Jason Gunthorpe wrote:
> On Thu, Nov 28, 2013 at 11:22:33PM +0100, Thierry Reding wrote:
> > On Thu, Nov 28, 2013 at 02:10:09PM -0700, Jason Gunthorpe wrote:
> > > On Thu, Nov 28, 2013 at 09:33:23PM +0100, Thierry Reding wrote:
> > >
> > > > > - Describi
On Fri, Nov 29, 2013 at 10:37:14AM +0100, Thierry Reding wrote:
> There's a large gap between how fast new SoCs are supposed to tape out
> and the rate at which new code can be merged upstream. Perhaps some of
> that could be mitigated by putting more of the complexity into firmware
> and that's al
On 11/29/2013 06:38 AM, Sekhar Nori wrote:
> On Wednesday 27 November 2013 08:01 PM, Ivan Khoronzhuk wrote:
>> The problem that the set timings code contains the call of Davinci
>> platform function davinci_aemif_setup_timing() which is not
>> accessible if kernel is built for another platform like
On Thu, Nov 28, 2013 at 06:35:54PM -0800, Greg KH wrote:
> On Thu, Nov 28, 2013 at 04:31:47PM -0700, Jason Gunthorpe wrote:
> > > Perhaps this is just another way of saying what Greg has already said.
> > > If we continue down this road, we'll eventually end up having to
> > > describe all sorts of
Hi Brian,
Thanks for your replay and all the hints about submitting the correct
way. Is it ok to paste the full git format-patch output like this?
>From a2e84efe0d5335547ca3e6c0a8bf8a026b0f2353 Mon Sep 17 00:00:00 2001
From: Philipp Rosenberger
Date: Thu, 28 Nov 2013 12:36:52 +0100
Subject: [PAT
On Fri, Nov 29, 2013 at 06:42:06AM +, Li Xiubo wrote:
> > > +#define FTM_CNTIN_VAL 0x00
> >
> > Do we really need this?
> >
>
> Maybe not, I think that the initial value maybe modified in the future.
> And this can be more easy to ajust it.
Why would it need to be modified?
> > > +
On Thu, Nov 21, 2013 at 7:15 PM, Prabhakar Lad
wrote:
> From: "Lad, Prabhakar"
>
> Signed-off-by: Lad, Prabhakar
> [grygorii.stras...@ti.com:
> - switch to use one irq-domain per all GPIO banks
> - keep irq_create_mapping() call in gpio_to_irq_banked() as it
>simply transformed to irq_fi
> Hi Alexander,
>
> We're dealing with a similar issue in other drivers currently, and I
> think it's worth straightening out the issue for all systems.
>
> On Wed, Nov 13, 2013 at 03:58:02PM +0400, Alexander Shiyan wrote:
> > This patch adds a property to automatically determine the NAND
> > bus
Hi Linus,
On Fri, Nov 29, 2013 at 1:17 PM, Linus Walleij wrote:
> On Thu, Nov 21, 2013 at 7:15 PM, Prabhakar Lad
> wrote:
>
>> From: "Lad, Prabhakar"
>>
>> This patch series does the following
>> 1> Ports the driver to use irqdomain.
>> 2> Adds dt binding support for gpio-davinci.
>> 3> Adds DA
Wim,
On Thursday 28 November 2013 06:29 PM, Guenter Roeck wrote:
> On 11/27/2013 10:04 PM, Sekhar Nori wrote:
>> On Wednesday 27 November 2013 09:27 PM, Guenter Roeck wrote:
>>> On 11/27/2013 06:00 AM, Sekhar Nori wrote:
On Wednesday 27 November 2013 07:01 PM, Ivan Khoronzhuk wrote:
> As
+ device tree guys
Hi Grant/Rob,
It looks like this header is technically owned by you guys. Once we have
a proper submission, should I merge this sort of change through MTD, or
do one of you want to take care of it?
Hi Philpp,
Thanks for the patch! There are a few things to fix up though.
On
On Friday 29 November 2013 01:16 PM, Linus Walleij wrote:
> On Tue, Nov 26, 2013 at 6:12 PM, Sekhar Nori wrote:
>> On Tuesday 26 November 2013 06:03 PM, Grygorii Strashko wrote:
>
>>> Actually, the same was proposed by Linus, but we've tried avoid such huge
>>> rework -
>>> by switching to one i
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