There is a risk that the variable will be used without being initialized.
This was largely found by using a static code analysis program called cppcheck.
Signed-off-by: Rickard Strandqvist
---
drivers/atm/fore200e.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/
> On May 23, 2014, at 3:40 PM, "Mark Brown" wrote:
>
>> On Fri, May 23, 2014 at 02:16:54PM -0500, Paul Handrigan wrote:
>> This patch adds support for the Cirrus Logic Stereo I2C CODEC
>
> This all looks pretty clean and nice, I have got a few comments below
> but they're all pretty small thin
This driver add partial support of the
maxim 1027/1029/1031. Differential mode is not
supported.
It was tested on armadeus apf27 board.
Signed-off-by: Philippe Reynes
---
.../devicetree/bindings/iio/adc/max1027-adc.txt| 22 +
drivers/iio/adc/Kconfig|9 +
dr
Hi Jonathan,
On 30/05/14 18:29, Jonathan Cameron wrote:
On May 29, 2014 10:22:00 PM GMT+01:00, Philippe Reynes wrote:
This driver add partial support of the
maxim 1027/1029/1031. Differential mode is not
supported.
It was tested on armadeus apf27 board.
Signed-off-by: Philippe Reynes
On
On Sat, May 31, 2014 at 12:03 PM, Hans de Goede wrote:
> The following existing MMC host controller bindings use slot subnodes:
>
> Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
> Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
> Documentation/devicetree/bindings/mmc/exynos-dw-ms
Hi All,
Here is v2 of my submission of Sascha Hauer's
"mmc: Add SDIO function devicetree subnode parsing" patch.
This version has been reworked as a result of the discussion about sdio
powerup sequencing. Specifically the location of the per sdio-function subnodes
has been moved from being a subn
From: Sascha Hauer
This adds SDIO devicetree subnode parsing to the mmc core. While
SDIO devices are runtime probable they sometimes need nonprobable
additional information on embedded systems, like an additional gpio
interrupt or a clock. This patch makes it possible to supply this
information f
Some host controllers have multiple slots. The mmc-core sofar does not
really have any knowledge of this, the host drivers for these controllers
simple call mmc_add_host() multiple times.
These mmc_host-s will share their parent device and on devicetree systems
also their parent->of_node.
This co
The following existing MMC host controller bindings use slot subnodes:
Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt
From: Sascha Hauer
While SDIO devices are runtime probable they sometimes need nonprobable
additional information on embedded systems, like an additional gpio
interrupt or a clock. This binding describes how to add child nodes to the
devicetree to supply this information.
Signed-off-by: Sascha H
On Saturday 31 May 2014 01:36:40 Liviu Dudau wrote:
> We would like to be able to describe PCIe ECAM resources as
> IORESOURCE_MEM blocks while distinguish them from standard
> memory resources. Add an IORESOURCE_BIT entry for this case.
>
> Signed-off-by: Liviu Dudau
I still don't see any value
This patch adds a driver for the Renesas usdhi6rol0 SD/SDIO host controller
in both PIO and DMA modes.
Signed-off-by: Guennadi Liakhovetski
---
v4: replaced several numerical values with macros
.../devicetree/bindings/mmc/usdhi6rol0.txt | 33 +
drivers/mmc/host/Kconfig
This patchset adds support for the global clock controller found on the
APQ8084 based platforms.
Patches 1,2 can go through clk-next and 3,4 through arm-soc.
Changes from v1:
- Moved APQ8084 clocks into a separate file and under separate Kconfig
entry. Dropped the override function patch from
This patch adds the necessary node to probe the global clock
controller on APQ8084 platforms.
Signed-off-by: Georgi Djakov
---
arch/arm/boot/dts/qcom-apq8084.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi
b/arch/arm/boot/dts/qcom-apq80
Add the necessary DT node to probe the serial driver on
APQ8084 platforms.
Signed-off-by: Georgi Djakov
---
arch/arm/boot/dts/qcom-apq8084-mtp.dts |6 ++
arch/arm/boot/dts/qcom-apq8084.dtsi|8
2 files changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8084
Add the compatible string for the APQ8084 global clock controller
to the clock binding documentation.
Signed-off-by: Georgi Djakov
---
.../devicetree/bindings/clock/qcom,gcc.txt |1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.txt
b
Hi,
On 05/28/2014 12:33 PM, Maxime Ripard wrote:
On Wed, May 28, 2014 at 11:51:52AM +0200, Hans de Goede wrote:
Hi,
On 05/28/2014 11:36 AM, Maxime Ripard wrote:
On Tue, May 27, 2014 at 04:18:29PM +0200, Linus Walleij wrote:
On Mon, May 26, 2014 at 9:47 AM, Hans de Goede wrote:
With level
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