Thierry Reding writes:
> +Multiple-master IOMMU:
> +--
> +
> + iommu {
> + /* the specifier represents the ID of the master */
> + #iommu-cells = <1>;
> + };
> +
> + master@1 {
> + /* device has master ID 42 in the I
Signed-off-by: Addy Ke
---
arch/arm/boot/dts/rk3288.dtsi | 76 +++
1 file changed, 76 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 7a9173d..a440869 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/
On Wed, Aug 13, 2014 at 12:10:19AM +0400, sergei.shtyl...@cogentembedded.com
wrote:
> Hello.
>
>Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
> 'renesas-devel-v3.16-20140811' tag. Here Ben Dooks adds the VIN and ADV7180
> video decoder device tree support on the R8A77
Hi Jacek,
On Thu, Aug 07, 2014 at 10:21:14AM +0200, Jacek Anaszewski wrote:
> On 08/06/2014 08:53 AM, Sakari Ailus wrote:
> >Hi Jacek,
> >
> >On Fri, Jul 11, 2014 at 04:04:03PM +0200, Jacek Anaszewski wrote:
> >...
> >>1) Who should register V4L2 Flash sub-device?
> >>
> >>LED Flash Class devices,
Bryan and Richard,
Your opinion would be much appreciated to a question myself and Jacek were
pondering. Please see below.
On Thu, Aug 07, 2014 at 03:12:09PM +0200, Jacek Anaszewski wrote:
> Hi Sakari,
>
> On 08/04/2014 02:50 PM, Sakari Ailus wrote:
> >Hi Jacek,
> >
> >Thank you for your continu
Hi Jacek,
On Mon, Aug 11, 2014 at 03:27:22PM +0200, Jacek Anaszewski wrote:
...
> diff --git a/include/media/v4l2-flash.h b/include/media/v4l2-flash.h
> new file mode 100644
> index 000..effa46b
> --- /dev/null
> +++ b/include/media/v4l2-flash.h
> @@ -0,0 +1,137 @@
>
> Addy,
>
> On Wed, Aug 13, 2014 at 6:57 PM, Addy wrote:
>
>> I think maybe it is suitable as follows:
>> mmc0 = &sdmmc
>> mmc1 = &sdio0
>> mmc2 = &sdio1
>> mmc3 = &emmc
>
> Right, except the only ones that have landed in Heiko's tree are sdmmc
> and emmc, so we can't do sdio0 and sdio1 yet. Y
On Wed, Aug 13, 2014 at 8:13 PM, Tim Harvey wrote:
> On Sun, Aug 10, 2014 at 1:16 PM, Florian Fainelli
> wrote:
>> Le 10/08/2014 01:15, Tim Harvey a écrit :
>>
>>> Add Gateworks Corporation to the list of device tree vendor prefixes.
>>>
>>> Gateworks designs and manufactures single board comput
Addy,
On Wed, Aug 13, 2014 at 6:57 PM, Addy wrote:
> I think maybe it is suitable as follows:
> mmc0 = &sdmmc
> mmc1 = &sdio0
> mmc2 = &sdio1
> mmc3 = &emmc
Right, except the only ones that have landed in Heiko's tree are sdmmc
and emmc, so we can't do sdio0 and sdio1 yet. You could post suppo
On Thursday, August 14, 2014 12:01 AM, Suravee Suthikulpanit wrote:
>
> From: Suravee Suthikulpanit
>
> ARM GICv2m specification extends GICv2 to support MSI(-X) with
> a new set of register frame. This patch introduces support for
> the non-secure GICv2m register frame. Currently, GICV2m is ava
> It's convenient (and less confusing to people reading logs) if the
> eMMC port on rk3288 is consistenly marked with mmc0 and the sdmmc port
> on rk3288 is consistently marked with mmc1. Add the appropriate
> aliases.
>
> These aliases only actually do something if a patch like
> (https://patchw
On Sun, Aug 10, 2014 at 1:16 PM, Florian Fainelli wrote:
> Le 10/08/2014 01:15, Tim Harvey a écrit :
>
>> Add Gateworks Corporation to the list of device tree vendor prefixes.
>>
>> Gateworks designs and manufactures single board computers designed for
>> embedded wireless and wired network applic
Wed, 13 Aug 2014 19:16:22 +0300 от Grygorii Strashko :
> Add Keystone 2 DSP GPIO nodes.
> DSP GPIO banks 0-7 correspond to DSP0-DSP7
>
> Signed-off-by: Grygorii Strashko
> ---
> arch/arm/boot/dts/k2hk.dtsi | 56
> +++
> 1 file changed, 56 insertions(+)
To do so, spi communication can use an empty buf to pull up CS.
This patch merged from ChromiumOS tree.
Cros_ec use this function to turn off CS and add a delay to ensure
the rising edge doesn't come too soon after the end of the data.
Tested-by: Doug Anderson
Signed-off-by: Doug Anderson
Signe
The regulation_constraints structure includes specific field to support
suspend state for global PMIC STANDBY/HIBERNATE mode. This patch add support
for parsing regulator_state for suspend state.
Signed-off-by: Chanwoo Choi
Acked-by: Kyungmin Park
---
drivers/regulator/of_regulator.c | 79 +
Hi, Charles.
Thanks for your review.
On Wed, 13 Aug 2014 13:18:14 +0100
Charles Keepax wrote:
> On Wed, Aug 13, 2014 at 08:54:56PM +0900, Inha Song wrote:
> > This patch update DT binding to support INn_MODE init_data. Each
> > input signal path can be configurated either as a Analogue or
> > Di
This patch add regulator suspend state to constraint in dt file. The regulation_
constraints structure already has regulator suspend state field as following.
The regulator suspend state control the state of regulator according to
PM (Power Management) state.
- struct regulator_state state_disk
- s
The regulators would set different state/mode according to the kind of suspend
state. So regulation_constraints structure has already regulator suspend state
filed.
This patch parse regulator suspend state from devicetree file.
For example:
ldoX_reg: LDOx {
regulator-name
It's convenient (and less confusing to people reading logs) if the
eMMC port on rk3288 is consistenly marked with mmc0 and the sdmmc port
on rk3288 is consistently marked with mmc1. Add the appropriate
aliases.
These aliases only actually do something if a patch like
(https://patchwork.kernel.org
Hi Russell,
Picking up this thread again, as things are now set for dropping this
patch and resubmitting SMP support for 3.18.
On Sat, Aug 02, 2014 at 10:27:56AM +0100, Russell King wrote:
> On Thu, Jul 31, 2014 at 03:06:42PM -0700, Brian Norris wrote:
> > Yes, I noticed this. What I meant is tha
Hi all,
This patch series adds support for specifying the L2 cache size through Device
Tree using the ePAPR standard 'cache-size' and 'cache-sets' properties.
The rationale behind these patches is to support Broadcom's BCM63138 DSL SoC
which comes out of reset with an invalid cache way-size speci
Re-order the Level 2 cache controller binding optional properties into
alphabetical order.
Signed-off-by: Florian Fainelli
---
Documentation/devicetree/bindings/arm/l2cc.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt
b/Docu
Make sure that we can read the "cache-level" property from the L2 cache
controller node, and ensure its value is 2.
Signed-off-by: Florian Fainelli
---
arch/arm/mm/cache-l2x0.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 5f
When both 'cache-size' and 'cache-sets' are specified for a L2 cache
controller node, parse those properties and make sure we validate the
way_size based on which type of L2 cache controller we are using.
Update the L2 cache controller Device Tree binding with the optional
'cache-size' and 'cache-
On Wed, Aug 13, 2014 at 12:32 PM, Feng Kan wrote:
> This patch series adds PMU node for APM X-Gene's Potenza CPU.
> Potenza CPU PMU is compatible with ARMv8-PMUv3.
>
> I am resending this patch since the original author has left the company and
> I am taking over for the work. There is no change t
On Wed, Aug 13, 2014 at 3:11 PM, Brian Norris
wrote:
> Ping (Olof or Matt?)
>
> On Mon, Aug 4, 2014 at 9:56 AM, Brian Norris
> wrote:
>> On Sat, Aug 02, 2014 at 09:30:40AM +0100, Russell King wrote:
>>> On Mon, Jul 21, 2014 at 02:07:58PM -0700, Brian Norris wrote:
>>> > From: Marc Carino
>>> >
>
Am Dienstag, 12. August 2014, 16:21:12 schrieb Doug Anderson:
> This series adds basic eMMC and SD card support for the rk3288-evb
> board based on Addy's dw_mmc patch.
I've added both patches to the general dts branch for 3.18.
Currently as WIP and temporarily on github [0] until we reach -rc1.
Ping (Olof or Matt?)
On Mon, Aug 4, 2014 at 9:56 AM, Brian Norris
wrote:
> On Sat, Aug 02, 2014 at 09:30:40AM +0100, Russell King wrote:
>> On Mon, Jul 21, 2014 at 02:07:58PM -0700, Brian Norris wrote:
>> > From: Marc Carino
>> >
>> > Add the UART definitions needed to support earlyprintk on brc
On Tue, Aug 12 2014 at 05:51:35 PM, Mitchel Humpherys
wrote:
> On some power-constrained platforms it's useful to disable power when a
> device is not in use. Add support for specifying regulators for SMMUs
> and only leave power on as long as the SMMU is in use (attached).
>
> Signed-off-by: Mit
Well hopefully this isn't too Nick Krouse-esque, but I have some
comments on my own patch below. I sat on these for a few days but have
noticed a few things after testing on another platform...
On Tue, Aug 12 2014 at 05:51:34 PM, Mitchel Humpherys
wrote:
> On some platforms with tight power cons
On Fri, Jul 25, 2014 at 02:42:31PM -0700, Mike Turquette wrote:
> Quoting Sylwester Nawrocki (2014-07-03 10:25:53)
> > I would appreciate a DT, SPI or the I2C maintainer opinions.
> Yes, Acks from SPI and I2C maintainers would be good. I might need to
> drop those parts of this patch if they don'
Hi Lorenzo,
On Wed, Aug 13, 2014 at 04:52:01PM +0100, Lorenzo Pieralisi wrote:
+===
+4 - Examples
+===
+
+Example 1 (ARM 64-bit, 16-cpu system, PSCI enable-method):
+
+cpus {
+ #size-cells = <0>;
+ #addre
On Fri, Aug 08, 2014 at 06:10:22PM +0900, Gyungoh Yoo wrote:
> Signed-off-by: Gyungoh Yoo
Applied, thanks. Please use subject lines matching the style for the
subsystem you are submitting against.
signature.asc
Description: Digital signature
On Wed, Aug 13, 2014 at 07:33:37PM +0800, Guodong Xu wrote:
> This patchset adds an MFD core driver and a regulator driver for Hi6421 PMIC
> SoC.
The regulator patches here all look good but I'll apply them on multiple
topic branches so I'll wait until after -rc1 is out so I don't need to
rebase.
This patch series adds PMU node for APM X-Gene's Potenza CPU.
Potenza CPU PMU is compatible with ARMv8-PMUv3.
I am resending this patch since the original author has left the company and
I am taking over for the work. There is no change to the original patch.
Just a comment on the dependency on t
From: Vinayak Kale
This patch documents the compatible string for APM X-Gene Potenza CPU's PMU.
Signed-off-by: Vinayak Kale
Signed-off-by: Feng Kan
---
Documentation/devicetree/bindings/arm/pmu.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/pmu.t
From: Vinayak Kale
This patch adds the PMU device tree node for APM X-Gene Storm SOC.
Please note that this patch has dependancy on a GIC driver patch [1] which is
yet to be approved by maintainers.
[1]- https://lkml.org/lkml/2014/2/27/605
(irqchip:gic: change access of gicc_ctrl register to re
On Tue, Aug 12 2014 at 05:51:33 PM, Mitchel Humpherys
wrote:
> This series is based on on Will's iommu/pci branch.
Incredibly, I also neglected to base this on top of Olav's recent patch
("iommu/arm-smmu: Do not access non-existing SMR registers")! I will do
that in v2 after review feedback.
-
Hello Stephen,
On 08/13/2014 06:16 PM, Stephen Warren wrote:
>
> I'm worried that this file represents the limits of the PMIC itself,
> whereas the DT should be representing the limits of the circuits that
> the various PMIC regulators are attached to on the board.
>
> For example:
>
>> diff
Hello Mark,
On 08/13/2014 05:51 PM, Mark Brown wrote:
> On Wed, Aug 13, 2014 at 03:34:12PM +0200, Javier Martinez Canillas wrote:
>
>> Indeed. I'll change mmc_regulator_get_ocrmask() in MMC core then to use
>> regulator_can_change_voltage() to detect if the regulator is a fixed one
>> and call re
On Tue, Aug 12 2014 at 05:51:37 PM, Mitchel Humpherys
wrote:
> Generic IOMMU device tree bindings were recently added in
> ["devicetree: Add generic IOMMU device tree bindings"]. Implement the
> bindings in the ARM SMMU driver.
>
> See Documentation/devicetree/bindings/iommu/iommu.txt for the bin
On Wed, 13 Aug 2014, Lorenzo Pieralisi wrote:
> On most common ARM systems, the low-power states a CPU can be put into are
> not discoverable in HW and require device tree bindings to describe
> power down suspend operations and idle states parameters.
>
> In order to enable DT based idle states
On Wed, Aug 13, 2014 at 01:14:35PM +0100, Ian Molton wrote:
> On Mon, 11 Aug 2014 13:19:02 +0100
> Mark Rutland wrote:
>
> > > - - pclk-sample: Pixel clock polarity. Defaults to output on the falling
> > > edge.
> > > + - pclk-sample: Pixel clock polarity. Defaults to output on the
> > > fal
On 08/12/2014 10:44 AM, Javier Martinez Canillas wrote:
The tps65090 PMU data manual [0] has a table that list the
"Recommended operating conditions" for each regulator. Add
the information about the FET constraints to its dtsi file.
[0]: http://www.ti.com/lit/ds/symlink/tps65090.pdf
I'm worri
On 08/12/2014 10:44 AM, Javier Martinez Canillas wrote:
The tps65090 is a Power Management Unit (PMU) used in several
boards so the same information is described on different DTS.
It is better to create a .dtsi fragment that can be included.
To be honest, I'm not sure that this file is useful.
Hello,
On Wed, Aug 13, 2014 at 05:44:16PM +0200, Uwe Kleine-König wrote:
> diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c
> index f51b5ba3bbea..37ed493d8030 100644
> --- a/drivers/mmc/core/mmc_ops.c
> +++ b/drivers/mmc/core/mmc_ops.c
> @@ -93,6 +93,27 @@ int mmc_deselect_card
This patch implements a generic CPU idle driver for ARM64 machines.
It relies on the DT idle states infrastructure to initialize idle
states count and respective parameters. Current code assumes the driver
is managing idle states on all possible CPUs but can be easily
generalized to support hetero
With the introduction of DT based idle states, CPUidle drivers for ARM
can now initialize idle states data through properties in the device tree.
This patch adds code to the big.LITTLE CPUidle driver to dynamically
initialize idle states data through the updated device tree source file.
Cc: Chand
CPU suspend is the standard kernel interface to be used to enter
low-power states on ARM64 systems. Current cpu_suspend implementation
by default assumes that all low power states are losing the CPU context,
so the CPU registers must be saved and cleaned to DRAM upon state
entry. Furthermore, the c
This patch implements the cpu_suspend cpu operations method through
the PSCI CPU SUSPEND API. The PSCI implementation translates the idle state
index passed by the cpu_suspend core call into a valid PSCI state according to
the PSCI states initialized at boot through the cpu_init_idle() CPU
operatio
On Wed, Aug 13, 2014 at 03:34:12PM +0200, Javier Martinez Canillas wrote:
> Indeed. I'll change mmc_regulator_get_ocrmask() in MMC core then to use
> regulator_can_change_voltage() to detect if the regulator is a fixed one
> and call regulator_get_voltage() instead of list_voltage() in that case.
ARM based platforms implement a variety of power management schemes that
allow processors to enter idle states at run-time.
The parameters defining these idle states vary on a per-platform basis forcing
the OS to hardcode the state parameters in platform specific static tables
whose size grows as t
This patch is v7 of a previous posting:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/274248.html
Patchset has been tested on:
- Juno ARM64 platform and Foundation v8 models (based on Trusted Firmware
PSCI implementation available at [1])
# Patches to enable idle states on
The CPUidle subsystem on ARM64 machines requires the idle states
implementation back-end to initialize idle states parameter upon
boot. This patch adds a hook in the CPU operations structure that
should be initialized by the CPU operations back-end in order to
provide a function that initializes cp
On most common ARM systems, the low-power states a CPU can be put into are
not discoverable in HW and require device tree bindings to describe
power down suspend operations and idle states parameters.
In order to enable DT based idle states and configure idle drivers, this
patch implements the bul
From: Sascha Hauer
Some (e)MMC and SD cards implement a DSR register that allows to tune
raise/fall times and drive strength of the CMD and DATA outputs.
The values to use depend on the card in use and the host.
It might be needed to reduce the drive strength to prevent voltage peaks
above the ho
The MiPHY28lp is a Generic PHY which can serve various SATA, PCIe or
USB3 devices. The two first ports can be use for either; both SATA, both
PCIe or one of each in any configuration.
The Third port is only for USB3.
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih407-b2120.dts | 11 +
Hi Kishon,
The goal of this series is to add the support of MiPHY28lp Generic PHY.
I tried to be as close as possible to the MiPHY365x Lee Jones proposal.
Best Regards
Gabriel.
Gabriel Fernandez (5):
phy: miphy28lp: Add Device Tree bindings for the MiPHY28lp
phy: miphy28lp: Add MiPHY28lp hea
This provides the shared header file which will be reference from both
the MiPHY28lp driver and its associated Device Tree node(s).
Signed-off-by: alexandre torgue
Signed-off-by: Gabriel Fernandez
---
include/dt-bindings/phy/phy-miphy28lp.h | 12
1 file changed, 12 insertions(+)
c
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe
or USB3 devices.
Signed-off-by: alexandre torgue
Signed-off-by: Giuseppe Cavallaro
Signed-off-by: Gabriel Fernandez
---
.../devicetree/bindings/phy/phy-miphy28lp.txt | 126 +
1 file changed, 126 insert
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe
or USB3 devices.
Signed-off-by: alexandre torgue
Signed-off-by: Giuseppe Cavallaro
Signed-off-by: Gabriel Fernandez
---
drivers/phy/Kconfig | 8 +
drivers/phy/Makefile| 1 +
drivers/phy/phy-miphy28lp.c | 73
Signed-off-by: Gabriel Fernandez
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 5fb95fb..641e367 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/mu
Hi,
This series intended to integrate Keystone 2 DSP GPIO controller functionality
into
gpio-syscon driver (drivers/gpio/gpio-syscon.c) as requested by Linus Walleij.
On Keystone SOCs, ARM host can send interrupts to DSP cores using the
DSP GPIO controller IP. Each DSP GPIO controller provides 2
This patch adds handling of new "gpio,syscon-dev" DT property,
which allows to specify syscon node and data/direction registers
offsets in DT.
"gpio,syscon-dev" has following format:
gpio,syscon-dev = <&syscon_dev data_reg_offset [direction_reg_offset]>;
where
- syscon_dev - phandle on s
On Keystone SOCs, ARM host can send interrupts to DSP cores using the
DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ signals for
each DSP core. This is one of the component used by the IPC mechanism used
on Keystone SOCs.
Keystone 2 DSP GPIO controller has specific features:
- ea
Add Keystone 2 DSP GPIO nodes.
DSP GPIO banks 0-7 correspond to DSP0-DSP7
Signed-off-by: Grygorii Strashko
---
arch/arm/boot/dts/k2hk.dtsi | 56 +++
1 file changed, 56 insertions(+)
diff --git a/arch/arm/boot/dts/k2hk.dtsi b/arch/arm/boot/dts/k2hk.dtsi
Some SoCs (like Keystone) may require to perform special
sequence of operations to assign output GPIO value, so default
implementation of .set() callback from gpio-syscon driver
can't be used.
Hence, add optional, SoC specific callback to assign output
gpio value.
Signed-off-by: Grygorii Strashko
From: Suravee Suthikulpanit
This patch extend GICv2m MSI to support multiple MSI in ARM64.
This requires the common arch_setup_msi_irqs() to be overwriten
with ARM64 version which does not return 1 for PCI_CAP_ID_MSI and
nvec > 1.
Cc: Mark Rutland
Cc: Marc Zyngier
Cc: Jason Cooper
Cc: Catali
From: Suravee Suthikulpanit
ARM GICv2m specification extends GICv2 to support MSI(-X) with
a new set of register frame. This patch introduces support for
the non-secure GICv2m register frame. Currently, GICV2m is available
in certain version of GIC-400.
The patch introduces a new property in ARM
From: Suravee Suthikulpanit
This patch set introduces support for MSI(-X) in GICv2m specification,
which is implemented in some variation of GIC400.
This depends on and has been tested with the V7 of"Add support for PCI in
AArch64"
(https://lkml.org/lkml/2014/3/14/320).
Changes in V4:
* Re
On 08/11, Ivan T. Ivanov wrote:
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt
> b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt
> new file mode 100644
> index 000..0a64567
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp
The VPU on i.MX53 has two distinct clocks for register access and
internal function.
Signed-off-by: Lothar Waßmann
---
arch/arm/boot/dts/imx53.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 6456a00..87
On 08/13/2014 02:29 PM, Mark Brown wrote:
>
> Please fix your mailer to word wrap at less than 80 columns, it makes
> your mails very hard to read when replying.
>
Sorry I had my wrap length configured to 80 but just changed to 74 now.
>> On 08/12/2014 11:27 PM, Mark Brown wrote:
>
> No, that
On Wed, Aug 13, 2014 at 01:31:44PM +0200, Javier Martinez Canillas wrote:
Please fix your mailer to word wrap at less than 80 columns, it makes
your mails very hard to read when replying.
> On 08/12/2014 11:27 PM, Mark Brown wrote:
> > Well, I think the question is if you understand where those
On Wed, Aug 13, 2014 at 08:53:13PM +0900, Inha Song wrote:
> Some boards need to set the INn_MODE[1:0] register to change
> the input signal patch. This wlf,inmode property is optional.
> If present values must be specified by the number of
> ARIZONA_MAX_INPUT.
>
> Example:
>- wlf,inmode = <2
On Wed, Aug 13, 2014 at 08:54:56PM +0900, Inha Song wrote:
> This patch update DT binding to support INn_MODE init_data. Each
> input signal path can be configurated either as a Analogue or
> Digital using the INn_MODE registers.
>
> Signed-off-by: Inha Song
> ---
> Documentation/devicetree/bind
On Mon, 11 Aug 2014 13:19:02 +0100
Mark Rutland wrote:
> > - - pclk-sample: Pixel clock polarity. Defaults to output on the falling
> > edge.
> > + - pclk-sample: Pixel clock polarity. Defaults to output on the falling
> > edge.
>
> Unrelated whitespace change?
Is there a sensible way to g
This patch update DT binding to support INn_MODE init_data. Each
input signal path can be configurated either as a Analogue or
Digital using the INn_MODE registers.
Signed-off-by: Inha Song
---
Documentation/devicetree/bindings/mfd/arizona.txt | 8
1 file changed, 8 insertions(+)
diff
Some boards need to set the INn_MODE[1:0] register to change
the input signal patch. This wlf,inmode property is optional.
If present values must be specified by the number of
ARIZONA_MAX_INPUT.
Example:
- wlf,inmode = <2 0 2 0>;/* IN1, IN3 use DMIC */
Signed-off-by: Inha Song
---
driver
Some boards need to set the INn_MODE[1:0] register to change
the input signal patch. This wlf,inmode property is optional.
If present values must be specified by the number of
ARIZONA_MAX_INPUT.
Example:
- wlf,inmode = <2 0 2 0>;/* IN1, IN3 use DMIC */
Signed-off-by: Inha Song
---
driver
struct regulator_ops *ops is a member in struct regulator_desc, which gets
its value from individual regulator driver upon regulator_register() and
is used by regulator core APIs. It's not allowed for regulator core to
modify any of these callbacks in *ops. Add 'const' qualifier to enforce that.
S
Some regulator require a minimum delay between its disable and next enable.
This is to avoid damages when out-of-range frequent disable/enable of a
single regulator can bring to the regulator chip.
Add @off_on_delay to struct regulator_desc. Device drivers' can use this field
to set this guard tim
Enable HiSilicon Hi6421 MFD and regulator drivers in hi3xxx_defconfig
Signed-off-by: Guodong Xu
---
arch/arm/configs/hi3xxx_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/hi3xxx_defconfig
b/arch/arm/configs/hi3xxx_defconfig
index f186bdf..6cf9187 100644
--- a/
A common delay function can be helpful when implementing new features. Factor
it out to maximize code reusability.
Signed-off-by: Guodong Xu
---
drivers/regulator/core.c | 74 ++--
1 file changed, 40 insertions(+), 34 deletions(-)
diff --git a/drivers
This adds driver to support HiSilicon Hi6421 PMIC. Hi6421 includes multi-
functions, such as regulators, codec, ADCs, Coulomb counter, etc.
This driver includes core APIs _only_.
Drivers for individul components, like voltage regulators, are
implemented in corresponding driver directories and file
Add driver support for HiSilicon Hi6421 voltage regulators.
Two rules for regulator enabling are defined in hi6421 spec:
1) Between disable and enable of each regulator (LDOs or BUCKs), there must
be a protection gap. Use @off_on_delay of regulator core to implement this.
2) No two regulators c
Add Hi6421 MFD dts node and regulator nodes into hi3620-hi4511
board config dts file.
Signed-off-by: Guodong Xu
---
arch/arm/boot/dts/hi3620-hi4511.dts | 233
1 file changed, 233 insertions(+)
diff --git a/arch/arm/boot/dts/hi3620-hi4511.dts
b/arch/arm/boot
This patchset adds an MFD core driver and a regulator driver for Hi6421 PMIC
SoC.
Hi6421 is a PMIC SoC designed and manufactured by HiSilicon Ltd. It includes
multi-functions, such as regulators, codec, ADCs, Coulomb counter, etc.
Hi6421 can be used in various Hi3620 SoC based boards. Registers in
Hello Mark,
On 08/12/2014 11:27 PM, Mark Brown wrote:
> On Tue, Aug 12, 2014 at 08:49:29PM +0200, Javier Martinez Canillas wrote:
>
>> So, is adding these voltages ranges (the design limits) in the Peach Pit DTS
>> file directly an acceptable solution? Basically what my previous patch [0]
>> did
On Fri, Aug 08, 2014 at 06:41:19PM +0800, Nicolin Chen wrote:
> The previous patch (ASoC: fsl_sai: Add asynchronous mode support) added
> new Device Tree bindings for Asynchronous and Synchronous modes support.
> However, these two shall not be present at the same time.
Applied, thanks.
signatu
On Wed, Aug 13, 2014 at 11:33:11AM +0100, Liviu Dudau wrote:
> On Wed, Aug 13, 2014 at 11:01:18AM +0100, Catalin Marinas wrote:
> > On Tue, Aug 12, 2014 at 05:25:25PM +0100, Liviu Dudau wrote:
> > > Introduce a default implementation for remapping PCI bus I/O resources
> > > onto the CPU address sp
On Wed, Aug 13, 2014 at 11:01:18AM +0100, Catalin Marinas wrote:
> On Tue, Aug 12, 2014 at 05:25:25PM +0100, Liviu Dudau wrote:
> > Introduce a default implementation for remapping PCI bus I/O resources
> > onto the CPU address space. Architectures with special needs may
> > provide their own versi
On Tue, Aug 12, 2014 at 05:25:25PM +0100, Liviu Dudau wrote:
> Introduce a default implementation for remapping PCI bus I/O resources
> onto the CPU address space. Architectures with special needs may
> provide their own version, but most should be able to use this one.
>
> Cc: Bjorn Helgaas
> Cc
On Tue, Aug 12, 2014 at 05:25:24PM +0100, Liviu Dudau wrote:
> Add pgprot_device(). It will be aliased to pgprot_noncached for
> architectures that do not support special attributes for device
> mapping. Used by arm64 to define new attributes for devices.
>
> Cc: Arnd Bergmann
> Cc: Catalin Marin
On Fri, Jul 25, 2014 at 4:07 PM, Rob Herring wrote:
> On Fri, Jul 25, 2014 at 8:23 AM, Linus Walleij
> wrote:
>> This adds the device tree bindings used by syscon-based LEDs.
(...)
>> +Device Tree Bindings for Syscon LEDs
>> +
>> +Required properties:
>> +- compatible : must be "syscon-leds".
>
2014-08-13 10:47 GMT+02:00 Linus Walleij :
> On Tue, Aug 12, 2014 at 11:02 AM, Matthias Brugger
> wrote:
>> 2014-08-11 9:15 GMT+02:00 Linus Walleij :
>>> On Thu, Jul 31, 2014 at 6:42 PM, Matthias Brugger
>>> wrote:
>>>
We enable GTP6 which ungates the arch timer clock. Apart we write the
>>>
Hi Dan,
Apologies for the delay.
On Thu, Jul 31, 2014 at 08:14:49PM +0100, Dan Murphy wrote:
> Add the TI drv260x haptics/vibrator driver.
> This device uses the input force feedback
> to produce a wave form to driver an
> ERM or LRA actuator device.
>
> The initial driver supports the devices
>
On Fri, Jul 25, 2014 at 3:23 PM, Linus Walleij wrote:
> This makes it possible to create a set of LEDs from a syscon
> MFD instance, which is lean mean and clean on the ARM
> reference designs and can replace the Versatile LEDs driver
> in the long run, as well as other custom syscon LEDs drivers
This is where we describe the different new and generic options used by
the ST BCH driver.
Cc: devicetree@vger.kernel.org
Signed-off-by: Lee Jones
---
Documentation/devicetree/bindings/mtd/stm-nand.txt | 74 ++
1 file changed, 74 insertions(+)
create mode 100644 Documentatio
From: Guoxiong Yan
Signed-off-by: Guoxiong Yan
Signed-off-by: Zhangfei Gao
---
.../devicetree/bindings/media/hix5hd2-ir.txt | 21
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/hix5hd2-ir.txt
diff --git a/Documentation
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