Hi Andrew,
On 30/08/2014 00:14, Andrew Bresticker wrote:
> Based on 3.17-rc2 and boot tested on Danube (+ out of tree patches) and
> Malta.
Lantiq makes a mips soc called danube. is this the same family or is
this just a name collision between 2 chip vendors ?
John
--
To unsubscribe from
Santosh,
On Thu, Aug 28, 2014 at 2:26 PM, Santosh Shilimkar
wrote:
> On Thursday 28 August 2014 03:36 PM, Doug Anderson wrote:
>> These two patches add support for automatically configuring the IO
>> voltage domains on rk3188 and rk3288 SoCs. The first patch adds some
>> new notification types t
Jianqun,
On Fri, Aug 29, 2014 at 3:07 PM, Jianqun wrote:
> Add optional power setting for i2s controller found on rk3066, rk3168 and
> rk3288
> processors from rockchip, should according to hardware design.
>
> Default setting for I2S controller is powered by 3.3V, there needs this patch
> if
>
Signed-off-by: Zhangfei Gao
---
arch/arm/boot/dts/hisi-x5hd2-dkb.dts | 28
arch/arm/boot/dts/hisi-x5hd2.dtsi| 16
2 files changed, 44 insertions(+)
diff --git a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
inde
v3:
Change node wdt for a watchdog timer as comment from Dinh
v2:
Add comments of mac-address, suggested by Mark
Zhangfei Gao (6):
ARM: dts: hix5hd2: add gmac node
ARM: dts: hix5hd2: add mmc node
ARM: dts: hix5hd2: add usb node
ARM: dts: hix5hd2: add sata node
ARM: dts: hix5hd2: add gp
Signed-off-by: Jiancheng Xue
Signed-off-by: Zhangfei Gao
---
arch/arm/boot/dts/hisi-x5hd2-dkb.dts |5 +
arch/arm/boot/dts/hisi-x5hd2.dtsi| 20
2 files changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
b/arch/arm/boot/dts/hisi-x5hd2-d
Signed-off-by: Zhangfei Gao
Signed-off-by: Jiancheng Xue
---
arch/arm/boot/dts/hisi-x5hd2.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi
b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 802331b..9252264 100644
--- a/arch/arm/boot/dts/hisi-x
Signed-off-by: Zhangfei Gao
---
arch/arm/boot/dts/hisi-x5hd2.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi
b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 012525c..802331b 100644
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch/arm/bo
Signed-off-by: Jiancheng Xue
Signed-off-by: Zhangfei Gao
---
arch/arm/boot/dts/hisi-x5hd2.dtsi |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi
b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 152f3ad..b3a87d7 100644
--- a/arch/arm/boot/dts/hisi-x5hd2.d
Signed-off-by: Jiancheng Xue
Signed-off-by: Zhangfei Gao
---
arch/arm/boot/dts/hisi-x5hd2.dtsi | 234 +
1 file changed, 234 insertions(+)
diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi
b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 18f52f0..152f3ad 100644
--- a/
This patch update DT binding to support INn_MODE init_data. Each
input signal path can be configurated either as a Analogue or
Digital using the INn_MODE registers.
Signed-off-by: Inha Song
Reviewed-by: Charles Keepax
---
Documentation/devicetree/bindings/mfd/arizona.txt | 7 +++
1 file cha
Some boards need to set the INn_MODE[1:0] register to change
the input signal patch. This wlf,inmode property is optional.
If present, values must be specified less than or equal to
the number of input singals. If values less than the number
of input signals, elements that has not been specifed are
This patch series add support for INn_MODE register control using platform data.
Each input signal path can be configurated either as a Analogue or Digital using
the INn_MODE registers.
Changes for v5
- Change to use of_property_for_each_u32
Changes for v4
- Update document content for more clari
On Sat, Aug 30, 2014 at 02:14:07AM +0200, Stephen Boyd wrote:
> On 08/29/14 16:41, Courtney Cavin wrote:
> > On Sat, Aug 30, 2014 at 01:14:23AM +0200, Bjorn Andersson wrote:
> >> From: Kumar Gala
> >>
> >> Add driver for Qualcomm MSM Hardware Mutex block that exists on
> >> newer Qualcomm SoCs.
>
On 08/29/2014 04:22 PM, Jason Gunthorpe wrote:
> On Fri, Aug 29, 2014 at 11:23:57AM -0700, Florian Fainelli wrote:
>> On 08/29/2014 10:31 AM, Jason Gunthorpe wrote:
>>> On Fri, Aug 29, 2014 at 08:35:36AM -0700, Sören Brinkmann wrote:
>>>
The compatible string is listed as optional property for
On 08/29/14 16:41, Courtney Cavin wrote:
> On Sat, Aug 30, 2014 at 01:14:23AM +0200, Bjorn Andersson wrote:
>> From: Kumar Gala
>>
>> Add driver for Qualcomm MSM Hardware Mutex block that exists on
>> newer Qualcomm SoCs.
>>
>> Cc: Jeffrey Hugo
>> Cc: Eric Holmberg
>> Cc: Courtney Cavin
>> Sign
On Sat, Aug 30, 2014 at 01:14:23AM +0200, Bjorn Andersson wrote:
> From: Kumar Gala
>
> Add driver for Qualcomm MSM Hardware Mutex block that exists on
> newer Qualcomm SoCs.
>
> Cc: Jeffrey Hugo
> Cc: Eric Holmberg
> Cc: Courtney Cavin
> Signed-off-by: Kumar Gala
> [bjorn: added pm_runtime
On Fri, Aug 29, 2014 at 11:23:57AM -0700, Florian Fainelli wrote:
> On 08/29/2014 10:31 AM, Jason Gunthorpe wrote:
> > On Fri, Aug 29, 2014 at 08:35:36AM -0700, Sören Brinkmann wrote:
> >
> >> The compatible string is listed as optional property for PHYs. So, not
> >> having one is an option, I gu
From: Kumar Gala
Add driver for Qualcomm MSM Hardware Mutex block that exists on
newer Qualcomm SoCs.
Cc: Jeffrey Hugo
Cc: Eric Holmberg
Cc: Courtney Cavin
Signed-off-by: Kumar Gala
[bjorn: added pm_runtime calls, from Courtney,
added sfpb-mutex compatible,
updated DT binding
This series add support for mapping and routing GIC interrupts through
the device-tree, which will be used on the upcoming interAptiv-based
Danube SoC.
- Patches 1 and 2 provide improvements to the CPU interrupt controller
when used with DT.
- Patches 3 through 7 add device-tree support for the
For platforms which boot with device-tree and use the MIPS CPU interrupt
controller binding, a generic plat_irq_dispatch() can be used since all
CPU interrupts should be mapped through the CPU IRQ domain. Implement a
plat_irq_dispatch() which simply handles the highest pending interrupt.
Signed-o
changes:
* add snd_soc_dai_init_dma_data
* fix duplicated argument to "I2S_DMACR_TDE_DISABLE"
* set 1.8v or 3.3v power for I2S controller by GRF interface
* enable "hclk" always
* dma maxburst change to 16
Requested on RK3XXX I2S controllers, and tested ok on rk3288-pinky board.
Change-Id: If17b8
Define a generic MIPS_GIC_IRQ_BASE which is suitable for Malta and
the upcoming Danube board in . Since Sead-3 is
different and uses a MIPS_GIC_IRQ_BASE equal to the CPU IRQ base (0),
define its MIPS_GIC_IRQ_BASE in .
Signed-off-by: Andrew Bresticker
---
arch/mips/include/asm/mach-generic/irq.h
Implement a default gic_irq_ack() and gic_finish_irq(). These are
suitable for handling IPIs on Malta and the upcoming Danube board.
Signed-off-by: Andrew Bresticker
---
arch/mips/kernel/irq-gic.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/mips/kernel/irq-gic.c b/a
When mapping an interrupt in the CPU IRQ domain, set the vint handler
for that interrupt if the CPU uses vectored interrupt handling.
Signed-off-by: Andrew Bresticker
---
arch/mips/kernel/irq_cpu.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/ker
If the online CPU check in gic_set_affinity() fails, return a proper
errno value instead of -1.
Signed-off-by: Andrew Bresticker
---
arch/mips/kernel/irq-gic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index 1764b0
Implement an irq_set_type callback for the GIC which is used to set
the polarity and trigger type of GIC interrupts.
Signed-off-by: Andrew Bresticker
---
arch/mips/include/asm/gic.h | 9
arch/mips/kernel/irq-gic.c | 53 +
2 files changed, 62
The MIPS GIC supports 7 local interrupts, 5 of which are just core
interrupts which can be re-routed through the GIC. This patch adds
support for mapping and handling the remaining two: the GIC timer
and watchdog. GIC interrupts from 0 to GIC_NUM_INTRS are still the
shared external interrupts whi
Instead of using GIC interrupt 0 for the timer (which was not even
handled correctly by the GIC irqchip code and could conflict with an
actual external interrupt), use the designated local interrupt for
the GIC timer.
Also, since the timer is a per-CPU interrupt, initialize it with
setup_percpu_ir
Add device-tree support for the MIPS GIC. With DT, no per-platform
static device interrupt mapping is supplied and instead all device
interrupts are specified through the DT. The GIC-to-CPU interrupts
must also be specified in the DT.
Platforms using DT-based probing of the GIC need only supply
Now that the GIC driver properly supports local interrupts, extend
the static interrupt mapping to include the GIC timer and watchdog
and fix up the GIC interrupt setup and handling so that the local
interrupts are properly handled. Note that ipi_map is also renamed
to gic_irq_map since it is now
When DT-based probing is used for the GIC and the GIC is also used
for IPIs (i.e. MIPS_GIC_IPI=y), set up the last 2 * NR_CPUs GIC
interrupts as the reschedule and call IPIs.
Signed-off-by: Andrew Bresticker
---
arch/mips/kernel/irq-gic.c | 86 ++
1 fi
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to individual VPEs and CPU
interrupt vectors. It also supports a timer and software-generated
interrupts.
Signed-off-by: Andrew Bresticker
---
Documentation/devicetree/bindings/mips/gi
Add optional power setting for i2s controller found on rk3066, rk3168 and rk3288
processors from rockchip, should according to hardware design.
Default setting for I2S controller is powered by 3.3V, there needs this patch if
it's powered by 1.8V by hardware design.
Jianqun (2):
rockchip-i2s: dt
Add "rockchip,grf" for driver to get physical address of GRF, and
"rockchip,grf-io-vsel"
for driver to set voltage for I2S controller according to hardware request.
Requested by rk3xxx I2S controller and tested ok on rk3288-pinky board.
Change-Id: I2587d15c25e64c569857369326653d8a450bae19
Signed
Hi Catalin,
On Wed, 2014-08-27 at 09:30 +0100, Catalin Marinas wrote:
> On Fri, Aug 22, 2014 at 08:49:17PM +0100, Geoff Levand wrote:
> > Add a new arm64 device tree binding cpu-return-addr. This binding is
> > recomended
> > for all ARM v8 CPUs that have an "enable-method" property value of
>
Hi Uli,
On Fri, Aug 29, 2014 at 8:16 PM, Ulrich Hecht
wrote:
> These are the dtsi files for r8a7778 and r8a7779 sorted according to what I
> imagine to be accepted standards now: sort by address, "compatible" goes
> first, #include directives before anything else. The sorting was done using
> a
On Friday 29 August 2014 17:04:28 Thierry Reding wrote:
> static struct irq_chip *extn;
>
> void gic_arch_register(const struct irqchip *chip)
> {
> if (WARN(extn != NULL))
> return;
>
> gic_chip.flags |= chip->flags;
Hi Grant,
On Wed, 2014-08-27 at 11:28 +0100, Grant Likely wrote:
> On Fri, 22 Aug 2014 17:43:36 +, Geoff Levand wrote:
> > The of_n_size_cells() routine only does a read-only operation on the device
> > tree
> > passed in, so add the const keyword to that argument so that
> > of_n_size_cell
On Fri, Aug 29, 2014 at 08:11:41PM +0100, Mark Brown wrote:
> On Fri, Aug 29, 2014 at 10:40:20AM -0700, Nicolin Chen wrote:
>
> > Agreed, it's better to be described in the commit comments as well.
>
> > And regarding the compatibility with the old DT, I personally prefer
> > it to be added in th
On Fri, Aug 29, 2014 at 10:40:20AM -0700, Nicolin Chen wrote:
> Agreed, it's better to be described in the commit comments as well.
> And regarding the compatibility with the old DT, I personally prefer
> it to be added in the change for safety but if this case is allowable
> which I'm not so sur
On Fri, Aug 29, 2014 at 06:13:10AM -0700, Doug Anderson wrote:
> On Wed, Aug 27, 2014 at 2:01 AM, Mark Brown wrote:
> > On Tue, Aug 26, 2014 at 10:18:57PM +0800, Chris Zhong wrote:
> >> remove the redundant code, since pdata has been removed from stuct rk808
> > I've applied this but if there's f
On 08/29/2014 10:31 AM, Jason Gunthorpe wrote:
> On Fri, Aug 29, 2014 at 08:35:36AM -0700, Sören Brinkmann wrote:
>
>> The compatible string is listed as optional property for PHYs. So, not
>> having one is an option, I guess. But, I'd also prefer to at least keep
>> the -c22 one, since I saw prob
- move #include to the top
- "compatible" goes first
- sort nodes by address
Signed-off-by: Ulrich Hecht
---
arch/arm/boot/dts/r8a7779.dtsi | 472 -
1 file changed, 236 insertions(+), 236 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm
- move #include to the top
- "compatible" goes first
- sort nodes by address
Signed-off-by: Ulrich Hecht
---
arch/arm/boot/dts/r8a7778.dtsi | 56 +-
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/b
Hi!
These are the dtsi files for r8a7778 and r8a7779 sorted according to what I
imagine to be accepted standards now: sort by address, "compatible" goes
first, #include directives before anything else. The sorting was done using
a little script I wrote (https://github.com/uli/dtssort).
I chose t
On Fri, Aug 29, 2014 at 06:26:02PM +0100, Mark Rutland wrote:
> On Fri, Aug 29, 2014 at 05:40:11PM +0100, Nicolin Chen wrote:
> > On Fri, Aug 29, 2014 at 12:59:43PM +0100, Mark Brown wrote:
> > > On Fri, Aug 29, 2014 at 12:06:01PM +0100, Mark Rutland wrote:
> > > > On Fri, Aug 29, 2014 at 08:12:12A
On Wed, Aug 27, 2014 at 6:04 AM, Fengguang Wu wrote:
> Greetings,
>
> 0day kernel testing robot got the below dmesg and the first bad commit is
It failed because CONFIG_SYSFS isn't enabled in your configuration.
Will discuss with Grant and patch it soon. Thanks!
>
> git://git.kernel.org/pub/scm/
On Fri, Aug 29, 2014 at 08:35:36AM -0700, Sören Brinkmann wrote:
> The compatible string is listed as optional property for PHYs. So, not
> having one is an option, I guess. But, I'd also prefer to at least keep
> the -c22 one, since I saw problems when I tried using -c45 (the Zed phy
> should sup
On Fri, Aug 29, 2014 at 05:40:11PM +0100, Nicolin Chen wrote:
> On Fri, Aug 29, 2014 at 12:59:43PM +0100, Mark Brown wrote:
> > On Fri, Aug 29, 2014 at 12:06:01PM +0100, Mark Rutland wrote:
> > > On Fri, Aug 29, 2014 at 08:12:12AM +0100, Xiubo Li wrote:
> >
> > > > The 'big-endian-data' property i
On 08/29/2014 03:50 PM, Antoine Tenart wrote:
> This series introduce the Marvell Berlin Ethernet driver, allowing to
> handle the fast Ethernet port. This driver is based on the mv643xx_eth
> driver and reuse some of its functions. While I wanted to make these
> functions common to the two drivers
On Fri, Aug 29, 2014 at 12:59:43PM +0100, Mark Brown wrote:
> On Fri, Aug 29, 2014 at 12:06:01PM +0100, Mark Rutland wrote:
> > On Fri, Aug 29, 2014 at 08:12:12AM +0100, Xiubo Li wrote:
>
> > > The 'big-endian-data' property is originally used to indicate whether the
> > > LSB firstly or MSB first
On Mon, Aug 11, 2014 at 10:18:12AM -0500, ttha...@opensource.altera.com wrote:
> From: Thor Thayer
>
> This patch adds support for the CycloneV and ArriaV SDRAM controllers.
> Correction and reporting of SBEs, Panic on DBEs.
>
> Signed-off-by: Thor Thayer
> ---
> v2: Use the SDRAM controller re
On 08/29/2014 05:15 PM, Jean-Michel Hautbois wrote:
This is based on reg and reg-names in DT.
Example:
reg = <0x10 0x20 0x30>;
reg-names = "main", "io", "test";
This function will create dummy devices io and test
with addresses 0x20 and 0x30 respectively.
Signed-off-by: Jean-Michel Hautbois
On 08/29/2014 05:15 PM, Jean-Michel Hautbois wrote:
This is based on reg and reg-names in DT.
Example:
reg = <0x10 0x20 0x30>;
reg-names = "main", "io", "test";
This function will create dummy devices io and test
with addresses 0x20 and 0x30 respectively.
Signed-off-by: Jean-Michel Hautbois
On 08/29/2014 05:15 PM, Jean-Michel Hautbois wrote:
This patch uses DT in order to parse addresses for dummy devices of adv7604.
The ADV7604 has thirteen 256-byte maps that can be accessed via the main
I²C ports. Each map has it own I²C address and acts
as a standard slave device on the I²C bus.
Am 29.08.2014 17:35, schrieb Sören Brinkmann:
> On Fri, 2014-08-29 at 05:18PM +0200, Andreas Färber wrote:
>> Am 29.08.2014 16:08, schrieb Michal Simek:
>>> I think resolution is:
>>> 1. Do not use marvell,88e1518 because it is not listed anywhere
>>> 2. Do not add ethernet-phy-id. because
On Fri, 2014-08-29 at 05:18PM +0200, Andreas Färber wrote:
> Am 29.08.2014 16:08, schrieb Michal Simek:
> > On 08/25/2014 10:21 PM, Florian Fainelli wrote:
> >> On 08/25/2014 10:46 AM, Jason Gunthorpe wrote:
> >>> On Fri, Aug 22, 2014 at 01:47:09PM -0700, Florian Fainelli wrote:
> >>>
> > - th
Am 29.08.2014 16:08, schrieb Michal Simek:
> On 08/25/2014 10:21 PM, Florian Fainelli wrote:
>> On 08/25/2014 10:46 AM, Jason Gunthorpe wrote:
>>> On Fri, Aug 22, 2014 at 01:47:09PM -0700, Florian Fainelli wrote:
>>>
> - the ID based strings seem to be not needed since, IIUC, the core
>
This patch uses DT in order to parse addresses for dummy devices of adv7604.
The ADV7604 has thirteen 256-byte maps that can be accessed via the main
I²C ports. Each map has it own I²C address and acts
as a standard slave device on the I²C bus.
If nothing is defined, it uses default addresses.
The
This is based on reg and reg-names in DT.
Example:
reg = <0x10 0x20 0x30>;
reg-names = "main", "io", "test";
This function will create dummy devices io and test
with addresses 0x20 and 0x30 respectively.
Signed-off-by: Jean-Michel Hautbois
---
drivers/i2c/i2c-core.c | 20
On Fri, Aug 29, 2014 at 04:24:10PM +0200, Thierry Reding wrote:
> On Fri, Aug 29, 2014 at 09:31:40AM +0200, Thierry Reding wrote:
> > On Thu, Aug 28, 2014 at 06:10:55PM +0200, Arnd Bergmann wrote:
> > > On Thursday 28 August 2014 17:31:17 Thierry Reding wrote:
> > >
> > > > void __init tegra_init
Hi Antoine,
A quick look...
On 29 Aug 03:50 PM, Antoine Tenart wrote:
> This patch introduces the Marvell Berlin network unit driver, which uses
> the MVMDIO interface to communicate to the PHY. This is a fast Ethernet
> driver.
>
> This driver is highly based on the mv643xx_eth driver, and reus
From: Ezra Savard
Adds LEDs to the zc702 devicetree for use with the leds-gpio driver.
Signed-off-by: Ezra Savard
Reviewed-by: Soren Brinkmann
---
v2:
- fix node names
---
arch/arm/boot/dts/zynq-zc702.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/zynq-zc7
This patch adds DT support to configure GPIO_78 as function ps_hold
on apq8064.
CC: Rob Herring
CC: Pawel Moll
CC: Mark Rutland
CC: Ian Campbell
CC: Kumar Gala
CC: devicetree@vger.kernel.org
CC: linux-arm-ker...@lists.infradead.org
Signed-off-by: Pramod Gurav
---
arch/arm/boot/dts/qcom-apq
This patch adds device tree nodes to support pinctrl for apq8064 SOC
CC: Rob Herring
CC: Pawel Moll
CC: Mark Rutland
CC: Ian Campbell
CC: Kumar Gala
CC: devicetree@vger.kernel.org
CC: linux-arm-ker...@lists.infradead.org
Signed-off-by: Pramod Gurav
---
arch/arm/boot/dts/qcom-apq8064.dtsi |
Intersil chips ISL29018, ISL29023 and ISL29035 are very similar. They're
all ambience light sensors. The ISL29018, however, is also a proximity
sensor. The registers are similar too:
-+--+--
AVAILABLE IN | ADDR REG | NAME
290xx | |
-+
isl29108 was used, instead of isl29018.
Signed-off-by: Laurentiu Palcu
---
drivers/staging/iio/light/isl29018.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/iio/light/isl29018.c
b/drivers/staging/iio/light/isl29018.c
index 86cc8f9..63c70be 100644
-
Hi,
This patchset adds support for 2 similar ALS chips: ISL29023 and ISL29035.
The chip I performed tests on was a ISL29035, since I didn't have eval boards,
for the
other 2 chips, handy.
The registers tables for each chip can be found here:
ISL29018: [1] - page 10
ISL29023: [2] - page 8
ISL29
Add support for enumerating the device through ACPI.
Signed-off-by: Laurentiu Palcu
---
drivers/staging/iio/light/isl29018.c | 46 +++-
1 file changed, 40 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/iio/light/isl29018.c
b/drivers/staging/iio/light
On 08/25/2014 10:21 PM, Florian Fainelli wrote:
> On 08/25/2014 10:46 AM, Jason Gunthorpe wrote:
>> On Fri, Aug 22, 2014 at 01:47:09PM -0700, Florian Fainelli wrote:
>>
- the ID based strings seem to be not needed since, IIUC, the core
reads the ID from the PHY and uses it, so I just
Hi,
On Fri, Aug 29, 2014 at 02:28:17PM +0100, Jean-Michel Hautbois wrote:
> This patch uses DT in order to parse addresses for dummy devices of adv7604.
> If nothing is defined, it uses default addresses.
> The main prupose is using two adv76xx on the same i2c bus.
This is rather opaque.
It seem
On Fri, Aug 29, 2014 at 09:31:40AM +0200, Thierry Reding wrote:
> On Thu, Aug 28, 2014 at 06:10:55PM +0200, Arnd Bergmann wrote:
> > On Thursday 28 August 2014 17:31:17 Thierry Reding wrote:
> >
> > > void __init tegra_init_irq(void)
> > > {
> > > - int i;
> > > - void __iomem *distbase;
> > > +
On 08/29/2014 03:28 PM, Jean-Michel Hautbois wrote:
> This patch uses DT in order to parse addresses for dummy devices of adv7604.
> If nothing is defined, it uses default addresses.
> The main prupose is using two adv76xx on the same i2c bus.
>
> Signed-off-by: Jean-Michel Hautbois
> ---
> .../
This patch introduces the Marvell Berlin network unit driver, which uses
the MVMDIO interface to communicate to the PHY. This is a fast Ethernet
driver.
This driver is highly based on the mv643xx_eth driver, and reuse some of
its functions. But lots of differences are there:
- They do not have the
This adds the binding documentation for the Marvell Berlin Ethernet
controller.
Signed-off-by: Antoine Tenart
---
.../devicetree/bindings/net/marvell-berlin.txt | 23 ++
1 file changed, 23 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/marvell-ber
Hi all,
This series introduce the Marvell Berlin Ethernet driver, allowing to
handle the fast Ethernet port. This driver is based on the mv643xx_eth
driver and reuse some of its functions. While I wanted to make these
functions common to the two drivers at first, I finally do think this
is not a g
This patch enables the Ethernet port on the Marvell Berlin2Q DMP board.
The Ethernet PHY node is also added.
Signed-off-by: Antoine Tenart
---
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
Marvell Berlin SoCs have a MDIO interface for their Ethernet
controllers. Mention Berlin in the SoC list.
Signed-off-by: Antoine Tenart
---
Documentation/devicetree/bindings/net/marvell-orion-mdio.txt | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicet
This patch adds the mdio and the Ethernet nodes, enabling the network
unit on Berlin BG2Q SoCs.
The mac address is set to 00:00:00:00:00:00 so that the one set by the
bootloader is used. The PHY nodes are in the board device tree.
Signed-off-by: Antoine Tenart
---
arch/arm/boot/dts/berlin2q.dts
Olof,
On 29.08.14 14:10:23, Robert Richter wrote:
> On 28.08.14 16:01:08, Olof Johansson wrote:
> > Thinking about it a bit more, the even more obvious solution that I
> > for some reason didn't think of at the time, is to have the
> > dtbs_install target create the appropriate subdirectories on t
On Fri, Aug 22, 2014 at 04:26:37PM -0700, Feng Kan wrote:
> Add APM X-Gene SoC RNG device driver.
>
> Feng Kan (3):
> hwrng: xgene: add support for APM X-Gene SoC RNG support
> Documentation: rng: Add X-Gene SoC RNG driver documentation
> arm64: dts: add random number generator dts node to A
These two patches add support for automatically configuring the IO
voltage domains on rk3188 and rk3288 SoCs. The first patch adds some
new notification types to the regulator code. It's used by the second
patch which actually implements the IO voltage domain driver.
These two patches were co-de
On Mon, Aug 25, 2014 at 9:22 PM, Stephen Warren wrote:
> On 08/18/2014 11:08 AM, Andrew Bresticker wrote:
>>
>> In addition to the PCIe and SATA PHYs, the XUSB pad controller also
>> supports 3 UTMI, 2 HSIC, and 2 USB3 PHYs. Each USB3 PHY uses a single
>> PCIe or SATA lane and is mapped to one of
Move the Ralink device-trees to arch/mips/boot/dts/ralink/ and update
the Makefiles accordingly. A built-in device-tree is optional, so
select BUILTIN_DTB when it is requested.
Signed-off-by: Andrew Bresticker
---
Looks like this one didn't make it through the first time.
---
arch/mips/boot/dts
This patch uses DT in order to parse addresses for dummy devices of adv7604.
If nothing is defined, it uses default addresses.
The main prupose is using two adv76xx on the same i2c bus.
Signed-off-by: Jean-Michel Hautbois
---
.../devicetree/bindings/media/i2c/adv7604.txt | 7 ++-
drivers/m
This is based on reg and reg-names in DT.
Example:
reg = <0x10 0x20 0x30>;
reg-names = "main", "io", "test";
This function will create dummy devices io and test
with addresses 0x20 and 0x30 respectively.
Signed-off-by: Jean-Michel Hautbois
---
drivers/i2c/i2c-core.c | 20
Mark,
On Wed, Aug 27, 2014 at 2:01 AM, Mark Brown wrote:
> On Tue, Aug 26, 2014 at 10:18:57PM +0800, Chris Zhong wrote:
>> remove the redundant code, since pdata has been removed from stuct rk808
>
> I've applied this but if there's further changes needed please wait
> until the MFD changes they
On 08/29/2014 09:09 AM, Bjorn Andersson wrote:
> On Tue 26 Aug 05:45 PDT 2014, Georgi Djakov wrote:
>
>> Define a new binding for the Qualcomm TLMM (Top-Level Mode Mux) based pin
>> controller inside the APQ8084.
>>
>> Signed-off-by: Georgi Djakov
> [...]
>> +Valid values for function are:
>> +ad
On 08/29/2014 09:01 AM, Bjorn Andersson wrote:
> On Tue 26 Aug 05:45 PDT 2014, Georgi Djakov wrote:
>
> Hi Georgi,
>
> Sorry for missing this before, but I did a quick walkthrough and unfortunately
> the gpio configuration needs a few updates.
>
>> diff --git a/drivers/pinctrl/qcom/pinctrl-apq80
On Fri, Aug 29, 2014 at 01:48:29PM +0100, Jason Cooper wrote:
> On Fri, Aug 29, 2014 at 01:42:16PM +0100, Mark Rutland wrote:
> > On Fri, Aug 29, 2014 at 01:24:52PM +0100, Jason Cooper wrote:
> > > On Fri, Aug 29, 2014 at 11:40:02AM +0100, Mark Rutland wrote:
> ...
> Someone wrote:
> > > > > > > >
On Fri, Aug 29, 2014 at 08:48:29AM -0400, ext Jason Cooper wrote:
> On Fri, Aug 29, 2014 at 01:42:16PM +0100, Mark Rutland wrote:
> > On Fri, Aug 29, 2014 at 01:24:52PM +0100, Jason Cooper wrote:
> > > On Fri, Aug 29, 2014 at 11:40:02AM +0100, Mark Rutland wrote:
> ...
> Someone wrote:
> > > > > >
On Fri, Aug 29, 2014 at 01:42:16PM +0100, Mark Rutland wrote:
> On Fri, Aug 29, 2014 at 01:24:52PM +0100, Jason Cooper wrote:
> > On Fri, Aug 29, 2014 at 11:40:02AM +0100, Mark Rutland wrote:
...
Someone wrote:
> > > > > > > http://datasheets.maximintegrated.com/en/ds/DS1307.pdf
> > > > > > > http:
On Fri, Aug 29, 2014 at 01:24:52PM +0100, Jason Cooper wrote:
> On Fri, Aug 29, 2014 at 11:40:02AM +0100, Mark Rutland wrote:
> > On Fri, Aug 29, 2014 at 08:34:25AM +0100, Matti Vaittinen wrote:
> > > On Thu, Aug 28, 2014 at 10:40:34AM -0700, ext Guenter Roeck wrote:
> > > > On Thu, Aug 28, 2014 at
On 08/29/2014 05:56 AM, Lee Jones wrote:
> On Tue, 19 Aug 2014, Nishanth Menon wrote:
>
>> With the recent pinctrl-single changes, omaps can treat wake-up events
>> from deeper idle states as interrupts.
>>
>> Let's add support for the optional second interrupt for wake-up
>> events. And then SoC
On Fri, Aug 29, 2014 at 11:40:02AM +0100, Mark Rutland wrote:
> On Fri, Aug 29, 2014 at 08:34:25AM +0100, Matti Vaittinen wrote:
> > On Thu, Aug 28, 2014 at 10:40:34AM -0700, ext Guenter Roeck wrote:
> > > On Thu, Aug 28, 2014 at 01:28:42PM -0400, Jason Cooper wrote:
> > > > On Thu, Aug 28, 2014 at
On 28.08.14 16:01:08, Olof Johansson wrote:
> On Thu, Aug 28, 2014 at 11:14 AM, Robert Richter wrote:
> > On 28.08.14 09:31:43, Olof Johansson wrote:
> >> On Thu, Aug 28, 2014 at 9:25 AM, Mark Rutland wrote:
> >> > On Thu, Aug 28, 2014 at 05:15:56PM +0100, Robert Richter wrote:
> >> >> Olof,
> >>
Dear Eduardo Bezerra Valentin:
在 2014年08月29日 19:39, edubez...@gmail.com 写道:
> Hello Zhao,
>
> On Thu, Aug 28, 2014 at 9:54 PM, 赵仪峰 wrote:
>> Hi Heiko,
>>
>>The TS-ADC on RK3288 has two component, a tsadc and a tsadc controller.
>> The tsadc controller is similar like the thermal manager unit
On 28 August 2014 10:07, Geert Uytterhoeven wrote:
> - r8a7792 (R-Car V2H)
> - r8a7793 (R-Car M2-N)
> - r8a7794 (R-Car E2)
>
> Signed-off-by: Geert Uytterhoeven
Thanks! Applied for next.
Kind regards
Uffe
> ---
> v2: Drop RFC
> ---
> Documentation/devicetree/bindings/mmc/tmio_mmc.txt |
On Fri, Aug 29, 2014 at 02:46:37PM +0800, Xiubo Li wrote:
> This patch merge single DAI link and muti-DAI links code together,
> and simply the simple-card driver code.
This will need to be rebased on Morimoto-san's changes I believe.
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