On 09/18/2014 08:36 PM, Mark Rutland wrote:
> On Thu, Sep 18, 2014 at 06:07:40AM +0100, Michal Simek wrote:
>> On 09/17/2014 06:17 PM, Mark Rutland wrote:
>>> On Wed, Sep 17, 2014 at 03:30:49PM +0100, Michal Simek wrote:
From: Peter Crosthwaite
Modern TTC implementations can extend
On Mon, Sep 15, 2014 at 03:35:54PM -0700, Mark Brown wrote:
> On Thu, Sep 11, 2014 at 02:22:30PM +0900, Gyungoh Yoo wrote:
>
> > By the way,
> > I knew that compatible string is used for binding a driver.
> > http://devicetree.org/Device_Tree_Usage#Understanding_the_compatible_Property
>
> > And,
On Thu, Sep 18, 2014 at 06:53:16PM +0100, Mark Rutland wrote:
> On Thu, Sep 18, 2014 at 03:21:27AM +0100, Robin Gong wrote:
> > On Wed, Sep 17, 2014 at 06:52:44PM +0100, Mark Rutland wrote:
> > > On Wed, Sep 17, 2014 at 10:57:59AM +0100, Robin Gong wrote:
> > > > This driver register pm_power_off w
This adds support for Rockchip soc edp found on rk3288
Signed-off-by: Mark Yao
Signed-off-by: Jeff Chen
---
Changes in v2:
- fix code sytle
- use some define from drm_dp_helper.h
- use panel-simple driver for primary display.
- remove unnecessary clock clk_24m_parent.
Changes in v3: None
driv
Add binding documentation for Rockchip SoC EDP driver.
Signed-off-by: Jeff Chen
Signed-off-by: Mark Yao
---
Changes in v2:
- add edp reset
- add panel node
- add port for display-subsystem
Changes in v3: None
.../devicetree/bindings/video/rockchip-edp.txt | 50
1 fi
This adds binding documentation for Rockchip SoC VOP driver.
Signed-off-by: Mark Yao
---
Changes in v2:
- rename "lcdc" to "vop"
- add vop reset
- add iommu node
- add port for display-subsystem
Changes in v3: None
.../devicetree/bindings/video/rockchip-vop.txt | 58
This add a display subsystem comprise the all display interface nodes.
Signed-off-by: Mark Yao
---
Changes in v2:
- add DRM master device node to list all display nodes that comprise
the graphics subsystem.
Changes in v3: None
.../devicetree/bindings/video/rockchip-drm.txt | 19 +++
This a series of patches is a DRM Driver for Rockchip Socs, add support
for vop devices, eDP. Future patches will add additional encoders/connectors,
such as HDMI.
The basic "crtc" for rockchip is a "VOP" - Video Output Processor.
the vop devices found on Rockchip rk3288 Soc, rk3288 soc have two s
This patch adds the basic structure of a DRM Driver for Rockchip Socs.
Signed-off-by: Mark yao
---
Changes in v2:
- use the component framework to defer main drm driver probe
until all VOP devices have been probed.
- use dma-mapping API with ARM_DMA_USE_IOMMU, create dma mapping by
master dev
On 08/27/2014 12:23 PM, David Riley wrote:
This driver registers a restart handler to set a GPIO line high/low
to reset a board based on devicetree bindings.
Signed-off-by: David Riley
Reviewed-by: Guenter Roeck
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the
Hi Catalin,
> --- Original Message ---
> Sender : Catalin Marinas
> Date : Sep 19, 2014 01:18 (GMT+09:00)
> Title : Re: [PATCH v4 6/8] arm64: exynos7: Enable ARMv8 based Exynos7 (SoC)
> support
> On Fri, Sep 12, 2014 at 04:26:30PM +0100, Naveen Krishna Chatradhi wrote:
>> From: Alim Akht
On 09/18/2014 08:24 PM, Josh Cartwright wrote:
On Thu, Sep 18, 2014 at 07:41:17PM -0700, Guenter Roeck wrote:
On 09/18/2014 03:26 PM, Josh Cartwright wrote:
Add a driver for the watchdog timer block found in the Krait Processor
Subsystem (KPSS) on the MSM8960, APQ8064, and IPQ8064.
Signed-off-
On Thu, Sep 18, 2014 at 07:41:17PM -0700, Guenter Roeck wrote:
> On 09/18/2014 03:26 PM, Josh Cartwright wrote:
> >Add a driver for the watchdog timer block found in the Krait Processor
> >Subsystem (KPSS) on the MSM8960, APQ8064, and IPQ8064.
> >
> >Signed-off-by: Josh Cartwright
>
> Hi Josh,
>
Hi Tanmay,
On Wed, Sep 17, 2014 at 6:33 AM, Tanmay Inamdar wrote:
> This patch adds support for AppliedMicro X-Gene PCIe host controller. The
> driver is tested on X-Gene platform with different gen1/2/3 PCIe endpoint
> cards.
>
> X-Gene PCIe controller driver has depedency on the pcie arm64 arch
On 17:57-20140918, Thomas Gleixner wrote:
> On Thu, 18 Sep 2014, Nishanth Menon wrote:
> > +static irqreturn_t palmas_wake_irq(int irq, void *_palmas)
> > +{
> > + /*
> > +* Return Not handled so that interrupt is disabled.
>
> And how is that interrupt di
On 09/18/2014 03:26 PM, Josh Cartwright wrote:
Add a driver for the watchdog timer block found in the Krait Processor
Subsystem (KPSS) on the MSM8960, APQ8064, and IPQ8064.
Signed-off-by: Josh Cartwright
Hi Josh,
comments inline.
Thanks,
Guenter
---
drivers/watchdog/Kconfig| 10 +++
On 2014年09月18日 22:53, Daniel Vetter wrote:
On Thu, Sep 18, 2014 at 04:52:14PM +0200, Daniel Vetter wrote:
On Thu, Sep 18, 2014 at 05:36:31PM +0800, Mark yao wrote:
This patch adds the basic structure of a DRM Driver for Rockchip Socs.
Signed-off-by: Mark yao
---
Changes in v2:
- use the compo
On 14-09-18 03:54 PM, Hauke Mehrtens wrote:
On 09/19/2014 12:39 AM, Florian Fainelli wrote:
On 09/18/2014 03:31 PM, Hauke Mehrtens wrote:
On 09/16/2014 09:58 PM, Jonathan Richardson wrote:
Hi,
This patchset contains initial support for Broadcom's Cygnus SoC based on our
iProc architecture. In
On Thu, 18 Sep 2014, Nishanth Menon wrote:
> +static irqreturn_t palmas_wake_irq(int irq, void *_palmas)
> +{
> + /*
> + * Return Not handled so that interrupt is disabled.
And how is that interrupt disabled by returning IRQ_NONE? You mean it
gets disabled after it got reraised 10 tim
On 09/17/2014 12:03 PM, Catalin Marinas wrote:
> So for arm64 currently we have some hooks in dma-mapping.c to intercept
> when a device is added to a bus. What I need to do though is check
> recursively whether the parent (bus) had the 'dma-coherent' property
> (pointed out by Jon). I think somet
On 14-09-16 05:47 PM, Mark Rutland wrote:
> On Tue, Sep 16, 2014 at 08:58:13PM +0100, Jonathan Richardson wrote:
>> The iProc clock driver controls PLL's common across iProc chips. The
>
> Nit: s/PLL's/PLLs/ (we aren't greengrocers [1]).
Will fix.
>
>> cygnus driver controls cygnus specific fea
Hi Mark,
Thanks for the feedback.
On 14-09-16 05:00 PM, Mark Rutland wrote:
> On Tue, Sep 16, 2014 at 08:58:12PM +0100, Jonathan Richardson wrote:
>> Adds initial support for the Cygnus SoC based on Broadcom’s iProc series.
>>
>> Reviewed-by: Ray Jui
>> Reviewed-by: Desmond Liu
>> Reviewed-by:
On 09/19/2014 12:39 AM, Florian Fainelli wrote:
> On 09/18/2014 03:31 PM, Hauke Mehrtens wrote:
>> On 09/16/2014 09:58 PM, Jonathan Richardson wrote:
>>> Hi,
>>>
>>> This patchset contains initial support for Broadcom's Cygnus SoC based on
>>> our
>>> iProc architecture. Initial support is minimal
On Thursday, September 18, 2014 02:35:44 AM Ulf Hansson wrote:
> On 18 September 2014 01:43, Dmitry Torokhov wrote:
> > On Thu, Sep 18, 2014 at 01:20:49AM +0200, Ulf Hansson wrote:
> >> On 17 September 2014 22:10, Dmitry Torokhov
> >> wrote:
> >> > On Wed, Sep 17, 2014 at 08:25:44PM +0200, Ulf H
On 09/18/2014 03:31 PM, Hauke Mehrtens wrote:
> On 09/16/2014 09:58 PM, Jonathan Richardson wrote:
>> Hi,
>>
>> This patchset contains initial support for Broadcom's Cygnus SoC based on our
>> iProc architecture. Initial support is minimal and includes just the mach
>> platform code, clock driver,
On Thu, 18 Sep 2014 23:52:01 +0200
Hartmut Knaack wrote:
> Jacob Pan schrieb, Am 18.09.2014 01:13:
> > On Thu, 18 Sep 2014 00:20:00 +0200
> > Hartmut Knaack wrote:
> >
> >> Jacob Pan schrieb, Am 17.09.2014 02:11:
> >>> Platform driver for X-Powers AXP288 ADC, which is a sub-device of
> >>> the
This patchset provides support for the Watchdog Timer (WDT) found in the Krait
Processor Sub-system (KPSS) of the MSM8960, APQ8064, and IPQ8064 chips.
This driver is implemented ontop of WATCHDOG_CORE, and therefore its primary
interface is through userspace. The implemantion is currently very ba
Add a driver for the watchdog timer block found in the Krait Processor
Subsystem (KPSS) on the MSM8960, APQ8064, and IPQ8064.
Signed-off-by: Josh Cartwright
---
drivers/watchdog/Kconfig| 10 +++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/qcom-wdt.c | 145 +
The Qualcomm Krait Processor Sub-system (KPSS) contains one or more
instances of the WDT. Provide documentation on how to describe these in
the device tree.
Signed-off-by: Josh Cartwright
---
.../devicetree/bindings/watchdog/qcom-wdt.txt | 21 +
1 file changed, 21 inse
On 09/16/2014 09:58 PM, Jonathan Richardson wrote:
> Hi,
>
> This patchset contains initial support for Broadcom's Cygnus SoC based on our
> iProc architecture. Initial support is minimal and includes just the mach
> platform code, clock driver, and a basic device tree configuration. Peripheral
>
On Thu, Sep 18, 2014 at 02:27:59PM -0700, Doug Anderson wrote:
> On Thu, Sep 18, 2014 at 12:31 AM, Chris Zhong wrote:
> I would be tempted to say that you should add a few required properties:
> * regulator-boot-on
> * regulator-always-on
> * regulator-initial-microvolts
> From my understanding
Jacob Pan schrieb, Am 18.09.2014 01:13:
> On Thu, 18 Sep 2014 00:20:00 +0200
> Hartmut Knaack wrote:
>
>> Jacob Pan schrieb, Am 17.09.2014 02:11:
>>> Platform driver for X-Powers AXP288 ADC, which is a sub-device of
>>> the customized AXP288 PMIC for Intel Baytrail-CR platforms. GPADC
>>> device
Chris,
On Thu, Sep 18, 2014 at 12:31 AM, Chris Zhong wrote:
> Document the st-pwm regulator
>
> Signed-off-by: Chris Zhong
>
> ---
>
> Changes in v2:
> Adviced by Lee Jones
> - rename the documentation
> Adviced by Doug Anderson
> - update the example
> Adviced by Mark Rutland
> - remove pwm-reg
Chris,
On Thu, Sep 18, 2014 at 12:31 AM, Chris Zhong wrote:
> Get voltage & duty table from device tree might be better, other platforms
> can also use this
> driver without any modify.
>
> Signed-off-by: Chris Zhong
>
> eries-changes: 2
> Adviced by Lee Jones
> - rename the file
> - remove all
On 09/18/2014 10:03 PM, Rafał Miłecki wrote:
> On 16 September 2014 23:56, Hauke Mehrtens wrote:
>> +The cores on the AXI bus are auto detected by bcma. bcma automatically
>> +detects the cores
>
> I'm far from being an English expert, but above is kind of pleonasm to me ;)
Yes to me too. ;-)
>
On 09/18/2014 11:42 AM, Arend van Spriel wrote:
> On 09/17/14 17:10, Rafał Miłecki wrote:
>> On 16 September 2014 23:56, Hauke Mehrtens wrote:
>>> This driver is used by the bcm53xx ARM SoC code. Now it is possible to
>>> give the address of the chipcommon core in device tree and bcma will
>>> sea
Hi Sebastian,
On Thu, Aug 14, 2014 at 11:03 PM, Sebastian Reichel wrote:
> Hi Marek,
>
> On Mon, Aug 11, 2014 at 09:52:52PM +0200, Belisko Marek wrote:
>> can you please take this series (I'll post update version with
>> removing debug code). Thanks.
>
> mh. I will not pull this with "(dis)chargi
On 16 September 2014 23:56, Hauke Mehrtens wrote:
> +The cores on the AXI bus are auto detected by bcma. bcma automatically
> +detects the cores
I'm far from being an English expert, but above is kind of pleonasm to me ;)
> and the memory ranges they are using and they get
> +registered afterwa
With the recent pinctrl-single changes, SoCs such as OMAP family can
treat wake-up events from deeper low power states as interrupts.
This is usable when the wakeup from deeper low power states is
triggered by a different hardware mechanism tied to pinctrl compared
to the routine interrupt handlin
Use device@address as name for device nodes.
Suggested-by: Lee Jones
Signed-off-by: Nishanth Menon
---
V3: no change
V2: http://marc.info/?l=linux-kernel&m=140995036518562&w=2
Documentation/devicetree/bindings/mfd/palmas.txt |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
With the recent pinctrl-single changes, omaps can treat wake-up events
from deeper power states as interrupts.
This is to handle the case where the system needs two interrupt
sources when SoC is in deep sleep(1 to exit from deep power mode such
as sleep, and other from the module handling the act
Hi,
V3 update for the previous series:
Changes in V3 (from review updates):
- Allow driver to function even if wakeirq fails
- Fix irq flags
V2: http://marc.info/?l=linux-kernel&m=140995041418575&w=2
v1: https://patchwork.kernel.org/patch/4743321/
Nishanth Menon (3):
Documentati
On Thu, Sep 18, 2014 at 06:07:40AM +0100, Michal Simek wrote:
> On 09/17/2014 06:17 PM, Mark Rutland wrote:
> > On Wed, Sep 17, 2014 at 03:30:49PM +0100, Michal Simek wrote:
> >> From: Peter Crosthwaite
> >>
> >> Modern TTC implementations can extend the timer width to 32 bit. This
> >> feature is
On 09/18/2014 11:25 AM, Jean-Francois Moine wrote:
> On Thu, 18 Sep 2014 00:13:09 +0300
> Jyri Sarha wrote:
>
>>> So, Jean-Francois is also trying to do things with the TDA998x - what's
>>> the story with that, is this joined up at all?
>>
>> Not really. This basic functionality does not touch td
On Thu, Sep 18, 2014 at 03:21:27AM +0100, Robin Gong wrote:
> On Wed, Sep 17, 2014 at 06:52:44PM +0100, Mark Rutland wrote:
> > On Wed, Sep 17, 2014 at 10:57:59AM +0100, Robin Gong wrote:
> > > This driver register pm_power_off with snvs power off function. If
> > > your boards NOT use PMIC_ON_REQ
On Thu, 18 Sep 2014, Nishanth Menon wrote:
> On 09/08/2014 10:41 AM, Nishanth Menon wrote:
> > On 23:13-20140905, Thomas Gleixner wrote:
> >> On Fri, 5 Sep 2014, Nishanth Menon wrote:
> >>> + if (!palmas->wakeirq)
> >>> + goto no_wake_irq;
> >>> +
> >>> + ret = devm_request_irq(palmas->dev
On Thu, Sep 18, 2014 at 04:19:26PM +0200, Tomeu Vizoso wrote:
> On 18 September 2014 15:25, Caesar Wang wrote:
> > Tomeu,
> >
> > 在 2014年09月18日 17:27, Tomeu Vizoso 写道:
> >>
> >> On 17 September 2014 05:59, Caesar Wang
> >> wrote:
> >>>
> >>> This add the necessary binding documentation for the th
Add Keystone IRQ controller IP node which allows ARM
CorePac core to receive signals from DSP cores.
Signed-off-by: Grygorii Strashko
---
arch/arm/boot/dts/keystone.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
Hi Santosh,
This serie contains fix of SPI nodes DT defintions for Keystone K2L SoC.
Also It adds DT definitions for Keystone 2 DSP GPIO and IRQ controllers.
Grygorii Strashko (2):
ARM: dts: keystone: add keystone irq controller node
ARM: dts: keystone: add dsp gpio controllers nodes
Mura
From: Murali Karicheri
There are 5 chip selects per SPI0 and SPI2 and 3 per SPI1. SPI2 needs
to be pinned out to use and by default they are disabled. So keep the
state disabled to reflect default.
Signed-off-by: Murali Karicheri
Signed-off-by: Grygorii Strashko
---
arch/arm/boot/dts/k2l.dtsi
Add Keystone 2 DSP GPIO nodes for SoCs:
k2hk:
DSP GPIO banks 0-7 correspond to DSP0-DSP7
k2l:
DSP GPIO banks 0-3 correspond to DSP0-DSP3
k2e:
DSP GPIO bank 0 corresponds to DSP0
Signed-off-by: Grygorii Strashko
---
arch/arm/boot/dts/k2e.dtsi | 7 ++
arch/arm/boot/dts/k2hk.dtsi | 56
Hi Caesar,
On Thu, Sep 18, 2014 at 04:31:24PM +0800, Caesar Wang wrote:
> Dear Dmitry,
>
>
> 在 2014年09月18日 01:02, Dmitry Torokhov 写道:
> >Hi Caesar,
> >
> >On Wed, Sep 17, 2014 at 11:59:10AM +0800, Caesar Wang wrote:
> >>+{
> >>+ int i;
> >>+
> >>+ for (i = 0; i < ARRAY_SIZE(v2_code_table) -
* Nishanth Menon [140917 07:26]:
> On 08:39-20140903, Nishanth Menon wrote:
> > On 08/19/2014 08:54 AM, Nishanth Menon wrote:
> > > From: Lucas Weaver
> > >
> > > DRA74x and DRA72x family of processors vary slightly in the number
> > > of CPUs. So, add different instances of PMU for each of thes
On Fri, Sep 12, 2014 at 04:26:30PM +0100, Naveen Krishna Chatradhi wrote:
> From: Alim Akhtar
>
> This patch adds the necessary Kconfig entries to enable
> support for the ARMv8 based Exynos7 SoC.
>
> Signed-off-by: Alim Akhtar
> Signed-off-by: Naveen Krishna Chatradhi
> Cc: Rob Herring
> Cc:
On Wed, 20 Aug 2014, Romain Baeriswyl wrote:
> From: Romain Baeriswyl
>
> Some legacy devices support ony I2C standard mode at 100kHz.
> This patch allows to select the standard mode through the DTS
> with the use of the existing clock-frequency parameter.
>
> When clock-frequency parameter is
* Dmitry Lifshitz [140917 05:10]:
> Add CM-T54 DT nodes:
>
> * enable HDMI/DVI/LCD video output support
> * add ADS7846 touchscreen support
> * enchance DWC3 setup to enable power supply for USB3.0 OTG port
>
> v2: * Fixed comment style issue for mux mode.
> Follow the convention mode0_nam
On Thu, Sep 18, 2014 at 05:36:31PM +0800, Mark yao wrote:
> This patch adds the basic structure of a DRM Driver for Rockchip Socs.
>
> Signed-off-by: Mark yao
> ---
> Changes in v2:
> - use the component framework to defer main drm driver probe
> until all VOP devices have been probed.
> - use
On Thu, Sep 18, 2014 at 04:52:14PM +0200, Daniel Vetter wrote:
> On Thu, Sep 18, 2014 at 05:36:31PM +0800, Mark yao wrote:
> > This patch adds the basic structure of a DRM Driver for Rockchip Socs.
> >
> > Signed-off-by: Mark yao
> > ---
> > Changes in v2:
> > - use the component framework to def
looks like previous email not had the email ids added by kumar gala.
adding the missing ids and sending again.
On Thu, Sep 18, 2014 at 9:32 AM, Ganapatrao Kulkarni
wrote:
> On Thu, Sep 18, 2014 at 4:42 AM, Zi Shen Lim wrote:
>> On Wed, Sep 17, 2014 at 2:48 PM, Nathan Lynch
>> wrote:
>>> On 09/
On 18 September 2014 15:25, Caesar Wang wrote:
> Tomeu,
>
> 在 2014年09月18日 17:27, Tomeu Vizoso 写道:
>>
>> On 17 September 2014 05:59, Caesar Wang
>> wrote:
>>>
>>> This add the necessary binding documentation for the thermal
>>> found on Rockchip SoCs
>>
>> Hi Caesar,
>>
>> is there any reason to n
On 18/09/14 05:37, Bjorn Andersson wrote:
On Wed, Sep 17, 2014 at 2:49 PM, Srinivas Kandagatla
wrote:
On 17/09/14 20:18, Josh Cartwright wrote:
On Wed, Sep 17, 2014 at 12:03:37PM -0700, Kumar Gala wrote:
[..]
Hmm, this doesn?t seem to work for me.
I don't see how it could with qcom_d
On 09/08/2014 10:41 AM, Nishanth Menon wrote:
> On 23:13-20140905, Thomas Gleixner wrote:
>> On Fri, 5 Sep 2014, Nishanth Menon wrote:
>>> + if (!palmas->wakeirq)
>>> + goto no_wake_irq;
>>> +
>>> + ret = devm_request_irq(palmas->dev, palmas->wakeirq,
>>> + pa
Tomeu,
在 2014年09月18日 17:27, Tomeu Vizoso 写道:
On 17 September 2014 05:59, Caesar Wang wrote:
This add the necessary binding documentation for the thermal
found on Rockchip SoCs
Hi Caesar,
is there any reason to not use the existing thermal bindings? You can
find a description in
Documentation
The current ADC is peripheral of Qualcomm SPMI PMIC chips. It has
16 bits resolution and register space inside PMIC accessible across
SPMI bus.
The driver registers itself through IIO interface.
Signed-off-by: Ivan T. Ivanov
---
.../devicetree/bindings/iio/adc/qcom,spmi-iadc.txt | 61 ++
drive
Sorry I just saw some more issues:
On 17/09/14 16:24, Joe.C wrote:
> From: "Joe.C"
>
> Add MT8127 & MT8135 from Mediatek.
>
> Signed-off-by: Joe.C
> ---
> Documentation/devicetree/bindings/arm/mediatek.txt | 9 ++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/Docu
On 17/09/14 16:24, Joe.C wrote:
> From: "Joe.C"
>
> Enable low-level debug for Mediatek mt8127 & mt8135 SoC.
>
> Signed-off-by: Joe.C
> ---
> arch/arm/Kconfig.debug | 20
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
On Thu, Sep 18, 2014 at 12:35:32PM +0100, Robin Murphy wrote:
> On 17/09/14 19:05, Will Deacon wrote:
> > On Wed, Sep 17, 2014 at 06:47:19PM +0100, Rob Herring wrote:
> >> On Wed, Sep 17, 2014 at 12:03 PM, Will Deacon wrote:
> >>> On Wed, Sep 17, 2014 at 12:56:07PM +0100, Robin Murphy wrote:
> >>>
On Wed, 17 Sep 2014 22:39:26 -0700
Lee Jones wrote:
> On Tue, 16 Sep 2014, Jacob Pan wrote:
>
> > X-Powers AXP288 is a customized PMIC for Intel Baytrail-CR
> > platforms. Similar to AXP202/209, AXP288 comes with USB charger,
> > more LDO and BUCK channels, and AD converters. It also provides
>
Thanks Catalin/Will/Rob,
On 17/09/14 19:05, Will Deacon wrote:
On Wed, Sep 17, 2014 at 06:47:19PM +0100, Rob Herring wrote:
On Wed, Sep 17, 2014 at 12:03 PM, Will Deacon wrote:
On Wed, Sep 17, 2014 at 12:56:07PM +0100, Robin Murphy wrote:
Commit 591c1e ("of: configure the platform device dma
Add compatible string for BAM v1.3.0 in the DT bindings documentation. Mentioned
a few more SoCs which have BAM v1.4.0 in them.
Cc: devicetree@vger.kernel.org
Signed-off-by: Archit Taneja
---
Documentation/devicetree/bindings/dma/qcom_bam_dma.txt | 4 +++-
1 file changed, 3 insertions(+), 1 dele
Hi Jonathan,
On 09/15/2014 07:11 PM, Jonathan Cameron wrote:
>
>
> On September 15, 2014 3:12:50 PM GMT+01:00, Stanimir Varbanov
> wrote:
>> Hi Jonathan,
>>
>> Thanks for the review!
>>
>> On 09/13/2014 08:27 PM, Jonathan Cameron wrote:
>>> On 13/09/14 00:27, Hartmut Knaack wrote:
Stanimi
Hi Ajay,
On Wednesday 17 September 2014 15:43:04 Ajay kumar wrote:
> Hi Laurent,
>
> Please find the latest series here:
> http://www.spinics.net/lists/dri-devel/msg66740.html
Thank you. My comment was meant to be general though, not just for your patch
series.
> On Wed, Sep 17, 2014 at 3:23 P
This adds support for Rockchip soc edp found on rk3288
Signed-off-by: Mark Yao
Signed-off-by: Jeff Chen
---
change in v2:
- fix code sytle
- use some define from drm_dp_helper.h
- use panel-simple driver for primary display.
- remove unnecessary clock clk_24m_parent.
drivers/gpu/drm/rockchip/K
On 09/17/14 17:10, Rafał Miłecki wrote:
On 16 September 2014 23:56, Hauke Mehrtens wrote:
This driver is used by the bcm53xx ARM SoC code. Now it is possible to
give the address of the chipcommon core in device tree and bcma will
search for all the other cores.
Did you get any answer from Are
Add binding documentation for Rockchip SoC EDP driver.
Signed-off-by: Jeff Chen
Signed-off-by: Mark Yao
---
changes in v2:
- add edp reset
- add panel node
- add port for display-subsystem
.../devicetree/bindings/video/rockchip-edp.txt | 50
1 file changed, 50 insert
This adds binding documentation for Rockchip SoC VOP driver.
Signed-off-by: Mark Yao
---
changes in v2:
- rename "lcdc" to "vop"
- add vop reset
- add iommu node
- add port for display-subsystem
.../devicetree/bindings/video/rockchip-vop.txt | 58
1 file changed, 58 i
This add a display subsystem comprise the all display interface nodes.
Signed-off-by: Mark Yao
---
changes in v2:
- add DRM master device node to list all display nodes that comprise
the graphics subsystem.
.../devicetree/bindings/video/rockchip-drm.txt | 19 +++
1 file
This patch adds the basic structure of a DRM Driver for Rockchip Socs.
Signed-off-by: Mark yao
---
Changes in v2:
- use the component framework to defer main drm driver probe
until all VOP devices have been probed.
- use dma-mapping API with ARM_DMA_USE_IOMMU, create dma mapping by
master dev
From: mark yao
This a series of patches is a DRM Driver for Rockchip Socs, add support
for vop devices, eDP. Future patches will add additional encoders/connectors,
such as HDMI.
The basic "crtc" for rockchip is a "VOP" - Video Output Processor.
the vop devices found on Rockchip rk3288 Soc, rk32
On 17 September 2014 05:59, Caesar Wang wrote:
> This add the necessary binding documentation for the thermal
> found on Rockchip SoCs
Hi Caesar,
is there any reason to not use the existing thermal bindings? You can
find a description in
Documentation/devicetree/bindings/thermal/thermal.txt and
This patch make some change to unflatten_dt_node(), make sure the
device_node don't reference to fdt raw blob memory, so that we can
free the raw blob reserved memory after initcalls.
Signed-off-by: Yalin Wang
---
drivers/of/fdt.c | 27 +++
include/linux/of_fdt.h |
Dear Dmitry,
在 2014年09月18日 01:02, Dmitry Torokhov 写道:
Hi Caesar,
On Wed, Sep 17, 2014 at 11:59:10AM +0800, Caesar Wang wrote:
Thermal is TS-ADC Controller module supports
user-defined mode and automatic mode.
User-defined mode refers,TSADC all the control signals entirely by
software writing
On Thu, 18 Sep 2014 00:13:09 +0300
Jyri Sarha wrote:
> > So, Jean-Francois is also trying to do things with the TDA998x - what's
> > the story with that, is this joined up at all?
>
> Not really. This basic functionality does not touch tda998x at all on
> the fly, but just sets i2s configuation
Hi, Brain
On 9/18/2014 8:32 AM, Brian Norris wrote:
On Mon, Aug 18, 2014 at 03:08:40PM +0800, Josh Wu wrote:
If there is no PMECC lookup table stored in ROM, or lookup table offset is
not specified, PMECC driver should build it in DDR by itself.
That make the PMECC driver work for some board w
Document the st-pwm regulator
Signed-off-by: Chris Zhong
---
Changes in v2:
Adviced by Lee Jones
- rename the documentation
Adviced by Doug Anderson
- update the example
Adviced by Mark Rutland
- remove pwm-reg-period
.../bindings/regulator/pwm-regulator.txt | 29 +
Get voltage & duty table from device tree might be better, other platforms can
also use this
driver without any modify.
Signed-off-by: Chris Zhong
eries-changes: 2
Adviced by Lee Jones
- rename the file
- remove all the prefix st_
- add depend on PWM in Kconfig
---
Changes in v2: None
driver
get voltage & duty table from device tree might be better, other platforms can
also use this
driver without any modify.
Tested on a rk3288 sdk board as logic voltage regulator.
Changes in v2:
Adviced by Lee Jones
- rename the documentation
Adviced by Doug Anderson
- update the example
Adviced by
For many drivers which will support rich endianness of Devices
need define DT properties by itself with the binding support.
The regmap core has already support endianness of the following
case:
Index Device DT properties needed
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