hi,
On Saturday 13 December 2014 05:49 AM, Doug Anderson wrote:
> Yunzhi,
>
> On Fri, Dec 12, 2014 at 7:07 AM, Yunzhi Li wrote:
>> This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
>> currently this driver can support RK3288. The RK3288 SoC have
>> three independent USB PHY IPs which
Hi,
On Sat, Dec 13, 2014 at 2:25 AM, VishnuPatekar
wrote:
> 1. Please note that ps20 pins conflict with HDMI on Lime2 Board
> so, by deault ps20 and ps21 are disabled for Lime2 Board.
> There is no on board ps2 connector and these pins can be used
> for different purpose.
>
> Signed-off-by: Vishn
Signed-off-by: Silvio Fricke
CC: Thomas Gleixner
CC: Jason Cooper
CC: Marc Zyngier
---
arch/arm/boot/dts/tegra30-apalis.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi
b/arch/arm/boot/dts/tegra30-apalis.dtsi
index a5446cb..c2a7528 100644
--- a/arc
Signed-off-by: Silvio Fricke
CC: Thomas Gleixner
CC: Jason Cooper
CC: Marc Zyngier
---
arch/arm/boot/dts/imx53-m53.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx53-m53.dtsi b/arch/arm/boot/dts/imx53-m53.dtsi
index 87a7fc7..8a5acb5 100644
--- a/arch/arm/boot/dts/i
Signed-off-by: Silvio Fricke
CC: Thomas Gleixner
CC: Jason Cooper
CC: Marc Zyngier
---
arch/arm/boot/dts/spear1310-evb.dts | 1 -
arch/arm/boot/dts/spear1340-evb.dts | 2 --
arch/arm/boot/dts/spear320-hmi.dts | 3 ---
3 files changed, 6 deletions(-)
diff --git a/arch/arm/boot/dts/spear1310-e
Hi,
I have found some dts entries which are not evaluated by the drivers. This
patch remove this entries from the dts files.
Jason has mentioned I should CC: Thomas, Marc and him self to this mails.
thanks and best regards,
Silvio
Silvio Fricke (3):
ARM: mx5: dts: remove unused irq-trigger en
Yunzhi,
On Fri, Dec 12, 2014 at 7:07 AM, Yunzhi Li wrote:
> This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
> currently this driver can support RK3288. The RK3288 SoC have
> three independent USB PHY IPs which are all configured through a
> set of registers located in the GRF (gener
Hi Mark,
Thanks for review.
Mark Brown wrote on 12.12.2014 17:36:
On Wed, Dec 10, 2014 at 04:48:19PM +0100, Andrzej Hajda wrote:
track is a generic framework for safe tracking presence of any kernel objects
having an id. There are no special requirements about type of object or its
id. Id shal
Add GPIO hogging documentation to gpio.txt
Signed-off-by: Benoit Parrot
---
Changes since v3:
* Renamed the "direction" DT properties to "state".
Documentation/devicetree/bindings/gpio/gpio.txt | 23 +++
1 file changed, 23 insertions(+)
diff --git a/Documentation/devicetre
This function was renamed to mips_cpu_irq_of_init(), so fix it to avoid
a compile error.
Signed-off-by: Kevin Cernekee
---
arch/mips/bcm3384/irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/bcm3384/irq.c b/arch/mips/bcm3384/irq.c
index 0fb5134..fd94fe8 100644
-
V4->V5:
- Rebase on top of Linus' head of tree, converting BCM3384 platform code
to Generic BMIPS platform code.
- Fix a couple of #include's
- Remove a couple of bogus entries from bmips_be_defconfig
Compile-tested only. Some BMIPS platforms may require acked-but-unmerged
changes in oth
11 platforms require at least one of these workarounds to be enabled; 22
platforms do not. In the latter case we can fall back to a generic version.
Note that this also deletes an orphaned reference to RM9000_CDEX_SMP_WAR.
Suggested-by: Arnd Bergmann
Signed-off-by: Kevin Cernekee
---
arch/mip
This platform is configured primarily through device tree, and we can
reuse the same code to support a bunch of other chips. Change the name
to reflect this.
Signed-off-by: Kevin Cernekee
---
arch/mips/Kbuild.platforms | 2 +-
arch/mips/Kconfig
Several drivers now use this API, including the ARM GIC driver, so remove
the outdated comment.
Signed-off-by: Kevin Cernekee
---
Documentation/IRQ-domain.txt | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/Documentation/IRQ-domain.txt b/Documentation/IRQ-domain.txt
index 3
The BCM7xxx instances of this block (listed in the register manual as
simply "IRQ0") all have the following items in common:
- brcm,int-map-mask: for routing different bits in the L2 to different
parent IRQs
- brcm,int-fwd-mask: for hardwiring certain IRQs to bypass the L2 and
use dedicat
Currently the driver assumes that REG_BASE+0x00 is the IRQ enable mask,
and REG_BASE+0x04 is the IRQ status mask. This is true on BCM3384 and
BCM7xxx, but it is not true for some of the controllers found on BCM63xx
chips. So we will change a couple of key assumptions:
- Don't assume that both t
From: Brian Norris
Wakeable interrupts might be pending at boot/init time, because wakeup
interrupts might have triggered a resume from S5. So don't clear such
wakeups.
This means that any driver which requests a wakeable interrupt bit
should be prepared to handle an interrupt as soon as they ca
If the machine doesn't set its own _machine_restart callback, call the
common do_kernel_restart() instead. This allows arch-independent reset
drivers from drivers/power/reset/ to be used to reboot the machine.
Signed-off-by: Kevin Cernekee
---
arch/mips/kernel/reset.c | 2 ++
1 file changed, 2
These controllers support multiple enable/status pairs (64+ IRQs),
can put the enable/status words at different offsets, and do not
support multiple parent IRQs.
Signed-off-by: Kevin Cernekee
---
.../interrupt-controller/brcm,bcm3380-l2-intc.txt | 41
drivers/irqchip/irq-bcm712
Enabling support for more than one BMIPS CPU in the same build may
result in different L1_CACHE_SHIFT values, e.g.
CPU_BMIPS5000 selects MIPS_L1_CACHE_SHIFT_7
CPU_BMIPS4380 selects MIPS_L1_CACHE_SHIFT_6
anything else defaults to MIPS_L1_CACHE_SHIFT_5
Ensure that if more than one MIPS_
This is the main peripheral IRQ controller on the BCM7xxx MIPS chips;
it has the following characteristics:
- 64 to 160+ level IRQs
- Atomic set/clear registers
- Reasonably predictable register layout (N status words, then N
mask status words, then N mask set words, then N mask clear words)
Some machines only have one bus type to register (e.g. "simple-bus").
Signed-off-by: Kevin Cernekee
---
arch/mips/kernel/prom.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c
index 452d435..e303cb1 100644
--- a/arch/mips/
BMIPS 3300/435x/438x CPUs have a readahead cache that is separate from
the L1/L2. During a DMA operation, accesses adjacent to a DMA buffer
may cause parts of the DMA buffer to be prefetched into the RAC. To
avoid possible coherency problems, flush the RAC upon DMA completion.
Signed-off-by: Kev
This is a more standardized way of handling DMA remapping, and it is
suitable for the memory map found on BCM3384.
Signed-off-by: Kevin Cernekee
---
arch/mips/bmips/dma.c | 100 ++
1 file changed, 68 insertions(+), 32 deletions(-)
diff --git a/arc
BCM3384/BCM63xx can use the common drivers/irqchip/irq-bcm7120-l2.c for
this purpose; BCM7xxx will use drivers/irqchip/irq-bcm7038-l1.c. We no
longer need this code under arch/mips.
Signed-off-by: Kevin Cernekee
---
.../devicetree/bindings/mips/brcm/bcm3384-intc.txt | 37
arch/mips/bmips/
A couple of chips require special handling in order to make SMP secondary
boot and/or exception vectors work correctly. Take care of these in
setup.c.
Signed-off-by: Kevin Cernekee
---
arch/mips/bmips/setup.c | 101 +++-
1 file changed, 99 insertions(
There is no "bcm3384" bus so let's just remove it to avoid confusion.
Signed-off-by: Kevin Cernekee
---
arch/mips/bmips/setup.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/bmips/setup.c b/arch/mips/bmips/setup.c
index 5099109..ac402ed 100644
--- a/arch/mips/bmip
Add a new section covering the Generic BMIPS machine type.
Signed-off-by: Kevin Cernekee
---
Documentation/devicetree/booting-without-of.txt | 28 +
1 file changed, 28 insertions(+)
diff --git a/Documentation/devicetree/booting-without-of.txt
b/Documentation/devicetree/
Also, add an LE defconfig for set-top box (BCM7xxx). This will allow the
BMIPS kernel to run on several non-BCM3384 platforms.
Signed-off-by: Kevin Cernekee
---
arch/mips/Kconfig | 18 +--
arch/mips/configs/bmips_be_defconfig | 9 +++-
arch/mips/configs/bmips_stb_defco
This will be required to support BMIPS3300 platforms.
Signed-off-by: Kevin Cernekee
---
arch/mips/include/asm/mach-bmips/spaces.h | 18 ++
1 file changed, 18 insertions(+)
create mode 100644 arch/mips/include/asm/mach-bmips/spaces.h
diff --git a/arch/mips/include/asm/mach-bmips
Most of the supported chips use legacy (non-DT) bootloaders, so they will
need to select an appropriate builtin DTB at compile time until the
bootloader is updated. Provide suitable DTS files, and a means to compile
one of them into the kernel image.
Signed-off-by: Kevin Cernekee
---
arch/mips/
Add an entry for each supported Broadcom SoC.
Signed-off-by: Kevin Cernekee
---
Documentation/devicetree/bindings/mips/brcm/cm-dsl.txt | 11 ---
Documentation/devicetree/bindings/mips/brcm/soc.txt| 12
2 files changed, 12 insertions(+), 11 deletions(-)
delete mode 10064
The DT bindings for this platform have changed as the bootloader and
product requirements evolved. In particular, there are both
Linux-on-Zephyr and Linux-on-Viper configurations.
Signed-off-by: Kevin Cernekee
---
arch/mips/boot/dts/bcm3384.dtsi| 109
arch/m
Based on Boris Brezillion's work this is a reworked patch
of his initial GPIO hogging mechanism.
This patch provides a way to initally configure specific GPIO
when the gpio controller is probed.
The actual DT scanning to collect the GPIO specific data is performed
as part of the gpiochip_add().
T
This patch set re-introduces the gpio hogging concept first
presented by Boris Brezillion.
This patch set provides a way to initally configure specific GPIO
when the gpio controller is probed.
The actual DT scanning to collect the GPIO specific data is performed
as part of the of_gpiochip_add().
On 11/26/2014 03:51 PM, Arnd Bergmann wrote:
> On Wednesday 26 November 2014 15:38:09 Dave Gerlach wrote:
>> +
>> +static const struct wkup_m3_wakeup_src wakeups[] = {
>> + {.irq_nr = 35, .src = "USB0_PHY"},
>> + {.irq_nr = 36, .src = "USB1_PHY"},
>> + {.irq_nr = 40, .src = "I2
Add PFC support for the EMMA Mobile EV2 SoC including pin groups for
on-chip devices.
Signed-off-by: Niklas Söderlund
---
.../bindings/pinctrl/renesas,pfc-pinctrl.txt |1 +
drivers/pinctrl/sh-pfc/Kconfig |5 +
drivers/pinctrl/sh-pfc/Makefile|
With this information all GPIOs can make use of the PFC functionality.
Signed-off-by: Niklas Söderlund
---
arch/arm/boot/dts/emev2.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
index cc7bfe0..518b7fa 100644
--- a
Configure the pinmux on kzm9d to use the serial connector for uart1.
Signed-off-by: Niklas Söderlund
---
arch/arm/boot/dts/emev2-kzm9d.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts
b/arch/arm/boot/dts/emev2-kzm9d.dts
index 667d323..daf1
Used to define pinmux configurations where the pinmux function have no
representation in the configuration registers but instead solely depends
on a group selection.
Signed-off-by: Niklas Söderlund
---
drivers/pinctrl/sh-pfc/sh_pfc.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/
Greetings,
This patchset introduces pinmux support for the EMMA Mobile EV2 board to
the sh-pfc pin-controller driver. Devicetree bindings for gpio and the
populated serial connector are also defined in 3/4 and 4/4.
Comments are welcome!
Regards
// Niklas
Niklas Söderlund (4):
sh-pfc: add macr
On Thu, Dec 11, 2014 at 06:45:50PM +0100, Sylwester Nawrocki wrote:
> +Optional Properties:
>
> - samsung,idma-addr: Internal DMA register base address of the audio
>sub system(used in secondary sound source).
> - pinctrl-0: Should specify pin control groups used for this controller.
> - p
Signed-off-by: Bjorn Andersson
---
Documentation/devicetree/bindings/mmc/mmc.txt | 2 ++
drivers/mmc/host/sdhci-pltfm.c| 3 +++
2 files changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt
b/Documentation/devicetree/bindings/mmc/mmc.txt
index b5262
W dniu 2014-12-12 o 11:47, Philipp Zabel pisze:
Some board designers, when running out of clock output pads, decide to
(mis)use PWM output pads to provide a clock to external components.
This driver supports this practice by providing an adapter between the
PWM and clock bindings in the device t
Added the pinmuxing options for Allwinner A10 and A20.
Signed-off-by: VishnuPatekar
---
arch/arm/boot/dts/sun4i-a10.dtsi | 14 ++
arch/arm/boot/dts/sun7i-a20.dtsi | 14 ++
2 files changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot
1. Please note that ps20 pins conflict with HDMI on Lime2 Board
so, by deault ps20 and ps21 are disabled for Lime2 Board.
There is no on board ps2 connector and these pins can be used
for different purpose.
Signed-off-by: VishnuPatekar
---
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts |6 +
1. dt bindings should use the compat string for the earliest version of the
hardware which has the relevant hardware block, unless there are differences,
the A10 and A20 ps2 controllers are identical, so for both sun4i-a10-ps2
should be used as compat string.
2. ps2 / serio bindings belong under Do
Signed-off-by: VishnuPatekar
---
drivers/input/serio/Kconfig | 11 ++
drivers/input/serio/Makefile|1 +
drivers/input/serio/sun4i-ps2.c | 362 +++
3 files changed, 374 insertions(+)
create mode 100644 drivers/input/serio/sun4i-ps2.c
diff --git
1) Fixup the sun4i ps/2 nodes interrupt property, sun4i interrupts take
only 1 specifier
2) dt bindings should use the compat string for the earliest version of the
hardware which has the relevant hardware block, unless there are differences,
the A10 and A20 ps2 controllers are identical, so for b
Avoid printing the error message in the EPROBE_DEFER case
where registering cpu cooling at db8500 thermal driver.
Cc: Zhang Rui
Cc: Grant Likely
Cc: Rob Herring
Cc: linux...@vger.kernel.org
Cc: linux-ker...@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Eduardo Valentin
---
dri
v2 --> v3
1. changed config to SERIO_SUN4I_PS2 from SERIO_SUNXI_PS2
2. changed driver name to sun4i-ps2 from sunxi-ps2.
3. changed the function names to sun4i_ps2_*.
4. added locking in sun4i_ps2_open.
5. kept compatible "sun4i-a10-ps2" for A10 and A20, as A10 is earlier SOC.
6. corrected the style
On 12/12/14 15:58, Nikolaus Schulz wrote:
> On Sat, Dec 06, 2014 at 12:36:19PM +0100, Hartmut Knaack wrote:
>> Nikolaus Schulz schrieb am 24.11.2014 um 20:50:
>>> The TI DAC8554 is a quad-channel Digital-to-Analog Converter with an SPI
>>> interface.
>>>
>>> Changes in v2:
>>> * Use DMA-safe buffer
Hi Kevin,
On Monday 08 September 2014 13:13:25 Kevin Hilman wrote:
> Laurent Pinchart writes:
> > On Monday 28 July 2014 23:52:34 Grant Likely wrote:
> >> On Mon, Jul 28, 2014 at 11:47 AM, Grygorii Strashko wrote:
> >> > On 07/28/2014 05:05 PM, Grant Likely wrote:
> >> >> On Thu, 12 Jun 2014 19:5
On Fri, 12 Dec 2014 08:59:44 +1100
, NeilBrown
wrote:
> This uart-attatched GPS device has a toggle which turns
> both on and off. For reliable use we need to know what
> start it is in.
>
> So it registers with the tty for recv events when the tty
> is open, and optionally configures the RX pi
On Fri, 12 Dec 2014 08:59:44 +1100
, NeilBrown
wrote:
> The regulator is identified in devicetree as 'vdd-supply'
>
> Signed-off-by: NeilBrown
> ---
> .../devicetree/bindings/serial/slave-reg.txt | 18
> drivers/tty/Kconfig|2
> drivers/tty/Mak
On Tue, 9 Dec 2014 01:24:09 +0800
, Tsung-Han Lin
wrote:
> Add dummy implementation of 'of_find_all_nodes',
> and remove the unnecessary 'of_can_translate_address',
> which is already removed in commit
> d9c6866be8a145e32da616d8dcbae806032d75b5 ("of: kill off
> of_can_translate_address"), to fix
On Fri, 12 Dec 2014 08:59:44 +1100
, NeilBrown
wrote:
> A "tty slave" is a device connected via UART.
> It may need a driver to, for example, power the device on
> when the tty is opened, and power it off when the tty
> is released.
Some nit picking below, mostly about avoiding nasty surprises o
Hi Grygorii,
I've found this mail deep inside my inbox :-)
On Wednesday 30 July 2014 16:25:31 Grygorii Strashko wrote:
> On 07/30/2014 03:06 AM, Laurent Pinchart wrote:
> > On Monday 28 July 2014 23:52:34 Grant Likely wrote:
> >> On Mon, Jul 28, 2014 at 11:47 AM, Grygorii Strashko wrote:
> >>> On
On Friday 12 December 2014 19:14:01 Stanimir Varbanov wrote:
> +config ARCH_APQ8084
> + bool "Enable support for APQ8084"
> + select HAVE_ARM_ARCH_TIMER
> + select PCI
> + select PCI_DOMAINS
> + select PCI_MSI
> +
I would prefer not to see 'select PCI' here. Also the
On Friday 12 December 2014 19:14:00 Stanimir Varbanov wrote:
> The PCIe driver reuse the Designware common code for host
> and MSI initialization, and also program the Qualcomm
> application specific registers.
>
> Signed-off-by: Stanimir Varbanov
Looks nice!
> +static int
> +qcom_pcie_rd_own_c
Add a PCIe PHY driver used by PCIe host controller driver
on Qualcomm SoCs like Snapdragon 805.
Signed-off-by: Stanimir Varbanov
---
drivers/phy/Kconfig |7 +
drivers/phy/Makefile|1 +
drivers/phy/phy-qcom-pcie.c | 311 +++
3 files
On 12/12/2014 5:05 AM, Alexandre Courbot wrote:
On Fri, Dec 12, 2014 at 9:08 PM, Arnd Bergmann wrote:
On Thursday 11 December 2014 16:05:04 Ray Jui wrote:
+
+- linux,gpio-base:
+Base GPIO number of this controller
+
We've NAK'ed properties like this multiple times before, and it
doesn
The PCIe driver reuse the Designware common code for host
and MSI initialization, and also program the Qualcomm
application specific registers.
Signed-off-by: Stanimir Varbanov
---
drivers/pci/host/Kconfig |9 +
drivers/pci/host/Makefile|1 +
drivers/pci/host/pcie-qcom.c | 415 +
This adds Snapdragon 805 ARM-based SoC as multiplatform
compatible platform.
Signed-off-by: Stanimir Varbanov
---
arch/arm/mach-qcom/Kconfig |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-qcom/Kconfig b/arch/arm/mach-qcom/Kconfig
index ee5697b..b8abe
Document Qualcomm PCIe driver devicetree bindings.
Signed-off-by: Stanimir Varbanov
---
.../devicetree/bindings/pci/qcom,pcie.txt | 159
1 files changed, 159 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.txt
diff
Document Qualcomm PCIe PHY devicetree bindings.
Signed-off-by: Stanimir Varbanov
---
.../devicetree/bindings/phy/qcom-pcie-phy.txt | 62
1 files changed, 62 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/qcom-pcie-phy.txt
diff
This patchset introduces a Qualcomm PCIe root complex driver for
Snapdragon 805 (APQ8084). It also adds a PCIe PHY driver in generic
phy framework. The PCIe hardware use Designware IP core plus
Qualcomm application specific hw.
The first two patches add a PHY driver binding document and the
PHY d
On Friday 12 December 2014 08:53:44 Ray Jui wrote:
>
> On 12/12/2014 4:14 AM, Arnd Bergmann wrote:
> > On Thursday 11 December 2014 18:36:54 Ray Jui wrote:
> >> index 000..040bc0f
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
> >> @@ -0,0 +1,74 @@
> >>
On Wed, 10 Dec 2014, Michal Simek wrote:
Hi Michal,
Thanks for the review comments. I have incorporated most of them.
A few questions below.
> > --- /dev/null
> > +++ b/drivers/staging/fpga/Kconfig
> > @@ -0,0 +1,21 @@
> > +#
> > +# FPGA framework configuration
> > +#
> > +
> > +menu "FPGA devi
On 12/12/2014 9:02 AM, Arnd Bergmann wrote:
On Friday 12 December 2014 08:56:19 Ray Jui wrote:
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index aaeec78..a13a0b2 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -19,6 +19,7 @@ config ARCH_BCM_IPR
On 12/12/2014 4:29 AM, Arnd Bergmann wrote:
On Thursday 11 December 2014 18:36:55 Ray Jui wrote:
Add initial version of the Broadcom iProc PCIe driver. This driver
has been tested on NSP and Cygnus and is expected to work on all iProc
family of SoCs that deploys the same PCIe host controller
Signed-off-by: Soeren Andersen
---
Documentation/devicetree/bindings/i2c/trivial-devices.txt | 1 -
1 file changed, 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/i2c/trivial-devices.txt
b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
index 605dcca..6b5a8a5 100644
--- a
Signed-off-by: Soeren Andersen
---
Documentation/devicetree/bindings/rtc/nxp,pcf85063.txt | 16
1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/rtc/nxp,pcf85063.txt
b/Documentation/devicetree/bindings/rtc/nxp,pcf85063.txt
index 000..dcda544
--
On Friday 12 December 2014 08:56:19 Ray Jui wrote:
> >>
> >> diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
> >> index aaeec78..a13a0b2 100644
> >> --- a/arch/arm/mach-bcm/Kconfig
> >> +++ b/arch/arm/mach-bcm/Kconfig
> >> @@ -19,6 +19,7 @@ config ARCH_BCM_IPROC
> >> select
On 12/12/2014 4:15 AM, Arnd Bergmann wrote:
On Thursday 11 December 2014 18:36:56 Ray Jui wrote:
Enable PCIe driver support for Broadcom iProc family of SoCs by
selecting PCIE_IPROC
Signed-off-by: Ray Jui
Reviewed-by: Scott Branden
---
arch/arm/mach-bcm/Kconfig |1 +
1 file changed,
On 12/12/2014 4:14 AM, Arnd Bergmann wrote:
On Thursday 11 December 2014 18:36:54 Ray Jui wrote:
index 000..040bc0f
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
@@ -0,0 +1,74 @@
+* Broadcom iProc PCIe controller
+
+Required properties:
+- compatible: Must b
On Wed, Dec 10, 2014 at 04:48:20PM +0100, Andrzej Hajda wrote:
> restrack framework allows tracking presence of resources with dynamic life
> time. Typical example of such resources are all resources provided by device
I don't know about anyone else but I'm having a hard time reading the
restrack
Thanks for the quick feedback.
Alexandre Courbot wrote on Fri [2014-Dec-12 17:54:06 +0900]:
> On Thu, Dec 11, 2014 at 8:48 AM, Benoit Parrot wrote:
> > Alexandre Courbot wrote on Wed [2014-Dec-10 20:19:51
> > +0900]:
> >> On Fri, Dec 5, 2014 at 6:02 AM, Benoit Parrot wrote:
> >> > Based on Bo
On Fri, Dec 12, 2014 at 04:08:25PM +0800, Eddie Huang wrote:
> On Thu, 2014-12-11 at 18:02 +, Mark Rutland wrote:
> > On Wed, Dec 10, 2014 at 10:50:01AM +, Eddie Huang wrote:
...
> > > + memory {
> >
> > Nit: should be memory@4000 (and you'll need to add device_type =
> > "memory").
>
Argh, this went through the wrong SMTP. I suspect threading is broken
due to that. Let me know if you want me to resend this with intact
threading.
My apologies.
Thanks,
Sören
On Fri, 2014-12-12 at 08:34AM -0800, Soren Brinkmann wrote:
> Hi,
>
> I made those few adjustments that
Add pinctrl descriptions to the zc702 and zc706 device trees.
Signed-off-by: Soren Brinkmann
Tested-by: Andreas Färber
---
Changes since v1:
- remove 'pinctrl-' prefix for pinctrl sub-nodes
- separate config and mux nodes
Changes since RFC v2:
- add pinconf properties to zc702 mdio node
- r
This adds a pin-control driver for Zynq.
Signed-off-by: Soren Brinkmann
Tested-by: Andreas Färber
---
Changes since v2:
- driver-specific DT properties are passed to the core in two arrays,
one for the actual DT parsing one for the debugfs representation.
Issue a compiler warning when the nu
On Wed, Dec 10, 2014 at 04:48:19PM +0100, Andrzej Hajda wrote:
> track is a generic framework for safe tracking presence of any kernel objects
> having an id. There are no special requirements about type of object or its
> id. Id shall be unique.
This is pretty confusing, when it talks about "kern
Add documentation for the devicetree binding for the Zynq pincontroller.
Signed-off-by: Soren Brinkmann
Tested-by: Andreas Färber
---
Changes since v1:
- fix typo
- add USB related documentation
- remove 'pinctrl-' prefix for pinctrl sub-nodes
- update documentation to enforce strict separat
Additionally to the generic DT parameters, allow drivers to provide
driver-specific DT parameters to be used with the generic parser
infrastructure.
To achieve this 'struct pinctrl_desc' is extended to pass custom pinconf
option to the core. In order to pass this kind of information, the
related d
With the new 'groups' property, the DT parser can infer the map type
from the fact whether 'pins' or 'groups' is used to specify the pin
group to work on.
To maintain backwards compatibitliy with current usage of the DT
binding, this is only done when PIN_MAP_TYPE_INVALID is passed to the
parsing f
Instead of the driver caring about implementation details like device
tree, just provide information about driver specific pinconf parameters
to pinconf-generic which takes care of parsing the DT.
Signed-off-by: Soren Brinkmann
---
Changes since v2:
- remove hyphens in 'pull-up-strength' debugfs
Hi,
I made those few adjustments that came up in the v2 review. Other than
those, these are the same patches as before.
The series is based on pinctrl-v3.19-1, the current pinctrl/devel
branch.
A branch with these changes is available at
https://github.com/sorenb-xlnx/linux-xlnx/commits/pinctrl
Select pinctrl and the Zynq pinctrl driver.
Signed-off-by: Soren Brinkmann
Tested-by: Andreas Färber
---
Changes since RFC v2:
- separate mach-zynq changes in their own patch
---
arch/arm/mach-zynq/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/
On Fri, Dec 12, 2014 at 11:57:08AM +, Jonathan Cameron wrote:
> On 06/12/14 11:36, Hartmut Knaack wrote:
> > Nikolaus Schulz schrieb am 24.11.2014 um 20:50:
> >> The TI DAC8554 is a quad-channel Digital-to-Analog Converter with an SPI
> >> interface.
> >>
> >> Changes in v2:
> >> * Use DMA-safe
On Sat, Dec 06, 2014 at 12:36:19PM +0100, Hartmut Knaack wrote:
> Nikolaus Schulz schrieb am 24.11.2014 um 20:50:
> > The TI DAC8554 is a quad-channel Digital-to-Analog Converter with an SPI
> > interface.
> >
> > Changes in v2:
> > * Use DMA-safe buffer for SPI transfer
> > * Normalize powerdown_
Commit 58ecb23f64ee ("ARM: tegra: add missing unit addresses to DT") added
unit address and changed reg base for GR3D and DSI host1x modules, but these
addresses belongs to GR2D and TVO modules respectively. Fix it by changing
modules unit and reg base addresses to proper ones.
Signed-off-by: Dmit
Enable usb PHY for all usb ports on rk3288-evb.
Signed-off-by: Yunzhi Li
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
arch/arm/boot/dts/rk3288-evb.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-e
This patch adds a device_node for RK3288 SoC usb phy. It also
defines the phy to be used by three usb controllers: usb_host0/1
and usb_otg.
Signed-off-by: Yunzhi Li
---
Changes in v7:
- Update dtsi for new usb phy driver.
Changes in v6: None
Changes in v5:
- reorder the phy dt node to a correc
This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all configured through a
set of registers located in the GRF (general register files)
module.
Signed-off-by: Yunzhi Li
---
Changes
This patch adds a binding that describes the Rockchip usb PHYs
found on Rockchip SoCs usb interface.
Signed-off-by: Yunzhi Li
---
Changes in v7:
- Update bindings doc
Changes in v6: None
Changes in v5:
- Adjust entry order of example devicetree node in document.
Changes in v4:
- Updata descri
Patches to add support for Rockchip usb phys.Add a new Rockchip
usb phy driver and modify dwc2 controller driver to make dwc2
platform devices support a generic PHY framework driver. This
patch set has been tested on my rk3288-evb and power off the usb
phys would reduce about 60mW power budget in
Patches to add support for Rockchip usb phys.Add a new Rockchip
usb phy driver and modify dwc2 controller driver to make dwc2
platform devices support a generic PHY framework driver. This
patch set has been tested on my rk3288-evb and power off the usb
phys would reduce about 60mW power budget in
On 12/12/14, 4:04 AM, Ley Foon Tan wrote:
> The Altera mailbox allows for interprocessor communication. It supports
> only one channel and work as either sender or receiver.
>
> Signed-off-by: Ley Foon Tan
> ---
> .../devicetree/bindings/mailbox/altera-mailbox.txt | 49 +++
> drivers/mailbox/
On Friday, December 12, 2014 03:42:07 PM Rafael J. Wysocki wrote:
> On Thursday, December 11, 2014 07:59:20 PM Linus Torvalds wrote:
> > On Mon, Dec 8, 2014 at 4:21 PM, Rafael J. Wysocki wrote:
> > >
> > > Also the ACPI core is now going to support the _DEP configuration
> > > information in a lim
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