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-k-0-0-l-k-
This patch adds MAX77843 extcon driver to support for MUIC(Micro
USB Interface Controller) device by using EXTCON subsystem to handle
various external connectors.
Cc: Chanwoo Choi
Signed-off-by: Jaewon Kim
---
drivers/extcon/Kconfig | 10 +
drivers/extcon/Makefile |1 +
Add document describing device tree bindings for max77843 MFD.
Drivers: MFD core, regulator, extcon, charger and fuelgauge.
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: Lee Jones
Cc: Chanwoo Choi
Cc: Sebastian Reichel
Cc: Mark Brown
Signed-off-by: Ja
This patch adds new regulator driver to support max77843
MFD(Multi Function Device) chip`s regulators.
The Max77843 has two voltage regulators for USB safeout.
Cc: Mark Brown
Signed-off-by: Jaewon Kim
Signed-off-by: Beomho Seo
---
drivers/regulator/Kconfig|8 ++
drivers/regulator/Makef
From: Beomho Seo
This patch adds device driver of max77843 fuel gauge.
The driver support for battery fuel gauge in Maxim Max77843.
It is fuel-gauge systems for lithuum-ion batteries in handled and
portable devices.
Cc: Sebastian Reichel
Signed-off-by: Beomho Seo
---
drivers/power/Kconfig
From: Beomho Seo
This patch adds device driver of max77843 charger. This driver provide
initialize each charging mode(e.g. fast charge, top-off mode and constant
charging mode so on.). Additionally, control charging paramters to use
i2c interface.
Cc: Sebastian Reichel
Signed-off-by: Beomho Seo
This patch series adds MAX77843(Multi Function Device) driver.
The MAX77843 includes MUIC(Micro USB Interface Circuit), Li+ Charger
with Fuel Gauge and 2 safeout LDOs for USB device.
It is interfaced to host controller using I2C.
Changes in V2:
MFD Core
- Fix charger regmap handle and typo.
MUIC
This patch adds MAX77843 core/irq driver to support PMIC,
MUIC(Micro USB Interface Controller), Charger, Fuel Gauge,
LED and Haptic device.
Cc: Lee Jones
Signed-off-by: Jaewon Kim
Signed-off-by: Beomho Seo
---
drivers/mfd/Kconfig | 14 ++
drivers/mfd/Makefile
Sylwester Nawrocki wrote:
>
> Hi Kukjin,
>
Hi,
> On 16/01/15 18:30, Sylwester Nawrocki wrote:
> > This is required to fix regression after introducing the PMU device
> > nodes required for the PMU driver modified in commit
> > 14fc8b93d47323561edf5d482d4a4b3ee1b90286
> > ("ARM: EXYNOS: Add platf
Mark Brown wrote:
>
Hi Mark,
> On Wed, Jan 14, 2015 at 07:42:40PM +0100, Sylwester Nawrocki wrote:
> > Clock related properties are added to the Exynos4 I2S device nodes
> > so they can be referred to as clock providers. Missing i2s_opclk1
> > clock is added to the I2S0 node and clock properties
Sylwester Nawrocki wrote:
>
> On 23/01/15 06:03, Inha Song wrote:
> > This patch add WM1811 audio codec, I2S interface and the sound
> > machine nodes to enable audio on exynos4412-trats2 board.
> >
> > Signed-off-by: Inha Song
>
> Reviewed-by: Sylwester Nawrocki
>
Applied, thanks.
- Kukjin
Krzysztof Kozlowski wrote:
>
> Add to Trats2 DTS new node for configuring the max77693 charger driver.
> Only the maxim,constant-microvolt differs from default value but set all
> of the optional properties anyway.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> arch/arm/boot/dts/exynos4412-trat
Krzysztof Kozlowski wrote:
>
> Hi Kukjin,
>
Hi,
>
> I grouped into one patchset already posted patches for Trats2 board:
> 1. Fuel gauge:
>https://lkml.org/lkml/2015/1/7/167
> 2. Suspend configuration for max77686 regulators:
>https://lkml.org/lkml/2014/10/29/262
> 3. GPIO control for m
On 01/30/15 13:48, Kumar Gala wrote:
> On Jan 30, 2015, at 3:37 PM, Stephen Boyd wrote:
>
>> On 01/30/15 08:32, Kumar Gala wrote:
>>> On Jan 30, 2015, at 12:25 AM, Andy Gross wrote:
>>>
Required properties if child node exists:
- #address-cells: Must be 1
- #size-cells: Must be 1
>
Device tree binding documentation for Broadcom Cygnus IOMUX driver
Signed-off-by: Ray Jui
Reviewed-by: Scott Branden
---
.../bindings/pinctrl/brcm,cygnus-pinmux.txt| 159
1 file changed, 159 insertions(+)
create mode 100644
Documentation/devicetree/bindings/pinct
This patchset contains the initial pinctrl (IOMUX) support for the Broadcom
Cygnus SoC. The Cygnus IOMUX controller supports group based mux configuration
and allows certain pins to be muxed to GPIO function individually
Changes from v2:
- Consolidate all Broadcom pinctrl drivers into drivers/pin
This enables the IOMUX support for Broadcom Cygnus SoC
Signed-off-by: Ray Jui
---
arch/arm/boot/dts/bcm-cygnus.dtsi |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi
b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 5126f9e..b014ce5 100644
--- a/arch/arm/boo
This adds the initial driver support for the Broadcom Cygnus IOMUX
controller. The Cygnus IOMUX controller supports group based mux
configuration but allows certain pins to be muxed to GPIO individually
Signed-off-by: Ray Jui
Reviewed-by: Scott Branden
---
drivers/pinctrl/bcm/Kconfig
On 01/29/2015 02:48 AM, Zubair Lutfullah Kakakhel wrote:
Add DT support to the jz4740 driver. Simple of_match_ptr. No other
modification for probe needed
Signed-off-by: Zubair Lutfullah Kakakhel
Reviewed-by: Guenetr Roeck
s/Guenetr/Guenter/
--
To unsubscribe from this list: send the line "u
On 01/29/2015 02:48 AM, Zubair Lutfullah Kakakhel wrote:
Add binding for jz4740 watchdog timer. It is a simple watchdog timer.
Signed-off-by: Zubair Lutfullah Kakakhel
Reviewed-by: Guenter Roeck
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a messa
>From: Mark Rutland [mailto:mark.rutl...@arm.com]
>Sent: 2015年2月2日 18:35
>To: Chao Xie
>Cc: daniel.lezc...@linaro.org; t...@linutronix.de; haojian.zhu...@linaro.org;
>linux-ker...@vger.kernel.org; devicetree@vger.kernel.org
>Subject: Re: [PATCH 1/4] clocksource: mmp: add mmp timer driver
>
>On
Hi Roger,
Looks good to me. Applied it on v3.21 queue.
Thanks,
Chanwoo Choi
On 02/02/2015 07:21 PM, Roger Quadros wrote:
> This driver observes the USB ID pin connected over a GPIO and
> updates the USB cable extcon states accordingly.
>
> The existing GPIO extcon driver is not suitable for thi
On Fri, 2015-01-30 at 10:00 +0100, Geert Uytterhoeven wrote:
> Hi Michael,
>
> On Fri, Jan 30, 2015 at 5:09 AM, Michael Ellerman wrote:
> > On Wed, 2015-14-01 at 13:51:57 UTC, Geert Uytterhoeven wrote:
> >> of_find_node_by_name() calls of_node_put() on its "from" parameter,
> >> which must not be
On Tue, Feb 03, 2015 at 01:13:12AM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 01/31/2015 01:18 PM, Geert Uytterhoeven wrote:
>
> >>>Add a stdout-path property so that automatic console selection works
> >>>in the absence of a "console=" parameter on the kernel command line.
>
> >>>Note that w
On Tue, Feb 03, 2015 at 01:10:57AM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 01/31/2015 07:17 AM, Simon Horman wrote:
>
> >>>Alt is booted from DT, so chosen/stdout-path is
> >>>always used, and we can drop the "console=" parameter from chosen/bootargs.
>
> >>>This change has a side-effect o
On Mon, Feb 02, 2015 at 11:57:50PM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 02/02/2015 02:05 PM, Mark Rutland wrote:
>
> >>Add the initial device tree for the R8A7794 SoC based SILK low cost board.
> >>SCIF2 serial port support is included, so that the serial console can work.
>
> >>Signed-
This patch adds the mux/divider/gate clocks for CMU_MSCL domain which
generates the clocks for M2M (Memory to Memory) scaler, JPEG IPs.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
---
.../devicetree/bindings/clock/exynos5433-clock.txt | 20 +++
drive
This patch adds the mux/divider/gate clocks for CMU_MFC domain which
generates the clocks for MFC(Multi-Format Codec) IP.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
---
.../devicetree/bindings/clock/exynos5433-clock.txt | 15 +++
drivers/clk/samsung
This patch adds the mux/divider/gate clocks for CMU_ATLAS domain which
generates the clocks for Cortex-A57 Quad-core processsor, L2 cache controller
and CoreSight.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
---
.../devicetree/bindings/clock/exynos543
This patch adds the mux/divider/gate clocks for CMU_CAM1 domain which
generates the clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
---
.../devicetree/bindings/clock/exynos5433-clock.txt | 32 ++
d
This patch adds the mux/divider/gate clocks for CMU_HEVC domain which
generates the clocks for HEVC(High Efficiency Video Codec) decoder IP.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
---
.../devicetree/bindings/clock/exynos5433-clock.txt | 15 +++
This patch adds the mux/divider/gate clocks for CMU_HEVC domain which
generates the clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
---
.../devicetree/bindings/clock/exynos5433-clock.txt | 24
This patch adds the mux/divider/gate clocks for CMU_ISP domain which
generates the clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
---
.../devicetree/bindings/clock/exynos5433-clock.txt | 20 ++
drivers/clk/sams
From: Inha Song
This patch add CLKOUT driver support for Exynos5433 SoC.
Signed-off-by: Inha Song
Acked-by: Inki Dae
---
drivers/clk/samsung/clk-exynos-clkout.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/samsung/clk-exynos-clkout.c
b/drivers/clk/samsung/clk-exynos-clko
This patch adds the mux/divider/gate clocks for CMU_APOLLO domain which
generates the clocks for Cortex-A53 Quad-core processsor.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
---
.../devicetree/bindings/clock/exynos5433-clock.txt | 15 ++
drivers/clk/
This patchset adds the support for following clock domains of Exynos5433
and clkout drvier.
Following clock domains has clocks for each IP.
- CMU_APOLLO : clocks for Cortex-A53 Quad-core processor.
- CMU_ATLAS : clocks for Cortex-A57 Quad-core processor, CoreSight and
L2 cache cont
This patch adds devicetree binding document for Exynos5433 SoC system clock
controller.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Cc: devicetree@vger.kernel.org
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
---
.../devicetree/bindings/clock/exynos5433-clock.txt | 305 +
1 fi
Hi Ezequiel,
> >> Hi Wim,
> >>
> >> On 01/06/2015 10:19 AM, Ezequiel Garcia wrote:
> >>> Here's the seventh round for IMG PDC Watchdog driver.
> >>> The series is based on v3.19-rc3.
> >>>
> >>
> >> Guenter has reviewed both patches. Do you think you can review this
> >> soonishly and let me know
The A80 has 3 EHCI/OHCI USB controllers.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun9i-a80.dtsi | 55
1 file changed, 55 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index d7ebd9390b01..17fcf57d
Unlike previous Allwinner SoCs, there is no central PHY control block
on the A80. Also, OTG support is completely split off into a different
controller.
This adds a new driver to support the regular USB PHYs.
Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
---
.../devicetree/bindings/phy/s
On the Optimus board, all three USB hosts can be used.
HCI0 and HCI2 are available through the USB connector.
HCI1 is available with HSIC through 2 pins on the GPIO
expansion header.
This patch also adds a regulator for HCI2/USB3's VBUS.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun9i-a
On sun9i we have a new PHY driver for USB.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index eec304487e6d..63fcc5522393 100644
--- a/arch/arm/con
On sun9i we have a new PHY driver for USB.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/configs/sunxi_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index 38840a812924..6b271645eb43 100644
--- a/arch/arm/configs/sunxi
Hi everyone,
This is v4 of the sun9i A80 USB host support series.
Changes since v3:
- Dropped patches merged.
- Moved reg_usb3_vbus into the optimus board dts
- Dropped ohci1 from A80 dtsi.
Cover letter from v3:
This series adds USB host controller (EHCI/OHCI) support for the Allwinner
В Tue, 3 Feb 2015 00:48:46 +0300
Roman Volkov пишет:
> Documentation for 'intel,8042' DT compatible node.
>
> Signed-off-by: Tony Prisk
> Signed-off-by: Roman Volkov
> ---
> .../devicetree/bindings/input/intel-8042.txt | 29
> ++ 1 file changed, 29 insertions(+)
> c
Hello.
On 01/31/2015 01:18 PM, Geert Uytterhoeven wrote:
Add a stdout-path property so that automatic console selection works
in the absence of a "console=" parameter on the kernel command line.
Note that we have to keep the "console=ttySC0,38400" parameter in
chosen/bootargs, else the conso
Hello.
On 01/31/2015 07:17 AM, Simon Horman wrote:
Alt is booted from DT, so chosen/stdout-path is
always used, and we can drop the "console=" parameter from chosen/bootargs.
This change has a side-effect of changing the console speed from 38400
to 115200. This is intentional as 115200 is co
The OF device table allows the platform_driver_probe() function to
automatically match device and parse the DT node.
Signed-off-by: Tony Prisk
Signed-off-by: Roman Volkov
---
drivers/input/serio/i8042.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/input/serio/i8042.c
i8042_dt.h should be included when CONFIG_ARCH_MIGHT_HAVE_PC_SERIO and
CONFIG_USE_OF are selected. It should be not necessary to create
additional options in the kernel config.
Signed-off-by: Roman Volkov
---
drivers/input/serio/i8042.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/driv
Use platform_device_probe() instead of platform_create_bundle() when
compiled with DT support, since the latter function is not suitable for
handling the OF device tree.
The order of initialization is changed, since i8042_platform_init() for DT
requires initialized platform_device structure. To av
Documentation for 'intel,8042' DT compatible node.
Signed-off-by: Tony Prisk
Signed-off-by: Roman Volkov
---
.../devicetree/bindings/input/intel-8042.txt | 29 ++
1 file changed, 29 insertions(+)
create mode 100644 Documentation/devicetree/bindings/input/intel-8042.tx
This header file designed to be similar to other glue layers found
for i8042. The difference is that interrupt numbers, device address,
and other information should be retrieved from the device tree.
Signed-off-by: Tony Prisk
Signed-off-by: Roman Volkov
---
drivers/input/serio/i8042-dt.h | 112
On 01/29/2015 12:20 AM, Andrey Danin wrote:
NVEC driver was reimplemented to use tegra i2c. Use common i2c bindings
for NVEC node.
diff --git a/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt
b/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt
The changes to this file make more
On 02/01/2015 05:00 AM, Ohad Ben-Cohen wrote:
> On Sat, Jan 31, 2015 at 7:41 AM, Ohad Ben-Cohen wrote:
>> On Sat, Jan 31, 2015 at 1:29 AM, Bjorn Andersson wrote:
>>> In a system where you have two hwlock blocks lckA and lckB, each
>>> consisting of 8 locks and you have dspB that can only access l
On 01/28/2015 03:50 AM, Tomeu Vizoso wrote:
Patches are on its way to add a config file to alsaucm for the Nyan
boards. Use the same card ID that alsaucm will expect.
diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts
b/arch/arm/boot/dts/tegra124-nyan-big.dts
sound {
-
On 02/01/2015 11:55 AM, Bjorn Andersson wrote:
> On Fri, Jan 30, 2015 at 9:41 PM, Ohad Ben-Cohen wrote:
>> On Sat, Jan 31, 2015 at 1:29 AM, Bjorn Andersson wrote:
>>> In a system where you have two hwlock blocks lckA and lckB, each
>>> consisting of 8 locks and you have dspB that can only access
Hello.
On 02/02/2015 02:05 PM, Mark Rutland wrote:
Add the initial device tree for the R8A7794 SoC based SILK low cost board.
SCIF2 serial port support is included, so that the serial console can work.
Signed-off-by: Sergei Shtylyov
[...]
Index: renesas/arch/arm/boot/dts/r8a7794-silk.dt
Hello.
On 01/31/2015 01:52 AM, Sergei Shtylyov wrote:
Add the initial device tree for the R8A7794 SoC based SILK low cost board.
SCIF2 serial port support is included, so that the serial console can work.
Signed-off-by: Sergei Shtylyov
---
This patch is against the 'renesas-devel-2015012
Ugh, please avoid using HTML when posting to the lists hosted on
vger.kernel.org -- it's configured to ignore such mails AFAIK.
Yeah forgot to set the plain text mode. Sorry for that
>>> This patch addresses the issue with ATA_CMD_SMART pio mode
>>> command for enumeration and device de
On 02/02/2015 10:37 PM, Suman Tripathi wrote:
Ugh, please avoid using HTML when posting to the lists hosted on
vger.kernel.org -- it's configured to ignore such mails AFAIK.
This patch addresses the issue with ATA_CMD_SMART pio mode
command for enumeration and device detection with
Hello.
On 02/02/2015 09:07 PM, Suman Tripathi wrote:
This patch addresses the issue with ATA_CMD_SMART pio mode
command for enumeration and device detection with ATA devices.
The X-Gene AHCI controller has an errata in which it cannot clear
the BSY bit after the PIO setup FIS. The dma state mac
On Mon, Feb 02, 2015 at 12:43:50AM -0500, Peter Hurley wrote:
> On 02/02/2015 12:33 AM, Eddie Huang wrote:
> > Hi Peter,
> >
> > On Sun, 2015-02-01 at 21:24 -0800, Greg Kroah-Hartman wrote:
> >> On Mon, Feb 02, 2015 at 12:15:31AM -0500, Peter Hurley wrote:
> >>> On 02/01/2015 11:28 PM, Greg Kroah-
Ivan,
On Mon, Feb 02, 2015 at 05:19:30PM +0200, Ivan T. Ivanov wrote:
> Add support for the temperature alarm peripheral found inside
> Qualcomm plug-and-play (QPNP) PMIC chips. The temperature alarm
> peripheral outputs a pulse on an interrupt line whenever the
> thermal over temperature stage va
This patch addresses the issue with ATA_CMD_SMART pio mode
command for enumeration and device detection with ATA devices.
The X-Gene AHCI controller has an errata in which it cannot clear
the BSY bit after the PIO setup FIS. The dma state machine enters
CMFatalErrorUpdate state and locks up. It is
v1 changes:
* Update the commit id as per Tejun's comments.
* Add a bit explanation.
v2 changes:
* Update the comments from sergei.
v3 changes:
* More changes in comments.
Signed-off-by: Suman Tripathi
---
Suman Tripathi (1):
ahci_xgene: Fix the dma state machine lockup for the ATA_CMD_S
On Mon, Feb 02, 2015 at 05:05:39PM +0100, Markus Pargmann wrote:
> Hi,
>
> On Fri, Jan 30, 2015 at 10:57:21AM -0800, Dmitry Torokhov wrote:
> > On Thu, Jan 29, 2015 at 07:56:40PM +0530, Varka Bhadram wrote:
> > > Hi,
> > >
> > > On Thursday 29 January 2015 07:39 PM, Markus Pargmann wrote:
> > > >
Based on Boris Brezillion's work this is a reworked patch
of his initial GPIO hogging mechanism.
This patch provides a way to initially configure specific GPIO
when the GPIO controller is probed.
The actual DT scanning to collect the GPIO specific data is performed
as part of gpiochip_add().
The
Add GPIO hogging documentation to gpio.txt
Signed-off-by: Benoit Parrot
Reviewed-by: Alexandre Courbot
---
Documentation/devicetree/bindings/gpio/gpio.txt | 30 +
1 file changed, 30 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt
b/Documentat
This patch set re-introduces the gpio hogging concept first
presented by Boris Brezillion.
This patch set provides a way to initially configure specific GPIO
when the GPIO controller is probed.
The actual DT scanning to collect the GPIO specific data is performed
as part of of_gpiochip_add().
Th
Hello.
On 02/02/2015 02:57 PM, Suman Tripathi wrote:
This patch addresses the issue with ATA_CMD_SMART pio mode
command for enumeration and device detection with ATA devices.
The X-Gene AHCI controller has an errata in which it cannot clear
the BSY bit after the PIO setup FIS. The dma state mac
On Monday 02 February 2015 18:51:58 Jassi Brar wrote:
> Hi Arnd, Hi Olof,
>
> ... just a polite ping on the patchset.
Hi Jassi,
Olof has been handling all the merges so far, but he probably missed
this one as it was neither a pull request nor sent to a...@kernel.org.
I've put the a...@kernel
On 02/02/2015 07:18 AM, Catalin Marinas wrote:
On Fri, Jan 30, 2015 at 06:06:27PM +, Murali Karicheri wrote:
On 01/28/2015 12:30 PM, Catalin Marinas wrote:
I think we can remove this check altogether (we leaved without it for a
while) but we need to add 1 when calculating the mask:
On Mon, Feb 02, 2015 at 04:43:14PM +0100, Stefan Roese wrote:
> On 21.02.2014 17:18, Michal Simek wrote:
> >On 02/21/2014 05:12 PM, Felipe Balbi wrote:
> >>On Fri, Feb 21, 2014 at 05:04:26PM +0100, Michal Simek wrote:
> >>>On 02/21/2014 05:04 PM, Greg Kroah-Hartman wrote:
> On Fri, Feb 21, 2014
Hi,
On Fri, Jan 30, 2015 at 10:57:21AM -0800, Dmitry Torokhov wrote:
> On Thu, Jan 29, 2015 at 07:56:40PM +0530, Varka Bhadram wrote:
> > Hi,
> >
> > On Thursday 29 January 2015 07:39 PM, Markus Pargmann wrote:
> > >This is a driver for the imx25 ADC/TSC module. It controls the
> > >touchscreen c
On 21.02.2014 17:18, Michal Simek wrote:
On 02/21/2014 05:12 PM, Felipe Balbi wrote:
On Fri, Feb 21, 2014 at 05:04:26PM +0100, Michal Simek wrote:
On 02/21/2014 05:04 PM, Greg Kroah-Hartman wrote:
On Fri, Feb 21, 2014 at 07:38:16AM +0100, Michal Simek wrote:
BTW: u-boot started to use SPDX-Li
On 02/02/2015 05:19 PM, Ivan T. Ivanov wrote:
> Add support for the temperature alarm peripheral found inside
> Qualcomm plug-and-play (QPNP) PMIC chips. The temperature alarm
> peripheral outputs a pulse on an interrupt line whenever the
> thermal over temperature stage value changes.
>
> Registe
Add support for the temperature alarm peripheral found inside
Qualcomm plug-and-play (QPNP) PMIC chips. The temperature alarm
peripheral outputs a pulse on an interrupt line whenever the
thermal over temperature stage value changes.
Register a thermal sensor. The temperature reported by this therm
Hi Pavel,
On 02/02/2015 02:51 PM, Pavel Machek wrote:
Hi!
[Actually, you could _always_ do two reads on those devices, discard
first result, and return the second. But I'm not sure how hardware
will like that.]
This would be the most sensible option.
However, let's analyze the typical use
Disables GPIO support and LINE2 input and renames Mic3 input to Mic2,
if tlv320aic3104 mode is seleced. Devicetree binding document is
updated accordingly.
Signed-off-by: Jyri Sarha
---
Changes since the first version of the patch
- Added "ti,tlv320aic3104" to tlv320aic3x_of_match table
What su
On Mon, Jan 19, 2015 at 06:31:03PM +0800, Vincent Yang wrote:
> From: Jassi Brar
>
> Add driver for the ARM Message-Handling-Unit (MHU).
Is this an AMBA Primecell peripheral? If so, it should not be a platform
driver.
Thanks.
--
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400
This patch adds missing gate clocks of CMU_PERIS domain
which includes TMU/TZPC/SECKEY/CHIPID/TOPRTC/EFUSE IPs.
The special clocks of CMU_PERIS use fin_pll source clock directly.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
Reviewed-by: Pankaj Dubey
--
This patch adds the mux/divider/gate clocks of CMU_MIF domain which includes
the clocks for DMC(DRAM memory controller) and CCI(Cache Coherent Interconnect).
The CMU_MIF domain provides the source clocks for CMU_DISP/CMU_BUS2.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
A
This patch adds devicetree binding document for Exynos5433 SoC system clock
controller.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Cc: devicetree@vger.kernel.org
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
---
.../devicetree/bindings/clock/exynos5433-clock.txt | 305 +
1 fi
This patch adds the the mux/divider/gate clocks for CMU_DISP domain which
includes the clocks of Display IPs (DECON/HDMI/DSIM/MIXER). The CMU_DISP clocks
is used to need the source clock of CMU_MIF domain so, the CMU_MIF's clocks
related to CMU_DISP should be always on state.
Also, CMU_DISP must n
This patch adds the mux/divider/gate clocks for CMU_G3D domain which contains
the clocks for GPU(3D Graphics Engine).
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
Reviewed-by: Pankaj Dubey
---
drivers/clk/samsung/clk-exynos5433.c | 127 +
This patch adds the mux/divider/gate clocks for CMU_FSYS domain which
contains the clocks of USB/UFS/SDMMC/TSI/PDMA IPs.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
---
drivers/clk/samsung/clk-exynos5433.c | 302 +
in
This patch adds the mux/divider/gate clocks for CMU_BUS{0|1|2} domains
which contain global data buses clocked at up the 400MHz. These blocks
transfer data between DRAM and various sub-blocks. These clock domains
also contain global peripheral buses clocked at 67/111/200/222/266/333/400
MHz and use
This patch adds the divider/gate of CMU_GSCL domain which contains gscaler
clocks.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
---
drivers/clk/samsung/clk-exynos5433.c | 146 +
include/dt-bindings/clock/exynos5433.h |
This patch adds the support for CMU (Clock Management Units) of Exynos5433
which is 64bit SoC and has Octa-cores. This patch supports necessary clocks
(PLL/MMC/UART/MCT/I2C/SPI) for kernel boot and includes binding documentation
for Exynos5433 clock controller.
Cc: Sylwester Nawrocki
Cc: Tomasz F
This patch adds ths mux/divider/gate clocks of CMU_G2D domain which includes
G2D/MDMA IPs. The CMU_G2D must need the clocks related to G2D by providing
CMU_TOP domain. So, this patch add several clocks for G2D from CMU_TOP domain.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Cho
This patch adds missing divider/gate clocks of CMU_PERIC domain
which includes I2S/PCM/SPDIF/PWM/SLIMBUS IPs. The SPI/I2S may use
external input clock which has 'ioclk_*' prefix.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
[ideal.song: Change clk flags of to pclk_gpio_* c
This patch adds the mux/divider/gate clocks for CMU_AUD domain which
includes the clocks of Cortex-A5/Bus/Audio clocks.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
---
drivers/clk/samsung/clk-exynos5433.c | 172 +
inc
This patchset adds the support for Exynos5433 CMU (Clock Management Unit)
by using common clock framework. This patchset is divided from patch[1]
and then sent it.
[1] https://lkml.org/lkml/2014/12/2/134
Changelog:
Changes from v4:
- Add input clock information to binding document
Changes from v
This patch adds the MUX (multiplexer) clocks for CMU_TOP domain of Exynos5433.
CMU_TOP domain provides source clocks to other CMU domains.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
Acked-by: Inki Dae
Reviewed-by: Pankaj Dubey
---
drivers/clk/samsung/clk-exynos5433.c
Hi!
> >[Actually, you could _always_ do two reads on those devices, discard
> >first result, and return the second. But I'm not sure how hardware
> >will like that.]
>
> This would be the most sensible option.
>
>
> However, let's analyze the typical use cases for flash strobing:
>
>
> --
Hi Arnd, Hi Olof,
... just a polite ping on the patchset.
Thanks.
On 19 January 2015 at 15:53, Vincent Yang
wrote:
> Hello,
>
> Fujitsu have a series of SoC already shipping based around
> variations of 2xCA7+2xCA15 big.LITTLE architecture, and we would like
> to upstream the basic support
On Fri, Jan 30, 2015 at 06:06:27PM +, Murali Karicheri wrote:
> On 01/28/2015 12:30 PM, Catalin Marinas wrote:
> > I think we can remove this check altogether (we leaved without it for a
> > while) but we need to add 1 when calculating the mask:
> >
> > dev->coherent_dma_mask = min(DMA_BIT_
On 01/30/2015 12:57 PM, Lorenzo Pieralisi wrote:
> On Fri, Jan 30, 2015 at 08:43:22AM +, amit daniel kachhap wrote:
>> Hi Karol,
>>
>> I guess this patch series is not complete and use case implementation
>> will be more helpful for clarity. Also I can think of another way in
>> which this comp
v1 changes:
* Update the commit id as per Tejun's comments.
* Add a bit explanation.
v2 changes:
* Update the comments from sergei.
Signed-off-by: Suman Tripathi
---
Suman Tripathi (1):
ahci_xgene: Fix the dma state machine lockup for the ATA_CMD_SMART PIO
mode command.
drivers/ata/a
This patch addresses the issue with ATA_CMD_SMART pio mode
command for enumeration and device detection with ATA devices.
The X-Gene AHCI controller has an errata in which it cannot clear
the BSY bit after the PIO setup FIS. The dma state machine enters
CMFatalErrorUpdate state and locks up. It is
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