On Wed, Feb 11, 2015 at 11:20:33PM -0800, Patrick Lai wrote:
> On 2/11/2015 6:53 PM, Mark Brown wrote:
> >On Wed, Feb 11, 2015 at 05:05:52PM -0800, Kenneth Westfield wrote:
> >>Replacing DSP-based drivers with LPASS-based drivers would be something that
> >>should be handled by Kconfig selections.
On Thu, Feb 12, 2015 at 02:35:54AM -0800, Kenneth Westfield wrote:
> From: Kenneth Westfield
>
> For the max98357a codec driver:
> - Add missing build dependancy to GPIOLIB in
> Kconfig.
> - Add header files to avoid implicit declarations
> and indirect inclusions.
> - Remove use of
Looks good to me.
Reviewed-by: Ashley Lai
Thanks,
--Ashley
On Thu, 12 Feb 2015, honclo wrote:
The tpm_ibmvtpm module is affected by an unaligned access problem.
ibmvtpm_crq_get_version failed with rc=-4 during boot when vTPM is
enabled in Power partition, which supports both little endian an
On Thu, Jan 29, 2015 at 05:51:06PM -0800, Bjorn Andersson wrote:
> Add the regulator subnodes to the Qualcomm RPM MFD device tree bindings.
>
> Signed-off-by: Bjorn Andersson
> ---
> #include
> @@ -66,5 +237,18 @@ frequencies.
>
> #address-cells = <1>;
> #siz
The OF device table allows the platform_driver_probe() function to
automatically match device and parse the DT node.
Signed-off-by: Tony Prisk
Signed-off-by: Roman Volkov
---
drivers/input/serio/i8042.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/input/serio/i8042.c
This header file designed to be similar to other glue layers found
for i8042. The difference is that interrupt numbers, device address,
and other information should be retrieved from the device tree.
Signed-off-by: Tony Prisk
Signed-off-by: Roman Volkov
---
drivers/input/serio/i8042-dt.h | 104
Use platform_device_probe() instead of platform_create_bundle() when
compiled with DT support, since the latter function is not suitable for
handling the OF device tree.
The order of initialization is changed, since i8042_platform_init() for DT
requires initialized platform_device structure. To av
i8042_dt.h should be included when CONFIG_ARCH_MIGHT_HAVE_PC_SERIO and
CONFIG_USE_OF are selected. It should be not necessary to create
additional options in the kernel config.
Signed-off-by: Roman Volkov
---
drivers/input/serio/i8042.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/driv
Documentation for 'intel,8042' DT compatible node.
Signed-off-by: Tony Prisk
Signed-off-by: Roman Volkov
---
.../devicetree/bindings/input/intel-8042.txt | 26 ++
1 file changed, 26 insertions(+)
create mode 100644 Documentation/devicetree/bindings/input/intel-8042.tx
Yes, some embedded devices still use the i8042 controller. This patch set
enables the i8042 driver to get necessary information from Device Tree instead
of using specific headers with hardcoded addresses for each specific machine.
For example, vt8500 architecture has i8042.
v2:
Changes in the docu
Am Freitag, den 13.02.2015, 17:41 +0100 schrieb Maxime Coquelin:
> 2015-02-13 17:25 GMT+01:00 Philipp Zabel :
> > Hi Maxime,
> >
> > Am Freitag, den 13.02.2015, 16:59 +0100 schrieb Maxime Coquelin:
> >> Hi Philipp,
> >>
> >> 2015-02-13 12:47 GMT+01:00 Philipp Zabel :
> >> > Hi Maxime,
> >> >
> >> >
Some board designers, when running out of clock output pads, decide to
(mis)use PWM output pads to provide a clock to external components.
This driver supports this practice by providing an adapter between the
PWM and clock bindings in the device tree. As the PWM bindings specify
the period in the
On Fri, Feb 13, 2015 at 04:35:36PM +0200, Tomi Valkeinen wrote:
> On 12/02/15 15:41, Sascha Hauer wrote:
>
> > Tomis patch is based on the assumption that
> > clk_set_rate(clk_round_rate(rate))
> > is equal to clk_round_rate(rate). So when this assumption is wrong then
> > it should simply be rev
These patches add support for the Scorpion PMU found on devices
such as msm8660, qsd8x50, etc. The first patch is some groundwork
to make functions more "generic". Even then we end up copying quite
a bit of code from the Krait part into the Scorpion part with only
subtle tweaks because two things h
Scorpion supports a set of local performance monitor event
selection registers (LPM) sitting behind a cp15 based interface
that extend the architected PMU events to include Scorpion CPU
and Venum VFP specific events. To use these events the user is
expected to program the lpm register with the even
2015-02-13 17:25 GMT+01:00 Philipp Zabel :
> Hi Maxime,
>
> Am Freitag, den 13.02.2015, 16:59 +0100 schrieb Maxime Coquelin:
>> Hi Philipp,
>>
>> 2015-02-13 12:47 GMT+01:00 Philipp Zabel :
>> > Hi Maxime,
>> >
>> > Am Donnerstag, den 12.02.2015, 18:46 +0100 schrieb Maxime Coquelin:
>> > [...]
>> >>
Hi Stephen,
Am Freitag, den 13.02.2015, 09:16 -0800 schrieb Stephen Boyd:
> On 12/12/14 02:47, Philipp Zabel wrote:
> > +
> > +const struct clk_ops clk_pwm_ops = {
>
> static?
[...]
> > +int clk_pwm_probe(struct platform_device *pdev)
>
> static?
[...]
> > +int clk_pwm_remove(struct platform_dev
On 12/12/14 02:47, Philipp Zabel wrote:
> +
> +const struct clk_ops clk_pwm_ops = {
static?
> + .prepare = clk_pwm_prepare,
> + .unprepare = clk_pwm_unprepare,
> + .recalc_rate = clk_pwm_recalc_rate,
> +};
> +
> +int clk_pwm_probe(struct platform_device *pdev)
static?
> +{
> + s
Hi Maxime,
Am Freitag, den 13.02.2015, 16:59 +0100 schrieb Maxime Coquelin:
> Hi Philipp,
>
> 2015-02-13 12:47 GMT+01:00 Philipp Zabel :
> > Hi Maxime,
> >
> > Am Donnerstag, den 12.02.2015, 18:46 +0100 schrieb Maxime Coquelin:
> > [...]
> >> + soc {
> >> + reset_ahb1: reset@40023
On Fri, Feb 13, 2015 at 02:11:52PM +, Russell King - ARM Linux wrote:
> I think what's going on is that there's a difference in the expectations
> from the PM domain code vs the runtime PM code. I refer to section 5
> of the runtime PM documentation:
>
> | 5. Runtime PM Initialization, Device
Hi Philipp,
2015-02-13 12:49 GMT+01:00 Philipp Zabel :
> Hi Maxime,
>
> Am Donnerstag, den 12.02.2015, 18:45 +0100 schrieb Maxime Coquelin:
>> Some platforms need to initialize the reset controller before the timers.
>>
>> This patch introduces a reset_controller_of_init() function that can be
>>
Hi Philipp,
2015-02-13 12:47 GMT+01:00 Philipp Zabel :
> Hi Maxime,
>
> Am Donnerstag, den 12.02.2015, 18:46 +0100 schrieb Maxime Coquelin:
> [...]
>> + soc {
>> + reset_ahb1: reset@40023810 {
>> + #reset-cells = <1>;
>> + compatible = "st,st
AM57xx Beagle X15 has a HDMI output. This patch adds the device tree
nodes required for HDMI.
Signed-off-by: Tomi Valkeinen
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/am57xx-beagle-x15.dts | 80 +
1 file changed, 80 insertions(+)
diff --git a/arch/arm/b
DRA72 EVM has a HDMI output. This patch adds the device tree nodes
required for HDMI.
Signed-off-by: Tomi Valkeinen
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/dra72-evm.dts | 111
1 file changed, 111 insertions(+)
diff --git a/arch/arm/boot/dts
DRA7xxx contains a very similar DSS to OMAP5. The main differences are:
* no DSI or RFBI support.
* 1 or 2 dedicated video PLLs.
* need to do additional configuration to the DRA7 CONTROL module.
DRA72xx has only one video PLL, and DRA74xx has two.
Signed-off-by: Tomi Valkeinen
Cc: devicetree@vg
We need set-rate-parent flags for the display's clock path so that the
DSS driver can change the clock rate of the PLL.
This patchs adds the ti,set-rate-parent flag to 'dss_dss_clk' clock
node, which is only a gate clock, allowing the setting of the clock rate
to propagate to the PLL.
Signed-off-
On 12/02/15 15:41, Sascha Hauer wrote:
> Tomis patch is based on the assumption that clk_set_rate(clk_round_rate(rate))
> is equal to clk_round_rate(rate). So when this assumption is wrong then
> it should simply be reverted.
When is it not equal?
I agree that doing clk_set_rate(clk, clk_round_r
On Fri, Feb 13, 2015 at 01:29:25PM +, Russell King - ARM Linux wrote:
> On Mon, Apr 28, 2014 at 01:55:40PM +0200, Ulf Hansson wrote:
> > On 27 April 2014 15:29, Russell King wrote:
> > > The PMU device contains an interrupt controller, power control and
> > > resets. The interrupt controller
On Mon, Apr 28, 2014 at 01:55:40PM +0200, Ulf Hansson wrote:
> On 27 April 2014 15:29, Russell King wrote:
> > The PMU device contains an interrupt controller, power control and
> > resets. The interrupt controller is a little sub-standard in that
> > there is no race free way to clear down pendi
Hi Thierry,
thank you for the comments.
Am Donnerstag, den 12.02.2015, 23:29 +0100 schrieb Thierry Reding:
> On Fri, Dec 12, 2014 at 11:47:49AM +0100, Philipp Zabel wrote:
> > Some board designers, when running out of clock output pads, decide to
> > (mis)use PWM output pads to provide a clock to
On Mon, May 05, 2014 at 12:36:25AM +0200, Rafael J. Wysocki wrote:
> On Friday, May 02, 2014 11:24:45 AM Ulf Hansson wrote:
> > On 1 May 2014 01:46, Rafael J. Wysocki wrote:
> > > On Sunday, April 27, 2014 02:28:50 PM Russell King wrote:
> > >> Signed-off-by: Russell King
> > >
> > > Acked-by: Ra
Hi Maxime,
Am Donnerstag, den 12.02.2015, 18:45 +0100 schrieb Maxime Coquelin:
> Some platforms need to initialize the reset controller before the timers.
>
> This patch introduces a reset_controller_of_init() function that can be
> called before the timers intialization.
>
> Signed-off-by: Maxi
Hi Maxime,
Am Donnerstag, den 12.02.2015, 18:46 +0100 schrieb Maxime Coquelin:
[...]
> + soc {
> + reset_ahb1: reset@40023810 {
> + #reset-cells = <1>;
> + compatible = "st,stm32-reset";
> + reg = <0x40023810 0x4>;
> +
On Fri, Feb 13, 2015 at 09:42:46AM +0100, Maxime Coquelin wrote:
> Hi Geert,
>
> 2015-02-12 21:34 GMT+01:00 Geert Uytterhoeven :
> > On Thu, Feb 12, 2015 at 6:45 PM, Maxime Coquelin
> > wrote:
> >> From Cortex-M4 and M7 reference manuals, the nvic supports up to 240
> >> interrupts. So the number
On 25.01.2015 10:13, Sneeker Yeh wrote:
Oh, and one more thing:
>
> +static void xhci_try_to_clear_csc(struct usb_hcd *hcd, int dev_port_num)
> +{
> + int max_ports;
> + struct xhci_hcd *xhci = hcd_to_xhci(hcd);
> + __le32 __iomem **port_array;
> + u32 status;
> +
> + /* pri
On 12.02.2015 17:18, Alan Stern wrote:
> On Thu, 12 Feb 2015, Mathias Nyman wrote:
>
>> On 25.01.2015 10:13, Sneeker Yeh wrote:
>>> This issue is defined by a three-way race at disconnect, between
>>> 1) Class driver interrupt endpoint resheduling attempts if the ISR gave an
>>> ep
>>>error e
2015-02-12 21:37 GMT+01:00 Geert Uytterhoeven :
> On Thu, Feb 12, 2015 at 6:45 PM, Maxime Coquelin
> wrote:
>> --- a/drivers/pinctrl/Kconfig
>> +++ b/drivers/pinctrl/Kconfig
>> @@ -125,6 +125,15 @@ config PINCTRL_ST
>> select PINCONF
>> select GPIOLIB_IRQCHIP
>>
>> +config PINCTRL_
Hi Geert,
2015-02-12 21:34 GMT+01:00 Geert Uytterhoeven :
> On Thu, Feb 12, 2015 at 6:45 PM, Maxime Coquelin
> wrote:
>> From Cortex-M4 and M7 reference manuals, the nvic supports up to 240
>> interrupts. So the number of entries in vectors table is 256.
>>
>> This patch adds the missing entries,
On 2015/2/12 21:59, Alim Akhtar wrote:
> On Thu, Feb 12, 2015 at 4:40 PM, Andrzej Hajda wrote:
>> On 02/12/2015 03:28 AM, addy ke wrote:
>>> Hi Andrzej and Alim
>>>
>>> On 2015/2/12 07:20, Alim Akhtar wrote:
Hi Andrzej,
On Wed, Feb 11, 2015 at 5:28 PM, Andrzej Hajda wrote:
>
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