On Mon, 08 Jun 2015, Dmitry Torokhov wrote:
> On Tue, May 19, 2015 at 11:32:45AM +0100, S Twiss wrote:
> > From: Steve Twiss
> >
> > Add MFD support for the DA9063 OnKey driver
> >
> > The function da9063_clear_fault_log() is added to mitigate the case of a
> > hardware power-cut after a long-l
Hi Guenter,
Thanks for reply so quickly.
On 9 June 2015 at 12:37, Guenter Roeck wrote:
> On 06/08/2015 08:59 PM, Fu Wei wrote:
>>
>> Hi Guenter,
>>
>>
>> On 9 June 2015 at 02:26, Guenter Roeck wrote:
>>>
>>> On 06/08/2015 09:05 AM, Fu Wei wrote:
Hi Gurnter
On 3 June 201
On Fri, Jun 05, 2015 at 02:47:30PM -0500, Bjorn Helgaas wrote:
>"Move pcibios_find_pci_bus() from pSeries to generic powerpc code"?
>
>On Thu, Jun 04, 2015 at 04:42:00PM +1000, Gavin Shan wrote:
>> The patch moves pcibios_find_pci_bus() to PPC kerenl directory so
>
>s/kerenl/kernel/
>
Thanks. I'll
On Sat, Jun 06, 2015 at 06:18:15AM +1000, Benjamin Herrenschmidt wrote:
>On Fri, 2015-06-05 at 15:11 -0500, Bjorn Helgaas wrote:
>
>> You didn't add this, but "pcibios_add_pci_devices" doesn't seem like the
>> right name. "pcibios" generally refers to an arch-specific hook that's
>> called by the
On Fri, Jun 05, 2015 at 03:11:10PM -0500, Bjorn Helgaas wrote:
>On Thu, Jun 04, 2015 at 04:42:11PM +1000, Gavin Shan wrote:
>> The patch intends to add standalone driver to support PCI hotplug
>> for PowerPC PowerNV platform, which runs on top of skiboot firmware.
>> The firmware identified hotplug
> On Sun, Jun 7, 2015 at 10:32 AM, wrote:
>>> 2015-06-05 5:53 GMT+09:00 :
> Hi Yaniv,
>
> 2015-06-03 18:37 GMT+09:00 Yaniv Gardi :
>> @@ -321,7 +313,22 @@ static int ufshcd_pltfrm_probe(struct
>> platform_device *pdev)
>> goto out;
>> }
>>
On Fri, Jun 05, 2015 at 02:44:32PM -0500, Bjorn Helgaas wrote:
>On Thu, Jun 04, 2015 at 04:41:30PM +1000, Gavin Shan wrote:
>> Currently, PowerPC PowerNV platform utilizes ppc_md.pcibios_fixup(),
>> which is called for once after PCI probing and resource assignment
>> are completed, to allocate pla
cc'ing Hans and quoting whole message.
Hans, can you please review this one?
Thanks.
On Fri, Jun 05, 2015 at 11:32:28AM +0530, Suneel Garapati wrote:
> Adds support for Ceva sata host controller on Xilinx
> Zynq UltraScale+ MPSoC.
>
> Signed-off-by: Suneel Garapati
> ---
> Changes v2
> - Chan
On Thu, Jun 04, 2015 at 03:10:04PM +0800, yuantian.t...@freescale.com wrote:
> From: Tang Yuantian
>
> Freescale introduced QorIQ series SOCs, like ls1021 ls2085, with AHCI
> sata support. It complies with the serial ATA 3.0 specification
> and the AHCI 1.3 specification.
>
> Signed-off-by: Shao
On 06/08/2015 08:59 PM, Fu Wei wrote:
Hi Guenter,
On 9 June 2015 at 02:26, Guenter Roeck wrote:
On 06/08/2015 09:05 AM, Fu Wei wrote:
Hi Gurnter
On 3 June 2015 at 01:07, Guenter Roeck wrote:
On 06/02/2015 09:55 AM, Fu Wei wrote:
Hi Timur,
Thanks , feedback inline
On 2 June 2015 at
Hi Dann,
On Mon, Jun 8, 2015 at 8:44 PM, Dann Frazier wrote:
> On Tue, Jun 2, 2015 at 1:19 PM, Tai Nguyen wrote:
>> This patch adds syscon poweroff device node to support poweroff feature
>> on APM X-Gene Mustang platform
>
> hey Tai,
> The reboot changes work just fine for me, but poweroff doe
On 06/08/2015 02:42 PM, Russell King - ARM Linux wrote:
On Mon, Jun 01, 2015 at 10:51:06AM +0530, Bhuvanchandra DV wrote:
+/*
+ * CTS/RTS can _only_ be handled
+ * automatically by the hardware.
+ */
That's really not acceptable. You need to do something here so that you
can _
Hi Guenter,
On 9 June 2015 at 02:26, Guenter Roeck wrote:
> On 06/08/2015 09:05 AM, Fu Wei wrote:
>>
>> Hi Gurnter
>>
>> On 3 June 2015 at 01:07, Guenter Roeck wrote:
>>>
>>> On 06/02/2015 09:55 AM, Fu Wei wrote:
Hi Timur,
Thanks , feedback inline
On 2 June 20
On Tue, Jun 2, 2015 at 1:19 PM, Tai Nguyen wrote:
> This patch adds syscon poweroff device node to support poweroff feature
> on APM X-Gene Mustang platform
hey Tai,
The reboot changes work just fine for me, but poweroff does not:
[ OK ] Reached target Final Step.
Starting Power-Off.
On Mon, Jun 08, 2015 at 11:18:21PM +0200, Samuel Ortiz wrote:
> Hi Mark,
>
> On Fri, Apr 24, 2015 at 10:37:22AM -0700, Mark A. Greer wrote:
> > The current versions of the trf7970a has an erratum where it returns
> > an extra byte in the response to 'Read Multiple Block' (RMB) commands.
> > This c
On Mon, Jun 8, 2015 at 10:27 PM, Punnaiah Choudary Kalluri
wrote:
> Added the basic driver for zynqmp dma engine used in Zynq
> UltraScale+ MPSoC. The initial release of this driver supports
> only memory to memory transfers.
>
> Signed-off-by: Punnaiah Choudary Kalluri
> ---
> drivers/dma/Kconf
> -Original Message-
> From: Wood Scott-B07421
> Sent: Wednesday, May 27, 2015 3:38 AM
> To: Jia Hongtao-B38951
> Cc: edubez...@gmail.com; linuxppc-...@lists.ozlabs.org;
> devicetree@vger.kernel.org; robh...@kernel.org; rui.zh...@intel.com
> Subject: Re: [PATCH V2] QorIQ/TMU: add TMU node
Hello Arnd, Hello Olof, Hello Kevin,
I checked the git log of Linux 4.1-rc7 from Linus, he says Linux 4.1
will have an rc8, so we may have time to review the following two pull
requests from Wei Xu?
[GIT PULL v2]Hisilicon 64-bit SoC changes for 4.2
[GIT PULL]Hisilicon 64-bit soc hi6220 DT change
Hello Shawn,
On 2015/6/9 8:55, Shawn Guo wrote:
A minor random comment below.
On Sat, May 30, 2015 at 09:51:00AM +0800, Bintian Wang wrote:
+ ao_ctrl: ao_ctrl {
+ compatible = "hisilicon,hi6220-aoctrl", "syscon";
+ reg = <0x0 0xf780
On Mon, Jun 08, 2015 at 11:06:49AM -0500, Rob Herring wrote:
> On Mon, Jun 8, 2015 at 10:02 AM, Li Jun wrote:
> > Add otg version, srp, hnp and adp support for usb OTG port, then those OTG
> > features don't have to be decided by usb gadget drivers.
> >
> > Signed-off-by: Li Jun
> > ---
> > Docu
A minor random comment below.
On Sat, May 30, 2015 at 09:51:00AM +0800, Bintian Wang wrote:
> + ao_ctrl: ao_ctrl {
> + compatible = "hisilicon,hi6220-aoctrl", "syscon";
> + reg = <0x0 0xf780 0x0 0x2000>;
> + #clock-cells =
On Mon, Jun 8, 2015 at 8:29 PM, Pi-Cheng Chen wrote:
> MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs in a single cluster
> share the same power and clock domain. This series tries to add cpufreq
> support
> for MT8173 SoC.
I am sorry I forgot to add the version in the mail title.
This is
On Mon, 2015-06-08 at 15:43 -0700, David Miller wrote:
> From: Sergei Shtylyov
> Date: Tue, 09 Jun 2015 01:41:12 +0300
>
> > On 06/09/2015 01:19 AM, David Miller wrote:
> >
> >> It's completely implemented in software, you don't need to do anything
> >> other than properly invoke napi_gro_receiv
On Tue, May 19, 2015 at 11:32:45AM +0100, S Twiss wrote:
> From: Steve Twiss
>
> Add MFD support for the DA9063 OnKey driver
>
> The function da9063_clear_fault_log() is added to mitigate the case of a
> hardware power-cut after a long-long OnKey press. Although there is no
> software interventi
From: Sergei Shtylyov
Date: Tue, 09 Jun 2015 01:41:12 +0300
> On 06/09/2015 01:19 AM, David Miller wrote:
>
>> It's completely implemented in software, you don't need to do anything
>> other than properly invoke napi_gro_receive().
>
>Not even set NETIF_F_GRO?
Yes, you have to set that by
On 06/09/2015 01:19 AM, David Miller wrote:
Furthermore, you should pass the NAPI context into ravb_rx() and use
I guess I should have one NAPI context per RX queue?
Yes.
Thanks, done.
it so that you can invoke napi_gro_receive() on all of the packets and
therefore support GRO.
Hi Christophe,
On Sat, Jun 06, 2015 at 01:16:36PM +0200, Christophe Ricard wrote:
> Hi Samuel,
>
> Sorry for the delay.
No worries.
> I agree with your proposal. However, i added an additionnal minor fix patch
> to get it to work.
I squashed the first 2 patches.
> I also got to the option to a
From: Sergei Shtylyov
Date: Tue, 09 Jun 2015 00:44:16 +0300
> On 06/04/2015 06:12 AM, David Miller wrote:
>
>> Furthermore, you should pass the NAPI context into ravb_rx() and use
>
>I guess I should have one NAPI context per RX queue?
Yes.
>
>> it so that you can invoke napi_gro_receive
Hello.
On 06/04/2015 06:12 AM, David Miller wrote:
+ /* Received network control queue */
+ if (ris0 & RIS0_FRF1) {
+ ravb_write(ndev, ~RIS0_FRF1, RIS0);
+ /* Timestamp of network control packets that is based
+
On 05/28, Geert Uytterhoeven wrote:
> Hi all,
>
> This patch series adds Clock Domain support to the Clock Pulse Generator
> (CPG) Module Stop (MSTP) Clocks driver using the generic PM Domain, to
> be used on shmobile SoCs without device power domains (R-Car Gen1 and
> Gen2, RZ). This allow
On Mon, Jun 8, 2015 at 9:57 PM, Benjamin Herrenschmidt
wrote:
> On Sun, 2015-06-07 at 08:54 +0100, Grant Likely wrote:
>> > IE. conceptually, what overlays do today is quite rooted around the idea
>> > of having a fixed "base" DT and some pre-compiled DTB overlays that
>> > get added/removed. The
Hi Mark,
On Fri, Apr 24, 2015 at 10:37:22AM -0700, Mark A. Greer wrote:
> The current versions of the trf7970a has an erratum where it returns
> an extra byte in the response to 'Read Multiple Block' (RMB) commands.
> This command is issued to Type 5 tags (i.e., ISO/IEC 15693 tags) by
> the neard
On Sun, 2015-06-07 at 08:54 +0100, Grant Likely wrote:
> > IE. conceptually, what overlays do today is quite rooted around the idea
> > of having a fixed "base" DT and some pre-compiled DTB overlays that
> > get added/removed. The design completely ignore the idea of a FW that
> > maintains a "live
Hello
Regarding the two problems
1) The immediate bug fix for dt unload
I agree that we should use the simplest possible patch for
backporting, but I believe that Grant patch does not differ too much
from
https://git.kernel.org/cgit/linux/kernel/git/gregkh/driver-core.git/commit/?h=driver-cor
On Fri, Jun 05, 2015 at 11:17:30AM +0100, Lee Jones wrote:
> On Thu, 04 Jun 2015, Javier Martinez Canillas wrote:
>
> > From: Gwendal Grignou
> >
> > Chromebooks can have more than one Embedded Controller so the
> > cros_ec device id has to be incremented for each EC registered.
> >
> > Add a n
On Sun, Jun 7, 2015 at 9:20 AM, Grant Likely wrote:
> Add a single resource to the test bus device to exercise the platform
> bus code a little more. This isn't strictly a devicetree test, but it is
> a corner case that the devicetree runs into. Until we've got platform
> device unittests, it can
Hello Grant
I totally understand. every phandle is unique in every device tree,
but I have one device tree per pcie.
What happened to Dynamic Symbols support and fixup support?
If i read it right, it adds some information about the symbols so they
can be treated specially.
Regards!
On Mon, Ju
Hello Pantelis
Any progress here?
Thanks
On Tue, Apr 28, 2015 at 10:36 AM, Pantelis Antoniou
wrote:
> Hi Ricardo,
>
>> On Apr 28, 2015, at 11:16 , Ricardo Ribalda Delgado
>> wrote:
>>
>> Hello
>>
>> I have an X86 platform with device tree support. It has multiple pci
>> slots with a custom bo
Hello Grant
On Mon, Jun 8, 2015 at 8:47 PM, Grant Likely wrote:
> Hi Ricardo,
>
> Comments below...
>
> On Sun, 7 Jun 2015 20:13:15 +0200
> , Ricardo Ribalda Delgado
> wrote:
>> Hello Grant
>>
>> I would ask you to go through all the discussion related to this bug.
>> Here is a summary (please
On 2015-06-08 19:49, Rob Herring wrote:
> On Wed, May 27, 2015 at 7:47 AM, Stefan Agner wrote:
>> Support configurable conversion mode through sysfs. So far, the
>> mode used was low-power, which is enabled by default now. Beside
>> that, the modes normal and high-speed are selectable as well.
>>
Hello Grant
On Mon, Jun 8, 2015 at 8:23 PM, Grant Likely wrote:
> On Fri, 5 Jun 2015 12:51:17 +0200
> , Ricardo Ribalda Delgado
> wrote:
>> Some device tree platforms have not defined correctly their memory
>> resources (i.e. Overlapping or duplication of resources).
>> To avoid this issue we
Hi Ricardo,
Comments below...
On Sun, 7 Jun 2015 20:13:15 +0200
, Ricardo Ribalda Delgado
wrote:
> Hello Grant
>
> I would ask you to go through all the discussion related to this bug.
> Here is a summary (please anyone involved correct me if I am wrong)
>
> 1) I send a patch to fix the oops
On 06/08/2015 09:05 AM, Fu Wei wrote:
Hi Gurnter
On 3 June 2015 at 01:07, Guenter Roeck wrote:
On 06/02/2015 09:55 AM, Fu Wei wrote:
Hi Timur,
Thanks , feedback inline
On 2 June 2015 at 23:32, Timur Tabi wrote:
On 06/01/2015 11:05 PM, fu@linaro.org wrote:
+/*
+ * help functions fo
On Fri, 5 Jun 2015 12:51:17 +0200
, Ricardo Ribalda Delgado
wrote:
> Some device tree platforms have not defined correctly their memory
> resources (i.e. Overlapping or duplication of resources).
> To avoid this issue we have historically avoided to add their resources to
> the resource tree. Th
Am 08.06.2015 um 20:14 schrieb Alexander Holler:
Am 08.06.2015 um 14:26 schrieb Enrico Weigelt, metux IT consult:
Am 04.06.2015 um 22:39 schrieb Alexander Holler:
> As it seems to have been forgotten or overread, I've mentioned in my
series of patches last year that, with a few changes, it's
Am 08.06.2015 um 14:26 schrieb Enrico Weigelt, metux IT consult:
Am 04.06.2015 um 22:39 schrieb Alexander Holler:
> As it seems to have been forgotten or overread, I've mentioned in my
series of patches last year that, with a few changes, it's possible to
let the algorithm I've used (dfs) to s
The following patches add arm pl353 static memory controller driver for
xilinx zynq soc. The arm pl353 smc supports two interfaces i.e nand and
nor/sram memory interfaces. The current implementation supports only a
single SMC instance and nand specific configuration.
xilinx zynq TRM link:
http://w
Added notes about the controller and driver
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- Fixed the review comments
Changes in v4:
- None
---
Documentation/mtd/nand/pl353-nand.txt | 92 +
1 files change
Added software ecc support.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- None
Changes in v4:
- Updated the driver to sync with pl353_smc driver APIs
---
drivers/mtd/nand/pl353_nand.c | 164 +
1
Add driver for arm pl353 static memory controller nand interface with
HW ECC support. This controller is used in xilinx zynq soc for interfacing
the nand flash memory.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Currently not implemented the memclk rate adjustments. I will
l
The following patches add arm pl353 static memory controller driver for
xilinx zynq soc. The arm pl353 smc supports two interfaces i.e nand and
nor/sram memory interfaces. The current implementation supports only a
single SMC instance and nand specific configuration.
xilinx zynq TRM link:
http://w
Add driver for arm pl353 static memory controller. This controller is
used in xilinx zynq soc for interfacing the nand and nor/sram memory
devices.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Corrected the kconfig to use tristate selection
- Corrected the GPL licence ident
- Ad
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Corrected clocks description
- prefixed '#' for address and size cells
Changes in v6:
- None
Changes in v5:
- Removed timing properties
Changes in v4:
- none
Change
On 02/06/2015 at 22:03:28 +, Stefan Wahren wrote :
> In order to get iio-hwmon support, the lradc must be declared as an
> iio provider. So fix this issue by adding the #io-channel-cells property.
>
> Signed-off-by: Stefan Wahren
> Fixes: bd798f9c7b30 ("ARM: dts: mxs: Add iio-hwmon to mx23 so
On Mon, Jun 08, 2015 at 06:15:46PM +0800, Eddie Huang wrote:
> On Fri, 2015-05-15 at 17:25 +0800, Mark Brown wrote:
> > That's how a very large proportion of devices that work with DMA are
> > done - why would this be complicated? All can_dma() does is report if
> > DMA is possible.
> In include
On Mon, Jun 8, 2015 at 12:42 AM, Sanchayan Maity
wrote:
> The driver currently does not take into account the minimum sample time
> as per the Figure 6-8 Chapter 9.1.1 12-bit ADC electrical characteristics.
> We set a static amount of cycles instead of considering the sample time as
> a given valu
On Wed, May 27, 2015 at 7:47 AM, Stefan Agner wrote:
> Support configurable conversion mode through sysfs. So far, the
> mode used was low-power, which is enabled by default now. Beside
> that, the modes normal and high-speed are selectable as well.
>
> Use the new device tree property which speci
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/dma/Kconfig |6 +
drivers/dma/xilinx/Makefile |1 +
drivers/dma/x
Sergei Shtylyov writes:
>> +pxa_camera: pxa_camera@5000 {
>
>The ePAPR standard has something to say about the node naming:
> "The name of a node should be somewhat generic, reflecting the function of the
> device and not its precise programming model." So I'd suggest "video@5
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61 insertions(+), 0 deletions(-)
create mode 100644 Docume
Hi Guenter,
Great thanks for your review,
On 3 June 2015 at 00:12, Guenter Roeck wrote:
> On 06/01/2015 09:05 PM, fu@linaro.org wrote:
>>
>> From: Fu Wei
>>
>> Also update Documentation/watchdog/watchdog-kernel-api.txt to
>> introduce:
>> (1)the new elements in the watchdog_device and watc
On Mon, Jun 08, 2015 at 05:44:53PM +0200, Thierry Reding wrote:
> On Mon, Jun 08, 2015 at 03:29:26PM +0100, Russell King - ARM Linux wrote:
> > You're asking questions we have no real answers to - all we have is the
> > available documentation provided by Freescale - we don't even have the
> > Roch
On Tue, Apr 28, 2015 at 9:16 AM, Ricardo Ribalda Delgado
wrote:
>
> Hello
>
> I have an X86 platform with device tree support. It has multiple pci
> slots with a custom board that is described with a device tree.
>
> When the pci device is probed, the driver fetches a device tree from
> the firmwa
To enable SMP when booting via u-boot we need to specify the
newly implemented cpu-release-addr DT property.
Signed-off-by: Peter Griffin
---
arch/arm/boot/dts/stih407-family.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-family.dtsi
b/arch/arm/boot/dts/s
Hi Maxime,
This patchset adds in the necessary code to manage the holding pen for STi
platforms.
Due to all the STi upstream devs using JTAG to boot the STi boards, there
is currently a SMP bug when booting upstream kernels via u-boot where
only the primary core is brought up.
This hasn't been n
Most upstream devs boot STi platform via JTAG which abuses the
boot process by setting the PC of secondary cores directly. As
a consquence, booting STi platforms via u-boot results in only
the primary core being brought up as the code to manage the
holding pen is not upstream.
This patch adds the
Hi Guenter,
On 4 June 2015 at 02:25, Guenter Roeck wrote:
> On Wed, Jun 03, 2015 at 01:16:41PM -0500, Timur Tabi wrote:
>> On 06/01/2015 11:05 PM, fu@linaro.org wrote:
>> >+if (wdd->pretimeout)
>> >+/* The pretimeout is valid, go panic */
>> >+panic("SBSA Watchdog
To enable the FIFO feature a "atmel,fifo-size" attribute with a strictly
positive value must be added into the node of the device-tree describing
the spi controller.
When FIFOs are enabled, the RX one is forced to operate in SINGLE data
mode because this driver configures the spi controller as a m
This patch relies on the CSAAT (Chip Select Active After Transfer) feature
introduced by the version 2 of the spi controller. This new mode allows to
use properly the internal chip-select output pin of the spi controller
instead of using external gpios. Consequently, the "cs-gpios" device-tree
prop
- add new property "atmel,fifo-size"
- change "cs-gpios" to optional for SPI controller version >= 2.
Signed-off-by: Cyrille Pitchen
---
Documentation/devicetree/bindings/spi/spi_atmel.txt | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/binding
ChangeLog
v2:
- read the Status Register to clear its RX FIFO Threshold Flag (RXFTHF) before
writing into the IER to enable the RXFTHF interrupt.
- remove the reset of the FIFO Mode Register (FMR) at the end of transfers
because setting the RX FIFO Threshold to 0 also sets the RXFTHF bit in SR
On Mon, Jun 8, 2015 at 10:02 AM, Li Jun wrote:
> Add otg version, srp, hnp and adp support for usb OTG port, then those OTG
> features don't have to be decided by usb gadget drivers.
>
> Signed-off-by: Li Jun
> ---
> Documentation/devicetree/bindings/usb/generic.txt | 10 ++
> 1 file cha
Hi Gurnter
On 3 June 2015 at 01:07, Guenter Roeck wrote:
> On 06/02/2015 09:55 AM, Fu Wei wrote:
>>
>> Hi Timur,
>>
>> Thanks , feedback inline
>>
>> On 2 June 2015 at 23:32, Timur Tabi wrote:
>>>
>>> On 06/01/2015 11:05 PM, fu@linaro.org wrote:
>>>
+/*
+ * help functions for acces
On Mon, Jun 08, 2015 at 03:29:26PM +0100, Russell King - ARM Linux wrote:
> On Mon, Jun 08, 2015 at 04:02:58PM +0200, Thierry Reding wrote:
> > On Sat, Jun 06, 2015 at 12:10:58AM +0100, Russell King - ARM Linux wrote:
> > > On Fri, Jun 05, 2015 at 02:16:40PM +0200, Heiko Stübner wrote:
> > > > Hi T
On Sun, 7 Jun 2015 19:29:17 -0500
, Rob Herring
wrote:
> On Sun, Jun 7, 2015 at 2:05 AM, Grant Likely wrote:
> > On Tue, 19 May 2015 10:17:32 -0700
> > , Greg Kroah-Hartman
> > wrote:
> >> On Tue, May 19, 2015 at 01:29:16PM +0100, Sudeep Holla wrote:
> >> > Hi Rob/Greg,
> >> >
> >> > On 14/05/
On Mon, 8 Jun 2015, Vivek Gautam wrote:
> Facilitate getting required 3.3V and 1.0V VDD supply for
> EHCI controller on Exynos.
>
> For example, patches for regulators' nodes:
> c8c253f ARM: dts: Add regulator entries to smdk5420
> 275dcd2 ARM: dts: add max77686 pmic node for smdk5250,
> enable o
Use usb_otg_descriptor_add to allocate and initialize usb_otg_descriptor,
free it while composite unbind.
Signed-off-by: Li Jun
---
drivers/usb/gadget/legacy/zero.c | 25 +++--
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/gadget/legacy/zero.c b/
Use usb_otg_descriptor_add to allocate and initialize usb_otg_descriptor,
free it while composite unbind.
Signed-off-by: Li Jun
---
drivers/usb/gadget/legacy/g_ffs.c | 26 +++---
1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/drivers/usb/gadget/legacy/g_ffs.c
Use usb_otg_descriptor_add to allocate and initialize usb_otg_descriptor,
free it while composite unbind.
Signed-off-by: Li Jun
---
drivers/usb/gadget/legacy/ether.c | 32 ++--
1 file changed, 18 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/gadget/legacy/e
Allocate usb_otg_descriptor and initialize it according to gadget otg
options, if none of options is not set, keep bmAttributes setting as
current gadget drivers, with this new interface, usb_otg_descriptor can
include bcdOTG if OTG 2.0 or later, and otg features can be decided by
the combination o
From: Macpaul Lin
OTG 2.0 introduces bcdOTG to identify the OTG and EH supplement release
number with which the OTG device is compliant, so adds it for
usb_otg_descriptor.
Signed-off-by: Macpaul Lin
Signed-off-by: Li Jun
---
include/uapi/linux/usb/ch9.h | 6 +-
1 file changed, 5 insertion
After introduce usb otg properties, update ci_otg_is_fsm_mode conditions
to be depending on both usb hardware properties and usb driver config,
also resolve a compile issue in debug.c after the API change.
Signed-off-by: Li Jun
---
drivers/usb/chipidea/ci.h| 3 ++-
drivers/usb/chipidea/debug
Use usb_otg_descriptor_add to allocate and initialize usb_otg_descriptor,
add it for each usb configurations, free it while composite unbind.
Signed-off-by: Li Jun
---
drivers/usb/gadget/configfs.c | 26 +-
1 file changed, 17 insertions(+), 9 deletions(-)
diff --git a/dr
Add otg version, srp, hnp and adp support for usb OTG port, then those OTG
features don't have to be decided by usb gadget drivers.
Signed-off-by: Li Jun
---
Documentation/devicetree/bindings/usb/generic.txt | 10 ++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree
From: Macpaul Lin
Copy usb_otg_descriptor from config's descriptor if host requests
USB_DT_OTG.
Signed-off-by: Macpaul Lin
Signed-off-by: Li Jun
---
drivers/usb/gadget/composite.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/usb/gadget/composite.c b/drive
On 06/08/2015 05:11 AM, Enrico Weigelt, metux IT consult wrote:
Am 08.06.2015 um 08:01 schrieb Chris Packham:
Hi folks,
> Sounds like my best bet is to mark the nodes as disabled in the
> dts and have my bootloader update them on the way through.
In case your bootloader can take that decisio
On Sun, Jun 7, 2015 at 10:32 AM, wrote:
>> 2015-06-05 5:53 GMT+09:00 :
Hi Yaniv,
2015-06-03 18:37 GMT+09:00 Yaniv Gardi :
> @@ -321,7 +313,22 @@ static int ufshcd_pltfrm_probe(struct
> platform_device *pdev)
> goto out;
> }
>
> -
Use usb_otg_descriptor_add to allocate and initialize usb_otg_descriptor,
free it while composite unbind.
Signed-off-by: Li Jun
---
drivers/usb/gadget/legacy/ncm.c | 25 +++--
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/gadget/legacy/ncm.c b/dr
Use usb_otg_descriptor_add to allocate and initialize usb_otg_descriptor,
free it while composite unbind.
Signed-off-by: Li Jun
---
drivers/usb/gadget/legacy/serial.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/gadget/legacy/serial
Use usb_otg_descriptor_add to allocate and initialize usb_otg_descriptor,
free it while composite unbind.
Signed-off-by: Li Jun
---
drivers/usb/gadget/legacy/multi.c | 33 ++---
1 file changed, 18 insertions(+), 15 deletions(-)
diff --git a/drivers/usb/gadget/legacy/
Use usb_otg_descriptor_add to allocate and initialize usb_otg_descriptor,
free it while composite unbind.
Signed-off-by: Li Jun
---
drivers/usb/gadget/legacy/mass_storage.c | 26 +++---
1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/drivers/usb/gadget/legacy/
Use usb_otg_descriptor_add to allocate and initialize usb_otg_descriptor,
free it while composite unbind.
Signed-off-by: Li Jun
---
drivers/usb/gadget/legacy/hid.c | 27 ---
1 file changed, 12 insertions(+), 15 deletions(-)
diff --git a/drivers/usb/gadget/legacy/hid.c b/
Use usb_otg_descriptor_add to allocate and initialize usb_otg_descriptor,
free it while composite unbind.
Signed-off-by: Li Jun
---
drivers/usb/gadget/legacy/printer.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/usb/gadget/legacy/printer.c
Use usb_otg_descriptor_add to allocate and initialize usb_otg_descriptor,
free it while composite unbind.
Signed-off-by: Li Jun
---
drivers/usb/gadget/legacy/cdc2.c | 26 +++---
1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/drivers/usb/gadget/legacy/cdc2.c b
Use usb_otg_descriptor_add to allocate and initialize usb_otg_descriptor,
free it while composite unbind.
Signed-off-by: Li Jun
---
drivers/usb/gadget/legacy/audio.c | 25 +++--
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/gadget/legacy/audio.c
Use usb_otg_descriptor_add to allocate and initialize usb_otg_descriptor,
free it while composite unbind.
Signed-off-by: Li Jun
---
drivers/usb/gadget/legacy/acm_ms.c | 26 +++---
1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/drivers/usb/gadget/legacy/acm_ms
Goodix touchscreens export through their registers a Product ID
and Firmware Version. The Product ID is an ASCII encoding of the
product name (e.g.: "911").
Export to sysfs (through the input subsystem) the product id and
firmware version read from the device rather than using constant
values.
Si
Goodix devices can be configured by writing custom data to the device at
init. The configuration data is read with request_firmware from
"goodix__cfg.bin", where is the product id read from the device
(e.g.: goodix_911_cfg.bin for Goodix GT911, goodix_9271_cfg.bin for
GT9271).
The configuration i
Check property of usb hardware to get otg version and if SRP, HNP and ADP
are supported.
Signed-off-by: Li Jun
---
drivers/usb/common/common.c | 64 +
include/linux/usb/of.h | 20 ++
2 files changed, 84 insertions(+)
diff --git a/driv
From: Macpaul Lin
Add USB_OTG_ADP definition for usb_otg_descriptor.bmAttributes.
Signed-off-by: Macpaul Lin
Signed-off-by: Li Jun
Acked-by: Peter Chen
---
include/uapi/linux/usb/ch9.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/usb/ch9.h b/include/uapi/linux/usb/c
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