On Wed, 25 Nov 2015 05:40:49 +
Bharat Kumar Gogada wrote:
> > On Thu, 19 Nov 2015 11:05:23 +0530
> > Bharat Kumar Gogada wrote:
> >
> > > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP.
> > >
> > > Signed-off-by: Bharat Kumar Gogada
> > > Signed-off-by: Ravi Kiran Gummaluri
>
Signed-off-by: Alison Wang
Signed-off-by: Xiubo Li
Signed-off-by: Jianwei Wang
---
arch/arm/boot/dts/ls1021a-twr.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts
b/arch/arm/boot/dts/ls1021a-twr.dts
index fbb89d1..fad2e3b 100644
--- a/arch/a
Signed-off-by: Alison Wang
Signed-off-by: Xiubo Li
Signed-off-by: Jianwei Wang
---
arch/arm/boot/dts/ls1021a.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 9430a99..f01c98b 100644
--- a/arch/arm/boot/dts
Add HDMI video output support.
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/am57xx-sbc-am57x.dts | 41 ++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/am57xx-sbc-am57x.dts
b/arch/arm/boot/dts/am57xx-sbc-am57x.d
Add support for CompuLab CM-SOM-AM57X board.
CL-SOM-AM57x is a miniature System-on-Module (SoM) based on
TI Sitara AM57x ARM Cortex-A15 System-on-Chip family.
https://www.compulab.co.il/products/computer-on-modules/cl-som-am57x-ti-am5728-am5718-system-on-module/
Add basic DT support for standalo
On-board EEPROM chip is used for storing a board production info.
Add carrier board EEPROM support (over I2C5 bus).
Signed-off-by: Dmitry Lifshitz
---
arch/arm/boot/dts/am57xx-sbc-am57x.dts | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/am57xx-sbc-am
usb1_drvvbus pin is used to Drive-VBUS enable to external charge
pump/power switch.
Add a pinmux for that pin.
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/am57xx-sbc-am57x.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/am
SBC-AM57x is a single board computer designed for industrial and
embedded applications. It is based on the Texas Instruments Sitara AM57x
system-on-chip family. SBC-AM57x is implemented with the CL-SOM-AM57x
computer-on-module providing most of the functions, and SB-SOM-AM57x
carrier board providin
Add analog audio DT nodes:
1. simple-audio-card node
2. wm8731 codec node
3. MCASP3 pinmux
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 67 +++
1 file changed, 67 insertions(+)
diff --git a/arch/arm/boot/dts
Add USB support.
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
index a838ea4..eba12
Add dual EMAC support.
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 105 ++
1 file changed, 105 insertions(+)
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
b/arch/arm/boot/dts/am57xx-cl-som-am57x.dt
CM-SOM-AM57X has two options of main storage devices - eMMC or NAND.
Add eMMC chip support (over MMC2 bus).
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 33 +++
1 file changed, 33 insertions(+)
diff --git a/a
Startek-kd050c 800x480 LCD panel timings are described in
compulab-sb-som.dtsi.
Add appropriate DT endpoints to connect DPI output and LCD.
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/am57xx-sbc-am57x.dts | 38 ++
1 file changed,
This patch series adds support for CompuLab CL-SOM-AM57X and
SBC-AM57X boards.
CL-SOM-AM57x is a miniature System-on-Module (SoM) based on
TI Sitara AM57x ARM Cortex-A15 System-on-Chip family.
SBC-AM57x is a single board computer, implemented with the
CL-SOM-AM57x computer-on-module providing mos
Add ADS7846 touchscreen support.
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 44 +++
1 file changed, 44 insertions(+)
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
b/arch/arm/boot/dts/am57xx-cl-som
On-board EEPROM chip is used for storing a board production
info.
Add module EEPROM support (over I2C4 bus).
Signed-off-by: Dmitry Lifshitz
---
arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
b/arch/a
Add PCA9555 GPIO extender support (over I2C5 bus).
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/am57xx-sbc-am57x.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/am57xx-sbc-am57x.dts
b/arch/arm/boot/dts/am57xx-sbc-am57x.dts
index
On-board spi-flash chip is used as a main boot device.
Add spi-flash chip support (over QSPI bus).
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 41 +++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/b
Add HDMI connector node without a valid input endpoint.
CompuLab SB-SOM is a carrier board, hence the endpoint
should be added in the board DT with a valid HDMI output.
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/compulab-sb-som.dtsi | 7 +++
1 file changed
Add EM3027 RTC chip support (over I2C4 bus).
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
b/arch/arm/boot/dts/am57xx-cl-s
Add MMC1 support, used for SD/MMC card.
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/am57xx-sbc-am57x.dts | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/am57xx-sbc-am57x.dts
b/arch/arm/boot/dts/am57xx-sbc-am57x.
Enable I2C3 bus and add appropriate pinmux.
Signed-off-by: Dmitry Lifshitz
Acked-by: Igor Grinberg
---
arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
b/arch/arm/boot/dts/am57xx-cl-som-am57x
Add DT bindings documentation for the rk3288 crypto drivers.
Signed-off-by: Zain Wang
Acked-by: Rob Herring
Tested-by: Heiko Stuebner
---
Changed in v5:
- None
Changed in v4:
- None
Changed in v3:
- add reset property
Changed in v2:
- None
Changed in v1:
- remove the _crypto suffix
- use "r
Set an ID for crypto clk, so that it can be called in other part.
Signed-off-by: Zain Wang
Acked-by: Michael Turquette
Tested-by: Heiko Stuebner
---
Changed in v5:
- None
Changed in v4:
- None
Changed in v3:
- None
Changed in v2:
- None
Changed in v1:
- define SCLK_CRYPTO in rk3288-cru.h
- use
Crypto driver support:
ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
You can alloc tags above in your case.
And other algorithms and platforms will be added later on.
Signed-off-by: Zain Wang
Tested-by: Heiko Stuebner
---
Changed in v5:
- copy IV back after operation
- us
Changed in v5:
- copy IV back after operation
- use cra_block_size to tell AES from DES instaed flag AES/TDES
Changed in v4:
- modify irq function
- add devm_add_action in probe
- fix some minor mistakes
Changed in v3:
- add OF depended in Kconfig
- rename some variate
- add reset property
- remo
Add Crypto node for rk3288 including crypto controller and dma clk.
Signed-off-by: Zain Wang
Tested-by: Heiko Stuebner
---
Changed in v5:
- None
Changed in v4:
- None
Changed in v3:
- add reset property
Changed in v2:
- None
Changed in v1:
- remove the _crypto suffix
- use "rockchip,rk3288-c
From: Kuninori Morimoto
You can set trip temp if your kernel has CONFIG_THERMAL_WRITABLE_TRIPS
echo $temp > /sys/class/thermal/thermal_zone0/trip_point_0_temp
-45000 < $temp < 125000 is supported
Default is 9
Signed-off-by: Kuninori Morimoto
---
This patch is v2 of "[PATCH] thermal: rc
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Hash: SHA1
On 11/23/2015 07:01 PM, Stefan Agner wrote:
> GPLv2-only devicetrees make reuse difficult for software components
> licensed under a different license.
>
> The consensus is that a GPL/X11 dual-license should allow all necessary
> uses, so relicense th
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On 11/23/2015 07:01 PM, Stefan Agner wrote:
> GPLv2-only devicetrees make reuse difficult for software components
> licensed under a different license.
>
> The consensus is that a GPL/X11 dual-license should allow all necessary
> uses, so relicense th
> On Thu, 19 Nov 2015 11:05:23 +0530
> Bharat Kumar Gogada wrote:
>
> > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP.
> >
> > Signed-off-by: Bharat Kumar Gogada
> > Signed-off-by: Ravi Kiran Gummaluri
> > Acked-by: Rob Herring
> > ---
> > +
> > +#define MSI_ADDRESS
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On 11/23/2015 07:01 PM, Stefan Agner wrote:
> GPLv2-only devicetrees make reuse difficult for software components
> licensed under a different license.
>
> The consensus is that a GPL/X11 dual-license should allow all necessary
> uses, so relicense th
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Hash: SHA1
On 11/23/2015 06:57 PM, Stefan Agner wrote:
> GPLv2-only devicetrees make reuse difficult for software components
> licensed under a different license.
>
> The consensus is that a GPL/X11 dual-license should allow all necessary
> uses, so relicense th
Atmel devices in this family have some quirks not found in other similar
chips - they do not support a sequential read of the entire EEPROM
contents, and the control word sent at the start of each operation
varies in bit length.
This commit adds quirk support to the driver and modifies the read
im
This commit implements bindings in the eeprom_93xx46 driver allowing
device word size and read-only attributes to be specified via
devicetree.
Signed-off-by: Cory Tusar
---
drivers/misc/eeprom/eeprom_93xx46.c | 49 +
1 file changed, 49 insertions(+)
diff --gi
This commit documents bindings to be added to the eeprom_93xx46 driver
which will allow:
- Device word size and read-only attributes to be specified.
- A device-specific compatible string for use with Atmel AT93C46D
EEPROMs.
- Specifying a GPIO line to function as a 'select' or 'enable'
This commit adds support to the eeprom_93x46 driver allowing a GPIO line
to function as a 'select' or 'enable' signal prior to accessing the
EEPROM.
Signed-off-by: Cory Tusar
---
drivers/misc/eeprom/eeprom_93xx46.c | 35 +++
include/linux/eeprom_93xx46.h |
This series of patches adds an initial set of devicetree bindings to the
eeprom_93xx46 driver which mirror the configuration options previously
available as a platform device. These bindings are then extended to
include support for specific Atmel devices in this family and also to
support GPIO-bas
Compatible at93xx46 devices from both Microchip and Atmel expect a
word-based address, regardless of whether the device is strapped for 8-
or 16-bit operation. However, the offset parameter passed in when
reading or writing at a specific location is always specified in terms
of bytes.
This commit
Hi Eduardo
Thank you for your feedback
> > From: Kuninori Morimoto
> >
> > Current rcar thermal driver is using 90 degrees as trip temp, but it
> > should be based on each SoC / platform.
> > This patch enables to set trip temp via DT. (It uses db8500-thermal
> > style for it)
> > It will use
-BEGIN PGP SIGNED MESSAGE-
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On 11/19/2015 01:05 AM, Vladimir Zapolskiy wrote:
> On 19.11.2015 05:29, Cory Tusar wrote:
>> This commit adds support to the eeprom_93x46 driver allowing a GPIO line
>> to function as a 'select' or 'enable' signal prior to accessing the
>> EEPROM.
>>
Hi Haibo,
Some comments below:
On 2015-11-20 07:48, Haibo Chen wrote:
> Freescale i.MX7D soc contains a new ADC IP. This patch add this ADC
> driver support, and the driver only support ADC software trigger.
>
> Signed-off-by: Haibo Chen
> ---
> drivers/iio/adc/Kconfig | 9 +
> drivers/i
Morimoto-san,
On Wed, Nov 25, 2015 at 01:45:14AM +, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> Current rcar thermal driver is using 90 degrees as trip temp, but it
> should be based on each SoC / platform.
> This patch enables to set trip temp via DT. (It uses db8500-thermal
On 11/24/2015 01:40 PM, Oleksij Rempel wrote:
Add WD support for Alphascale asm9260 SoC. This driver
provide support for different function modes:
- HW mode to trigger SoC reset on timeout
- SW mode do soft reset if needed
- DEBUG mode
Optional support for stopping watchdog. If reset binding are
On Mon, Nov 23, 2015 at 06:55:38PM +, Simon Arlott wrote:
> Add device tree bindings for the BCM6345/BCM6318 timers. This is required
> for the BCM6345 watchdog which needs to respond to one of the timer
> interrupts.
>
> Signed-off-by: Simon Arlott
Acked-by: Rob Herring
> ---
> On 23/11/1
On 11/24/2015 02:15 PM, Simon Arlott wrote:
Return the remaining time from the hardware control register.
Warn when the device is registered if the hardware watchdog is currently
running and report the remaining time left.
This is really two logical changes, isn't it ?
Nice trick to figure ou
Hi Simon,
On 11/22/2015 06:06 AM, Simon Arlott wrote:
Convert bcm63xx_wdt to use WATCHDOG_CORE.
The default and maximum time constants that are only used once have been
moved to the initialisation of the struct watchdog_device.
Comments inline.
Thanks,
Guenter
Signed-off-by: Simon Arlott
On Mon, Nov 23, 2015 at 10:57:44AM -0500, Gabriel L. Somlo wrote:
> From: Gabriel Somlo
>
> Remove fw_cfg hardware interface details from
> Documentation/devicetree/bindings/arm/fw-cfg.txt,
> and replace them with a pointer to the authoritative
> documentation in the QEMU source tree.
>
> Signed
On Mon, Nov 23, 2015 at 04:07:01PM +0100, Lucas Stach wrote:
> This adds a new binding for the Freescale i.MX GPC block, which allows
> to describe multiple power domains in a more natural way. The driver
> will continue to support the old binding for existing DTBs, but new
> features like the addi
On Tue, Nov 24, 2015 at 05:21:30PM -0600, Rob Herring wrote:
> On Tue, Nov 24, 2015 at 03:03:28PM +0800, Shengjiu Wang wrote:
> > ESAI need to enable the spba clock, when sdma is using share peripheral
> > script. In this case, there is two spba master port is used, if don't
> > enable the clock, t
On Monday, November 23, 2015 at 17:32 UTC+8, Maxime Ripard wrote:
> On Mon, Nov 23, 2015 at 10:51:15PM -0800, Sugar Wu wrote:
>> On Monday, November 23, 2015 at 8:43:59 PM UTC+8, Maxime Ripard wrote:
>>>
>>> Hi,
>>>
>>> On Mon, Nov 23, 2015 at 09:02:48AM +0100, Josef Gajdusek wrote:
Add a no
On Mon, Nov 23, 2015 at 02:55:58PM +0100, Geert Uytterhoeven wrote:
> Hi Simon, Magnus,
>
> This patch series add minimal L1 and L2 cache descriptions to DT for
> r8a7740 and sh73a0, and migrates the shmobile DT-based generic r8a7740
> platform from calling l2x0_of_init() to the generic l2c
From: Kuninori Morimoto
Current rcar thermal driver is using 90 degrees as trip temp, but it
should be based on each SoC / platform.
This patch enables to set trip temp via DT. (It uses db8500-thermal
style for it)
It will use 90 degrees as default trip temp if DT doesn't have it.
Signed-off-by
On Tue, 2015-11-24 at 11:38 +0100, Thierry Reding wrote:
> On Tue, Nov 24, 2015 at 01:58:13PM +0800, Yong Wu wrote:
> > On Fri, 2015-10-23 at 11:26 +0200, Joerg Roedel wrote:
> > > On Thu, Oct 22, 2015 at 12:40:02PM +0800, Yong Wu wrote:
> > > > But the mtk-iommu depend on the drivers/memory/m
On Sun, Oct 25, 2015 at 11:20:56PM +0530, Afzal Mohammed wrote:
> Minimal Cortex-M4 device tree to boot Linux to shell. M4 is booted via
> Cortex-A5 running Linux using Stefan Agner's "m4boot"
> utility.
>
> Signed-off-by: Afzal Mohammed
Applied, thanks.
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On Tue, Nov 24, 2015 at 05:49:05AM +, Yoshihiro Shimoda wrote:
> Hi Simon-san,
>
> > From: Simon Horman [mailto:horms+rene...@verge.net.au]
> > Sent: Tuesday, November 24, 2015 11:21 AM
> >
> > In general Renesas hardware is not documented to the extent where the
> > relationship between IP b
On Tue, Nov 24, 2015 at 02:16:55PM -0600, Rob Herring wrote:
> On Tue, Nov 24, 2015 at 11:20:41AM +0900, Simon Horman wrote:
> > In general Renesas hardware is not documented to the extent where the
> > relationship between IP blocks on different SoCs can be assumed although
> > they may appear to
On 18/11/15 10:16, Ray Jui wrote:
> This patch enales PCIe PHY in device tree for Broadcom Cygnus based platforms
>
> This patch is developed based on v4.4-rc1 and available here:
> https://github.com/Broadcom/cygnus-linux/tree/cygnus-pcie-phy-dt-v1
>
> Ray Jui (1):
> ARM: dts: enable PCIe PHY
On 18/11/15 19:52, Pramod Kumar wrote:
> Add ngpios property in cygnus ASIU, CCM and CRMU gpio controller's node
>
> Signed-off-by: Pramod Kumar
> Reviewed-by: Ray Jui
> Reviewed-by: Scott Branden
Applied to devicetree/next with a more specific subject, thanks!
--
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On 20/11/15 09:58, Yendapally Reddy Dhananjaya Reddy wrote:
> This enables the pinctrl support for Broadcom NSP SoC
>
> Signed-off-by: Yendapally Reddy Dhananjaya Reddy
Looks like a sane pinctrl node here, unless there are objections, I
would like to go ahead and apply this for v4.5, thanks!
>
On Tue, Nov 24, 2015 at 01:14:17PM +, Lee Jones wrote:
> Signed-off-by: Ludovic Barre
> Signed-off-by: Lee Jones
> ---
> .../devicetree/bindings/remoteproc/st-rproc.txt| 41
> ++
Acked-by: Rob Herring
> 1 file changed, 41 insertions(+)
> create mode 100644 Docume
On 06/11/15 11:49, Kapil Hali wrote:
> This is the second iteration in the series.
>
> Changes in v2:
> Removed the pen_holding method of SMP bringup for NSP SoC and
> replaced it with simple wakeup of secondary core using ARM IPI.
>
>
> This series adds SMP support for Broadcom's Northstar Plus
On Tue, Nov 24, 2015 at 01:04:09PM +, Martyn Welch wrote:
> This patchs adds documentation for the binding of the Zodiac RAVE
> Switch Watchdog Processor. This is an i2c based watchdog.
>
> Cc: Rob Herring
> Cc: Pawel Moll
> Cc: Mark Rutland
> Cc: Ian Campbell
> Cc: Kumar Gala
> Cc: devic
On Tue, Nov 24, 2015 at 12:59:49PM +0200, Adriana Reus wrote:
> Add a property to allow changing the default power-saving mode.
> By default, at read raw the chip will activate and provide
> one measurent, then it will shut itself down. However, the
> chip can also work in "continuous" mode which m
On Tue, Nov 24, 2015 at 12:12:41PM +0100, Philipp Zabel wrote:
> Am Dienstag, den 24.11.2015, 11:38 +0100 schrieb Steffen Trumtrar:
> > Add the binding documentation for the Epson RX6110 RTC.
> >
> > Signed-off-by: Steffen Trumtrar
[...]
> > +Required properties:
> > +- compatible: should be: "
On Tue, Nov 24, 2015 at 11:38:52AM +0100, Steffen Trumtrar wrote:
> Add the binding documentation for the Epson RX6110 RTC.
>
> Signed-off-by: Steffen Trumtrar
> ---
> I'm not sure what the current policy for such simple SPI bindings is.
> Are they necessary?
Yes. We do have trivial-devices.txt
Hi WingMan,
On Thu, Oct 15, 2015 at 10:27:10AM -0400, WingMan Kwok wrote:
> This patch adds the required PCI serdes bindings whcih can then be
> enabled by setting the corresponding statuses to "ok" in order to
> configure and start the PCI serdes.
>
> This patch depends on the updates to the Ke
On Tue, Nov 24, 2015 at 03:03:30PM +0800, Shengjiu Wang wrote:
> ASRC need to enable the spba clock, when sdma is using share peripheral
> script. In this case, there is two spba master port is used, if don't
> enable the clock, the spba bus will have arbitration issue, which may
> cause read/write
On Tue, Nov 24, 2015 at 03:03:29PM +0800, Shengjiu Wang wrote:
> SPDIF need to enable the spba clock, when sdma is using share peripheral
> script. In this case, there is two spba master port is used, if don't
> enable the clock, the spba bus will have arbitration issue, which may
> cause read/writ
On Tue, Nov 24, 2015 at 03:03:28PM +0800, Shengjiu Wang wrote:
> ESAI need to enable the spba clock, when sdma is using share peripheral
> script. In this case, there is two spba master port is used, if don't
> enable the clock, the spba bus will have arbitration issue, which may
> cause read/write
On Tue, Nov 24, 2015 at 02:52:44PM +0800, Jia Hongtao wrote:
> Add bindings documentation for TMU (Thermal Monitoring Unit) on QorIQ
> platform.
>
> Signed-off-by: Jia Hongtao
> Reviewed-by: Scott Wood
Acked-by: Rob Herring
> ---
> .../devicetree/bindings/thermal/qoriq-thermal.txt | 63
> +
On 24/11/15 14:15, Simon Arlott wrote:
> Return the remaining time from the hardware control register.
>
> Warn when the device is registered if the hardware watchdog is currently
> running and report the remaining time left.
>
> Signed-off-by: Simon Arlott
Reviewed-by: Florian Fainelli
At so
On 24/11/15 14:12, Simon Arlott wrote:
> Instead of using a fixed clock HZ in the driver, obtain it from the
> "periph" clk that the watchdog timer uses.
>
> Signed-off-by: Simon Arlott
Reviewed-by: Florian Fainelli
--
Florian
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On 24/11/15 14:10, Simon Arlott wrote:
> Add the BCM6345/BCM6318 timer as an interrupt controller so that it can be
> used by the watchdog to warn that its timer will expire soon.
>
> Support for clocksource/clockevents is not implemented as the timer
> interrupt is not per CPU (except on the BCM6
Return the remaining time from the hardware control register.
Warn when the device is registered if the hardware watchdog is currently
running and report the remaining time left.
Signed-off-by: Simon Arlott
---
Changed "if (timeleft > 0)" to "if (hw->running)" when checking if a
warning should b
Instead of using a fixed clock HZ in the driver, obtain it from the
"periph" clk that the watchdog timer uses.
Signed-off-by: Simon Arlott
---
Changed to check for -EPROBE_DEFER before printing an error.
drivers/watchdog/bcm63xx_wdt.c | 38 --
1 file changed,
Add the BCM6345/BCM6318 timer as an interrupt controller so that it can be
used by the watchdog to warn that its timer will expire soon.
Support for clocksource/clockevents is not implemented as the timer
interrupt is not per CPU (except on the BCM6318) and the MIPS clock is
better. This could be
Alexander Aring writes:
> This patch adds support for RPi several Power Domains and enable support
> to enable the USB Power Domain when it's not enabled before.
>
> This patch based on Eric Anholt's patch to support Power Domains. He had
> an issue about -EPROBE_DEFER inside the power domain sub
Signed-off-by: Oleksij Rempel
---
.../bindings/watchdog/alphascale-asm9260.txt | 35 ++
1 file changed, 35 insertions(+)
create mode 100644
Documentation/devicetree/bindings/watchdog/alphascale-asm9260.txt
diff --git a/Documentation/devicetree/bindings/watchdog/alphas
v2:
- fix DT types
- remove obsolet comments
- add clk error handling
- reduce log noise
- allow to return an error in asm9260_wdt_get_dt_mode
v3:
- split patch to two parts, binding documentation and driver
- spelling fixes
- make reset a required property. It will make the code easier
- reduce t
Add WD support for Alphascale asm9260 SoC. This driver
provide support for different function modes:
- HW mode to trigger SoC reset on timeout
- SW mode do soft reset if needed
- DEBUG mode
Optional support for stopping watchdog. If reset binding are not provided
this driver will work in nowayout
On 08.10.2015 10:24, Thierry Reding wrote:
> On Wed, Oct 07, 2015 at 11:02:20PM +0200, Maciej S. Szmigiero wrote:
>> This patch implements support for United Radiant Technology
>> UMSH-8596MD-xT 7.0" WVGA TFT LCD panels in DRM panel-simple
>> driver.
>>
>> Signed-off-by: Maciej Szmigiero
>> ---
>>
Hi,
On Tue, Nov 24, 2015 at 09:44:59PM +0100, Ulf Hansson wrote:
> [...]
>
> > diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
> > index 8c53c55..20479d7 100644
> > --- a/arch/arm/mach-bcm/Kconfig
> > +++ b/arch/arm/mach-bcm/Kconfig
> > @@ -134,6 +134,16 @@ config ARCH_BCM2835
[...]
> diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
> index 8c53c55..20479d7 100644
> --- a/arch/arm/mach-bcm/Kconfig
> +++ b/arch/arm/mach-bcm/Kconfig
> @@ -134,6 +134,16 @@ config ARCH_BCM2835
> This enables support for the Broadcom BCM2835 SoC. This SoC is
>
On 11/23/2015 04:57 PM, Stefan Agner wrote:
GPLv2-only devicetrees make reuse difficult for software components
licensed under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary
uses, so relicense the vfxxx.dtsi, vf500.dtsi and vf610.dtsi files to
this c
On Tue, Nov 24, 2015 at 02:04:35PM +0800, Mingkai Hu wrote:
> From: Minghuan Lian
>
> The patch adds LS2085a to PCIe compatible to fix the compatibility
> issue when using firmware with LS2085a compatible property.
>
> Signed-off-by: Minghuan Lian
> Signed-off-by: Mingkai Hu
> ---
> Documenta
On 19 November 2015 at 19:08, Alexander Aring wrote:
> This patch adds function pm_genpd_uninit for undo a pm_genpd_init. This
> is useful for multiple power domains while probing. If the probing fails
> after one pm_genpd_init was called we need to undo all previous
> registrations of generic pm
The BCM63268 has a NAND interrupt register with combined status and enable
registers. It also has a clock for the NAND controller that needs to be
enabled.
Set up the device by enabling the clock, disabling and acking all
interrupts, then handle the CTRL_READY interrupt.
Add a brcmnand_get_socdat
Add device tree binding for NAND on the BCM63268.
The BCM63268 has a NAND interrupt register with combined status and enable
registers.
Signed-off-by: Simon Arlott
---
.../devicetree/bindings/mtd/brcm,brcmnand.txt | 35 ++
1 file changed, 35 insertions(+)
diff --git a/
On Tue, Nov 24, 2015 at 11:20:41AM +0900, Simon Horman wrote:
> In general Renesas hardware is not documented to the extent where the
> relationship between IP blocks on different SoCs can be assumed although
> they may appear to operate the same way. Furthermore the documentation
> typically does
Hi
On Tue, Nov 24, 2015 at 5:04 PM, Raphaël Poggi wrote:
> Hi,
>
> 2015-11-24 9:27 GMT+01:00 Michael Trimarchi :
>> Hi
>>
>> On Tue, Nov 24, 2015 at 9:21 AM, Raphaël Poggi wrote:
>>> Hi,
>>>
>>> 2015-11-21 10:37 GMT+01:00 Michael Trimarchi :
Hi
On Fri, Nov 20, 2015 at 11:09 AM, Ra
On 11/20/2015 09:32 AM, Aaro Koskinen wrote:
Hi,
On Mon, May 18, 2015 at 02:40:44PM -0700, Aleksey Makarov wrote:
On 05/18/2015 02:05 PM, Aaro Koskinen wrote:
On Mon, Mar 16, 2015 at 06:06:00PM +0300, Aleksey Makarov wrote:
The OCTEON MMC controller is currently found on cn61XX and cnf71XX
de
On 2015-11-23 19:26, Shawn Guo wrote:
> On Sun, Oct 25, 2015 at 11:20:56PM +0530, Afzal Mohammed wrote:
>> Minimal Cortex-M4 device tree to boot Linux to shell. M4 is booted via
>> Cortex-A5 running Linux using Stefan Agner's "m4boot"
>> utility.
>>
>> Signed-off-by: Afzal Mohammed
>
> Stefan,
>
On 24/11/15 00:12, Simon Arlott wrote:
> On 23/11/15 18:22, Florian Fainelli wrote:
>> On 22/11/15 14:17, Simon Arlott wrote:
>>> The BCM63268 has a NAND interrupt register with combined status and enable
>>> registers. It also has a clock for the NAND controller that needs to be
>>> enabled.
>>>
>
On Sun, Nov 22, 2015 at 02:05:16PM +, Simon Arlott wrote:
> There is a level triggered interrupt for the watchdog timer as part of
> the bcm63xx_timer device. The interrupt occurs when the hardware watchdog
> timer reaches 50% of the remaining time.
>
> It is not possible to mask the interrupt
The BCM63268 has a NAND interrupt register with combined status and enable
registers. It also has a clock for the NAND controller that needs to be
enabled.
Set up the device by enabling the clock, disabling and acking all
interrupts, then handle the CTRL_READY interrupt.
Add a brcmnand_get_socdat
On Tue, Nov 24, 2015 at 10:38:18AM -0700, Eric Blake wrote:
> On 11/24/2015 09:55 AM, Gabriel L. Somlo wrote:
> > On Tue, Nov 24, 2015 at 04:14:50AM +0800, kbuild test robot wrote:
>
> >>
> >>drivers/firmware/qemu_fw_cfg.c: In function 'fw_cfg_cmdline_set':
> drivers/firmware/qemu_fw_cfg.
On 24/11/15 03:38, Leilk Liu wrote:
This patch revises failure flow while pm_runtime_enable().
Please write a proper commit message explaining what this patch does.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c | 15 ---
1 file changed, 8 insertions(+), 7 deletion
Hi,
> >> +UniPhier System Bus Controller
> >> +--
> >> +
> >> +The UniPhier System Bus Controller is a hardware block with registers that
> >> +controls the System Bus accessing; how each bank is mapped onto the
> >> parent bus,
> >> +various timing parameters of the b
On 11/24/15 18:38, Eric Blake wrote:
> On 11/24/2015 09:55 AM, Gabriel L. Somlo wrote:
>> On Tue, Nov 24, 2015 at 04:14:50AM +0800, kbuild test robot wrote:
>
>>>
>>>drivers/firmware/qemu_fw_cfg.c: In function 'fw_cfg_cmdline_set':
> drivers/firmware/qemu_fw_cfg.c:510:7: warning: format '%
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